2007-06-19 12:39:04 +02:00
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/** @file
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2008-10-20 17:16:32 +02:00
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Industry Standard Definitions of SMBIOS Table Specification v2.6
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2007-06-19 12:39:04 +02:00
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2009-04-20 08:40:49 +02:00
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Copyright (c) 2006 - 2009, Intel Corporation All rights
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2007-06-19 12:39:04 +02:00
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reserved. This program and the accompanying materials are
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licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __SMBIOS_STANDARD_H__
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#define __SMBIOS_STANDARD_H__
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2009-04-20 08:40:49 +02:00
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2008-10-20 17:16:32 +02:00
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///
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/// Smbios Table Entry Point Structure
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///
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2008-11-11 23:21:08 +01:00
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#pragma pack(1)
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2007-06-19 12:39:04 +02:00
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typedef struct {
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UINT8 AnchorString[4];
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UINT8 EntryPointStructureChecksum;
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UINT8 EntryPointLength;
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UINT8 MajorVersion;
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UINT8 MinorVersion;
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UINT16 MaxStructureSize;
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UINT8 EntryPointRevision;
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UINT8 FormattedArea[5];
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UINT8 IntermediateAnchorString[5];
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UINT8 IntermediateChecksum;
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UINT16 TableLength;
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UINT32 TableAddress;
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UINT16 NumberOfSmbiosStructures;
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UINT8 SmbiosBcdRevision;
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} SMBIOS_TABLE_ENTRY_POINT;
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2008-08-14 05:22:55 +02:00
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///
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/// The Smbios structure header
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///
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2007-06-19 12:39:04 +02:00
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typedef struct {
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UINT8 Type;
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UINT8 Length;
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UINT16 Handle;
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} SMBIOS_STRUCTURE;
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2008-12-08 07:59:18 +01:00
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///
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/// String Number for a Null terminated string, 00h stands for no string available.
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///
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2007-12-21 08:19:54 +01:00
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typedef UINT8 SMBIOS_TABLE_STRING;
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2009-04-20 08:40:49 +02:00
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///
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/// BIOS Characteristics
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/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
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///
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typedef struct {
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2009-04-20 09:15:14 +02:00
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UINT32 Reserved :2; ///< Bits 0-1
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2009-04-20 08:40:49 +02:00
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UINT32 Unknown :1;
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UINT32 BiosCharacteristicsNotSupported :1;
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UINT32 IsaIsSupported :1;
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UINT32 McaIsSupported :1;
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UINT32 EisaIsSupported :1;
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UINT32 PciIsSupported :1;
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UINT32 PcmciaIsSupported :1;
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UINT32 PlugAndPlayIsSupported :1;
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UINT32 ApmIsSupported :1;
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UINT32 BiosIsUpgradable :1;
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UINT32 BiosShadowingAllowed :1;
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UINT32 VlVesaIsSupported :1;
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UINT32 EscdSupportIsAvailable :1;
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UINT32 BootFromCdIsSupported :1;
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UINT32 SelectableBootIsSupported :1;
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UINT32 RomBiosIsSocketed :1;
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UINT32 BootFromPcmciaIsSupported :1;
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UINT32 EDDSpecificationIsSupported :1;
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UINT32 JapaneseNecFloppyIsSupported :1;
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UINT32 JapaneseToshibaFloppyIsSupported :1;
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UINT32 Floppy525_360IsSupported :1;
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UINT32 Floppy525_12IsSupported :1;
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UINT32 Floppy35_720IsSupported :1;
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UINT32 Floppy35_288IsSupported :1;
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UINT32 PrintScreenIsSupported :1;
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UINT32 Keyboard8042IsSupported :1;
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UINT32 SerialIsSupported :1;
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UINT32 PrinterIsSupported :1;
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UINT32 CgaMonoIsSupported :1;
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UINT32 NecPc98 :1;
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2009-04-20 09:15:14 +02:00
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UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
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///< and bits 48-63 reserved for System Vendor.
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2009-04-20 08:40:49 +02:00
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} MISC_BIOS_CHARACTERISTICS;
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///
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/// BIOS Characteristics Extension Byte 1
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/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
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/// within the BIOS Information structure.
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///
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typedef struct {
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UINT8 AcpiIsSupported :1;
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UINT8 UsbLegacyIsSupported :1;
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UINT8 AgpIsSupported :1;
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UINT8 I20BootIsSupported :1;
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UINT8 Ls120BootIsSupported :1;
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UINT8 AtapiZipDriveBootIsSupported :1;
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UINT8 Boot1394IsSupported :1;
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UINT8 SmartBatteryIsSupported :1;
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} MBCE_BIOS_RESERVED;
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///
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/// BIOS Characteristics Extension Byte 2
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/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
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/// within the BIOS Information structure.
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///
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typedef struct {
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UINT8 BiosBootSpecIsSupported :1;
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UINT8 FunctionKeyNetworkBootIsSupported :1;
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UINT8 TargetContentDistributionEnabled :1;
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2009-04-20 09:15:14 +02:00
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UINT8 ExtensionByte2Reserved :1;
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2009-04-20 08:40:49 +02:00
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} MBCE_SYSTEM_RESERVED;
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///
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/// BIOS Characteristics Extension Bytes
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///
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typedef struct {
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MBCE_BIOS_RESERVED BiosReserved;
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MBCE_SYSTEM_RESERVED SystemReserved;
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UINT8 Reserved;
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} MISC_BIOS_CHARACTERISTICS_EXTENSION;
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2008-10-20 17:16:32 +02:00
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///
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/// BIOS Information (Type 0)
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///
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2007-12-21 08:19:54 +01:00
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typedef struct {
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2009-04-20 08:40:49 +02:00
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SMBIOS_STRUCTURE Hdr;
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SMBIOS_TABLE_STRING Vendor;
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SMBIOS_TABLE_STRING BiosVersion;
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UINT16 BiosSegment;
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SMBIOS_TABLE_STRING BiosReleaseDate;
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UINT8 BiosSize;
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MISC_BIOS_CHARACTERISTICS BiosCharacteristics;
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UINT8 BIOSCharacteristicsExtensionBytes[2];
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UINT8 SystemBiosMajorRelease;
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UINT8 SystemBiosMinorRelease;
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UINT8 EmbeddedControllerFirmwareMajorRelease;
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UINT8 EmbeddedControllerFirmwareMinorRelease;
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2007-12-21 08:19:54 +01:00
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} SMBIOS_TABLE_TYPE0;
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2009-04-20 08:40:49 +02:00
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///
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/// System Wake-up Type
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///
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typedef enum {
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SystemWakeupTypeReserved = 0x00,
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SystemWakeupTypeOther = 0x01,
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SystemWakeupTypeUnknown = 0x02,
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SystemWakeupTypeApmTimer = 0x03,
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SystemWakeupTypeModemRing = 0x04,
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SystemWakeupTypeLanRemote = 0x05,
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SystemWakeupTypePowerSwitch = 0x06,
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SystemWakeupTypePciPme = 0x07,
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SystemWakeupTypeAcPowerRestored = 0x08
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} MISC_SYSTEM_WAKEUP_TYPE;
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2008-10-20 17:16:32 +02:00
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///
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/// System Information (Type 1)
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2009-04-20 08:40:49 +02:00
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///
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/// The information in this structure defines attributes of the overall system and is
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/// intended to be associated with the Component ID group of the system's MIF.
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/// An SMBIOS implementation is associated with a single system instance and contains
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/// one and only one System Information (Type 1) structure.
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2008-10-20 17:16:32 +02:00
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///
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2007-12-21 08:19:54 +01:00
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typedef struct {
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2009-04-20 08:40:49 +02:00
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SMBIOS_STRUCTURE Hdr;
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SMBIOS_TABLE_STRING Manufacturer;
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SMBIOS_TABLE_STRING ProductName;
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SMBIOS_TABLE_STRING Version;
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SMBIOS_TABLE_STRING SerialNumber;
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GUID Uuid;
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2009-06-21 15:56:26 +02:00
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UINT8 WakeUpType; ///< enumeration value from MISC_SYSTEM_WAKEUP_TYPE
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2009-04-20 08:40:49 +02:00
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SMBIOS_TABLE_STRING SKUNumber;
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SMBIOS_TABLE_STRING Family;
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2007-12-21 08:19:54 +01:00
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} SMBIOS_TABLE_TYPE1;
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2009-04-20 08:40:49 +02:00
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///
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2009-04-20 09:01:56 +02:00
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/// Base Board - Feature Flags
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2009-04-20 08:40:49 +02:00
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///
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typedef struct {
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UINT8 Motherboard :1;
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UINT8 RequiresDaughterCard :1;
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UINT8 Removable :1;
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UINT8 Replaceable :1;
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UINT8 HotSwappable :1;
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UINT8 Reserved :3;
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} BASE_BOARD_FEATURE_FLAGS;
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///
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2009-04-20 09:01:56 +02:00
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/// Base Board - Board Type
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2009-04-20 08:40:49 +02:00
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///
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typedef enum {
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BaseBoardTypeUnknown = 0x1,
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BaseBoardTypeOther = 0x2,
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BaseBoardTypeServerBlade = 0x3,
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BaseBoardTypeConnectivitySwitch = 0x4,
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BaseBoardTypeSystemManagementModule = 0x5,
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BaseBoardTypeProcessorModule = 0x6,
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BaseBoardTypeIOModule = 0x7,
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BaseBoardTypeMemoryModule = 0x8,
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BaseBoardTypeDaughterBoard = 0x9,
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BaseBoardTypeMotherBoard = 0xA,
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BaseBoardTypeProcessorMemoryModule = 0xB,
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BaseBoardTypeProcessorIOModule = 0xC,
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BaseBoardTypeInterconnectBoard = 0xD
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} BASE_BOARD_TYPE;
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2008-10-20 17:16:32 +02:00
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///
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/// Base Board (or Module) Information (Type 2)
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///
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2009-04-20 09:01:56 +02:00
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/// The information in this structure defines attributes of a system baseboard -
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2009-04-20 08:40:49 +02:00
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/// for example a motherboard, planar, or server blade or other standard system module.
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///
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2007-12-21 08:19:54 +01:00
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typedef struct {
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2009-04-20 08:40:49 +02:00
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SMBIOS_STRUCTURE Hdr;
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SMBIOS_TABLE_STRING Manufacturer;
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SMBIOS_TABLE_STRING ProductName;
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SMBIOS_TABLE_STRING Version;
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SMBIOS_TABLE_STRING SerialNumber;
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SMBIOS_TABLE_STRING AssetTag;
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BASE_BOARD_FEATURE_FLAGS FeatureFlag;
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SMBIOS_TABLE_STRING LocationInChassis;
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UINT16 ChassisHandle;
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2009-06-21 15:56:26 +02:00
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UINT8 BoardType; ///< enumeration value from BASE_BOARD_TYPE
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2009-04-20 08:40:49 +02:00
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UINT8 NumberOfContainedObjectHandles;
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UINT16 ContainedObjectHandles[1];
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2007-12-21 08:19:54 +01:00
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} SMBIOS_TABLE_TYPE2;
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2009-04-20 08:40:49 +02:00
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///
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/// System Enclosure or Chassis Types
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///
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typedef enum {
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MiscChassisTypeOther = 0x01,
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MiscChassisTypeUnknown = 0x02,
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MiscChassisTypeDeskTop = 0x03,
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MiscChassisTypeLowProfileDesktop = 0x04,
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MiscChassisTypePizzaBox = 0x05,
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MiscChassisTypeMiniTower = 0x06,
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MiscChassisTypeTower = 0x07,
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MiscChassisTypePortable = 0x08,
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MiscChassisTypeLapTop = 0x09,
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MiscChassisTypeNotebook = 0x0A,
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MiscChassisTypeHandHeld = 0x0B,
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MiscChassisTypeDockingStation = 0x0C,
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MiscChassisTypeAllInOne = 0x0D,
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MiscChassisTypeSubNotebook = 0x0E,
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MiscChassisTypeSpaceSaving = 0x0F,
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MiscChassisTypeLunchBox = 0x10,
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MiscChassisTypeMainServerChassis = 0x11,
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MiscChassisTypeExpansionChassis = 0x12,
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MiscChassisTypeSubChassis = 0x13,
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MiscChassisTypeBusExpansionChassis = 0x14,
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MiscChassisTypePeripheralChassis = 0x15,
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MiscChassisTypeRaidChassis = 0x16,
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MiscChassisTypeRackMountChassis = 0x17,
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MiscChassisTypeSealedCasePc = 0x18,
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MiscChassisMultiSystemChassis = 0x19,
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MiscChassisCompactPCI = 0x1A,
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MiscChassisAdvancedTCA = 0x1B,
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MiscChassisBlade = 0x1C,
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MiscChassisBladeEnclosure = 0x1D
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} MISC_CHASSIS_TYPE;
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///
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/// System Enclosure or Chassis States
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///
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typedef enum {
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ChassisStateOther = 0x01,
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ChassisStateUnknown = 0x02,
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ChassisStateSafe = 0x03,
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ChassisStateWarning = 0x04,
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ChassisStateCritical = 0x05,
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ChassisStateNonRecoverable = 0x06
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} MISC_CHASSIS_STATE;
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///
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/// System Enclosure or Chassis Security Status
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///
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typedef enum {
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ChassisSecurityStatusOther = 0x01,
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ChassisSecurityStatusUnknown = 0x02,
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ChassisSecurityStatusNone = 0x03,
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ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
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ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
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} MISC_CHASSIS_SECURITY_STATE;
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2008-12-08 07:59:18 +01:00
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///
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/// Contained Element record
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///
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2007-12-21 08:19:54 +01:00
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typedef struct {
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UINT8 ContainedElementType;
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UINT8 ContainedElementMinimum;
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UINT8 ContainedElementMaximum;
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} CONTAINED_ELEMENT;
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2009-04-20 08:40:49 +02:00
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2008-10-20 17:16:32 +02:00
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///
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/// System Enclosure or Chassis (Type 3)
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///
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2009-04-20 08:40:49 +02:00
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/// The information in this structure defines attributes of the system's mechanical enclosure(s).
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/// For example, if a system included a separate enclosure for its peripheral devices,
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/// two structures would be returned: one for the main, system enclosure and the second for
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/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification
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/// support the population of the CIM_Chassis class.
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///
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2007-12-21 08:19:54 +01:00
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typedef struct {
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2009-04-20 08:40:49 +02:00
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SMBIOS_STRUCTURE Hdr;
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SMBIOS_TABLE_STRING Manufacturer;
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UINT8 Type;
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SMBIOS_TABLE_STRING Version;
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SMBIOS_TABLE_STRING SerialNumber;
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SMBIOS_TABLE_STRING AssetTag;
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2009-06-21 15:56:26 +02:00
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UINT8 BootupState; ///< enumeration value from MISC_CHASSIS_STATE
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UINT8 PowerSupplyState; ///< enumeration value from MISC_CHASSIS_STATE
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UINT8 ThermalState; ///< enumeration value from MISC_CHASSIS_STATE
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UINT8 SecurityStatus; ///< enumeration value from MISC_CHASSIS_SECURITY_STATE
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2009-04-20 08:40:49 +02:00
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UINT8 OemDefined[4];
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UINT8 Height;
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UINT8 NumberofPowerCords;
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UINT8 ContainedElementCount;
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|
|
UINT8 ContainedElementRecordLength;
|
|
|
|
CONTAINED_ELEMENT ContainedElements[1];
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE3;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Processor Information - Processor Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
ProcessorOther = 0x01,
|
|
|
|
ProcessorUnknown = 0x02,
|
|
|
|
CentralProcessor = 0x03,
|
|
|
|
MathProcessor = 0x04,
|
|
|
|
DspProcessor = 0x05,
|
|
|
|
VideoProcessor = 0x06
|
|
|
|
} PROCESSOR_TYPE_DATA;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Processor Information - Processor Family
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
ProcessorFamilyOther = 0x01,
|
|
|
|
ProcessorFamilyUnknown = 0x02,
|
|
|
|
ProcessorFamily8086 = 0x03,
|
|
|
|
ProcessorFamily80286 = 0x04,
|
|
|
|
ProcessorFamilyIntel386 = 0x05,
|
|
|
|
ProcessorFamilyIntel486 = 0x06,
|
|
|
|
ProcessorFamily8087 = 0x07,
|
|
|
|
ProcessorFamily80287 = 0x08,
|
|
|
|
ProcessorFamily80387 = 0x09,
|
|
|
|
ProcessorFamily80487 = 0x0A,
|
|
|
|
ProcessorFamilyPentium = 0x0B,
|
|
|
|
ProcessorFamilyPentiumPro = 0x0C,
|
|
|
|
ProcessorFamilyPentiumII = 0x0D,
|
|
|
|
ProcessorFamilyPentiumMMX = 0x0E,
|
|
|
|
ProcessorFamilyCeleron = 0x0F,
|
|
|
|
ProcessorFamilyPentiumIIXeon = 0x10,
|
|
|
|
ProcessorFamilyPentiumIII = 0x11,
|
|
|
|
ProcessorFamilyM1 = 0x12,
|
|
|
|
ProcessorFamilyM2 = 0x13,
|
|
|
|
ProcessorFamilyM1Reserved2 = 0x14,
|
|
|
|
ProcessorFamilyM1Reserved3 = 0x15,
|
|
|
|
ProcessorFamilyM1Reserved4 = 0x16,
|
|
|
|
ProcessorFamilyM1Reserved5 = 0x17,
|
|
|
|
ProcessorFamilyAmdDuron = 0x18,
|
|
|
|
ProcessorFamilyK5 = 0x19,
|
|
|
|
ProcessorFamilyK6 = 0x1A,
|
|
|
|
ProcessorFamilyK6_2 = 0x1B,
|
|
|
|
ProcessorFamilyK6_3 = 0x1C,
|
|
|
|
ProcessorFamilyAmdAthlon = 0x1D,
|
|
|
|
ProcessorFamilyAmd29000 = 0x1E,
|
|
|
|
ProcessorFamilyK6_2Plus = 0x1F,
|
|
|
|
ProcessorFamilyPowerPC = 0x20,
|
|
|
|
ProcessorFamilyPowerPC601 = 0x21,
|
|
|
|
ProcessorFamilyPowerPC603 = 0x22,
|
|
|
|
ProcessorFamilyPowerPC603Plus = 0x23,
|
|
|
|
ProcessorFamilyPowerPC604 = 0x24,
|
|
|
|
ProcessorFamilyPowerPC620 = 0x25,
|
|
|
|
ProcessorFamilyPowerPCx704 = 0x26,
|
|
|
|
ProcessorFamilyPowerPC750 = 0x27,
|
|
|
|
ProcessorFamilyAlpha3 = 0x30,
|
|
|
|
ProcessorFamilyAlpha21064 = 0x31,
|
|
|
|
ProcessorFamilyAlpha21066 = 0x32,
|
|
|
|
ProcessorFamilyAlpha21164 = 0x33,
|
|
|
|
ProcessorFamilyAlpha21164PC = 0x34,
|
|
|
|
ProcessorFamilyAlpha21164a = 0x35,
|
|
|
|
ProcessorFamilyAlpha21264 = 0x36,
|
|
|
|
ProcessorFamilyAlpha21364 = 0x37,
|
|
|
|
ProcessorFamilyMips = 0x40,
|
|
|
|
ProcessorFamilyMIPSR4000 = 0x41,
|
|
|
|
ProcessorFamilyMIPSR4200 = 0x42,
|
|
|
|
ProcessorFamilyMIPSR4400 = 0x43,
|
|
|
|
ProcessorFamilyMIPSR4600 = 0x44,
|
|
|
|
ProcessorFamilyMIPSR10000 = 0x45,
|
|
|
|
ProcessorFamilySparc = 0x50,
|
|
|
|
ProcessorFamilySuperSparc = 0x51,
|
|
|
|
ProcessorFamilymicroSparcII = 0x52,
|
|
|
|
ProcessorFamilymicroSparcIIep = 0x53,
|
|
|
|
ProcessorFamilyUltraSparc = 0x54,
|
|
|
|
ProcessorFamilyUltraSparcII = 0x55,
|
|
|
|
ProcessorFamilyUltraSparcIIi = 0x56,
|
|
|
|
ProcessorFamilyUltraSparcIII = 0x57,
|
|
|
|
ProcessorFamilyUltraSparcIIIi = 0x58,
|
|
|
|
ProcessorFamily68040 = 0x60,
|
|
|
|
ProcessorFamily68xxx = 0x61,
|
|
|
|
ProcessorFamily68000 = 0x62,
|
|
|
|
ProcessorFamily68010 = 0x63,
|
|
|
|
ProcessorFamily68020 = 0x64,
|
|
|
|
ProcessorFamily68030 = 0x65,
|
|
|
|
ProcessorFamilyHobbit = 0x70,
|
|
|
|
ProcessorFamilyCrusoeTM5000 = 0x78,
|
|
|
|
ProcessorFamilyCrusoeTM3000 = 0x79,
|
|
|
|
ProcessorFamilyEfficeonTM8000 = 0x7A,
|
|
|
|
ProcessorFamilyWeitek = 0x80,
|
|
|
|
ProcessorFamilyItanium = 0x82,
|
|
|
|
ProcessorFamilyAmdAthlon64 = 0x83,
|
|
|
|
ProcessorFamilyAmdOpteron = 0x84,
|
|
|
|
ProcessorFamilyAmdSempron = 0x85,
|
|
|
|
ProcessorFamilyAmdTurion64Mobile = 0x86,
|
|
|
|
ProcessorFamilyDualCoreAmdOpteron = 0x87,
|
|
|
|
ProcessorFamilyAmdAthlon64X2DualCore = 0x88,
|
|
|
|
ProcessorFamilyAmdTurion64X2Mobile = 0x89,
|
|
|
|
ProcessorFamilyPARISC = 0x90,
|
|
|
|
ProcessorFamilyPaRisc8500 = 0x91,
|
|
|
|
ProcessorFamilyPaRisc8000 = 0x92,
|
|
|
|
ProcessorFamilyPaRisc7300LC = 0x93,
|
|
|
|
ProcessorFamilyPaRisc7200 = 0x94,
|
|
|
|
ProcessorFamilyPaRisc7100LC = 0x95,
|
|
|
|
ProcessorFamilyPaRisc7100 = 0x96,
|
|
|
|
ProcessorFamilyV30 = 0xA0,
|
|
|
|
ProcessorFamilyPentiumIIIXeon = 0xB0,
|
|
|
|
ProcessorFamilyPentiumIIISpeedStep = 0xB1,
|
|
|
|
ProcessorFamilyPentium4 = 0xB2,
|
|
|
|
ProcessorFamilyIntelXeon = 0xB3,
|
|
|
|
ProcessorFamilyAS400 = 0xB4,
|
|
|
|
ProcessorFamilyIntelXeonMP = 0xB5,
|
|
|
|
ProcessorFamilyAMDAthlonXP = 0xB6,
|
|
|
|
ProcessorFamilyAMDAthlonMP = 0xB7,
|
|
|
|
ProcessorFamilyIntelItanium2 = 0xB8,
|
|
|
|
ProcessorFamilyIntelPentiumM = 0xB9,
|
|
|
|
ProcessorFamilyIntelCeleronD = 0xBA,
|
|
|
|
ProcessorFamilyIntelPentiumD = 0xBB,
|
|
|
|
ProcessorFamilyIntelPentiumEx = 0xBC,
|
2009-04-20 09:15:14 +02:00
|
|
|
ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value
|
2009-04-20 08:40:49 +02:00
|
|
|
ProcessorFamilyReserved = 0xBE,
|
|
|
|
ProcessorFamilyIntelCore2 = 0xBF,
|
|
|
|
ProcessorFamilyIBM390 = 0xC8,
|
|
|
|
ProcessorFamilyG4 = 0xC9,
|
|
|
|
ProcessorFamilyG5 = 0xCA,
|
|
|
|
ProcessorFamilyG6 = 0xCB,
|
|
|
|
ProcessorFamilyzArchitectur = 0xCC,
|
|
|
|
ProcessorFamilyViaC7M = 0xD2,
|
|
|
|
ProcessorFamilyViaC7D = 0xD3,
|
|
|
|
ProcessorFamilyViaC7 = 0xD4,
|
|
|
|
ProcessorFamilyViaEden = 0xD5,
|
|
|
|
ProcessorFamilyi860 = 0xFA,
|
|
|
|
ProcessorFamilyi960 = 0xFB,
|
|
|
|
ProcessorFamilyIndicatorFamily2 = 0xFE,
|
|
|
|
ProcessorFamilyReserved1 = 0xFF
|
|
|
|
} PROCESSOR_FAMILY_DATA;
|
|
|
|
|
|
|
|
///
|
2009-04-20 09:01:56 +02:00
|
|
|
/// Processor Information - Voltage
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
typedef struct {
|
2009-04-20 09:15:14 +02:00
|
|
|
UINT8 ProcessorVoltageCapability5V :1;
|
|
|
|
UINT8 ProcessorVoltageCapability3_3V :1;
|
|
|
|
UINT8 ProcessorVoltageCapability2_9V :1;
|
|
|
|
UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
|
|
|
|
UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
|
|
|
|
UINT8 ProcessorVoltageIndicateLegacy :1;
|
2009-04-20 08:40:49 +02:00
|
|
|
} PROCESSOR_VOLTAGE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Processor Information - Processor Upgrade
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
ProcessorUpgradeOther = 0x01,
|
|
|
|
ProcessorUpgradeUnknown = 0x02,
|
|
|
|
ProcessorUpgradeDaughterBoard = 0x03,
|
|
|
|
ProcessorUpgradeZIFSocket = 0x04,
|
2009-04-20 09:15:14 +02:00
|
|
|
ProcessorUpgradePiggyBack = 0x05, ///< Replaceable
|
2009-04-20 08:40:49 +02:00
|
|
|
ProcessorUpgradeNone = 0x06,
|
|
|
|
ProcessorUpgradeLIFSocket = 0x07,
|
|
|
|
ProcessorUpgradeSlot1 = 0x08,
|
|
|
|
ProcessorUpgradeSlot2 = 0x09,
|
|
|
|
ProcessorUpgrade370PinSocket = 0x0A,
|
|
|
|
ProcessorUpgradeSlotA = 0x0B,
|
|
|
|
ProcessorUpgradeSlotM = 0x0C,
|
|
|
|
ProcessorUpgradeSocket423 = 0x0D,
|
2009-04-20 09:15:14 +02:00
|
|
|
ProcessorUpgradeSocketA = 0x0E, ///< Socket 462
|
2009-04-20 08:40:49 +02:00
|
|
|
ProcessorUpgradeSocket478 = 0x0F,
|
|
|
|
ProcessorUpgradeSocket754 = 0x10,
|
|
|
|
ProcessorUpgradeSocket940 = 0x11,
|
|
|
|
ProcessorUpgradeSocket939 = 0x12,
|
|
|
|
ProcessorUpgradeSocketmPGA604 = 0x13,
|
|
|
|
ProcessorUpgradeSocketLGA771 = 0x14,
|
|
|
|
ProcessorUpgradeSocketLGA775 = 0x15,
|
|
|
|
ProcessorUpgradeSocketS1 = 0x16,
|
|
|
|
ProcessorUpgradeAM2 = 0x17,
|
|
|
|
ProcessorUpgradeF1207 = 0x18
|
|
|
|
} PROCESSOR_UPGRADE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Processor ID Field Description
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT32 ProcessorSteppingId:4;
|
|
|
|
UINT32 ProcessorModel: 4;
|
|
|
|
UINT32 ProcessorFamily: 4;
|
|
|
|
UINT32 ProcessorType: 2;
|
|
|
|
UINT32 ProcessorReserved1: 2;
|
|
|
|
UINT32 ProcessorXModel: 4;
|
|
|
|
UINT32 ProcessorXFamily: 8;
|
|
|
|
UINT32 ProcessorReserved2: 4;
|
|
|
|
} PROCESSOR_SIGNATURE;
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
UINT32 ProcessorFpu :1;
|
|
|
|
UINT32 ProcessorVme :1;
|
|
|
|
UINT32 ProcessorDe :1;
|
|
|
|
UINT32 ProcessorPse :1;
|
|
|
|
UINT32 ProcessorTsc :1;
|
|
|
|
UINT32 ProcessorMsr :1;
|
|
|
|
UINT32 ProcessorPae :1;
|
|
|
|
UINT32 ProcessorMce :1;
|
|
|
|
UINT32 ProcessorCx8 :1;
|
|
|
|
UINT32 ProcessorApic :1;
|
|
|
|
UINT32 ProcessorReserved1 :1;
|
|
|
|
UINT32 ProcessorSep :1;
|
|
|
|
UINT32 ProcessorMtrr :1;
|
|
|
|
UINT32 ProcessorPge :1;
|
|
|
|
UINT32 ProcessorMca :1;
|
|
|
|
UINT32 ProcessorCmov :1;
|
|
|
|
UINT32 ProcessorPat :1;
|
|
|
|
UINT32 ProcessorPse36 :1;
|
|
|
|
UINT32 ProcessorPsn :1;
|
|
|
|
UINT32 ProcessorClfsh :1;
|
|
|
|
UINT32 ProcessorReserved2 :1;
|
|
|
|
UINT32 ProcessorDs :1;
|
|
|
|
UINT32 ProcessorAcpi :1;
|
|
|
|
UINT32 ProcessorMmx :1;
|
|
|
|
UINT32 ProcessorFxsr :1;
|
|
|
|
UINT32 ProcessorSse :1;
|
|
|
|
UINT32 ProcessorSse2 :1;
|
|
|
|
UINT32 ProcessorSs :1;
|
|
|
|
UINT32 ProcessorReserved3 :1;
|
|
|
|
UINT32 ProcessorTm :1;
|
|
|
|
UINT32 ProcessorReserved4 :2;
|
|
|
|
} PROCESSOR_FEATURE_FLAGS;
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
PROCESSOR_SIGNATURE Signature;
|
|
|
|
PROCESSOR_FEATURE_FLAGS FeatureFlags;
|
2009-04-20 09:15:14 +02:00
|
|
|
} PROCESSOR_ID_DATA;
|
2009-04-20 08:40:49 +02:00
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Processor Information (Type 4)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The information in this structure defines the attributes of a single processor;
|
|
|
|
/// a separate structure instance is provided for each system processor socket/slot.
|
|
|
|
/// For example, a system with an IntelDX2 processor would have a single
|
|
|
|
/// structure instance while a system with an IntelSX2 processor would have a structure
|
|
|
|
/// to describe the main CPU and a second structure to describe the 80487 co-processor.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
2009-06-21 15:56:26 +02:00
|
|
|
SMBIOS_TABLE_STRING Socket;
|
|
|
|
UINT8 ProcessorType; ///< enumeration value from PROCESSOR_TYPE_DATA
|
|
|
|
UINT8 ProcessorFamily; ///< enumeration value from PROCESSOR_FAMILY_DATA
|
2007-12-21 08:19:54 +01:00
|
|
|
SMBIOS_TABLE_STRING ProcessorManufacture;
|
2009-04-20 08:40:49 +02:00
|
|
|
PROCESSOR_ID_DATA ProcessorId;
|
2007-12-21 08:19:54 +01:00
|
|
|
SMBIOS_TABLE_STRING ProcessorVersion;
|
2009-04-20 08:40:49 +02:00
|
|
|
PROCESSOR_VOLTAGE Voltage;
|
2007-12-21 08:19:54 +01:00
|
|
|
UINT16 ExternalClock;
|
|
|
|
UINT16 MaxSpeed;
|
|
|
|
UINT16 CurrentSpeed;
|
|
|
|
UINT8 Status;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 ProcessorUpgrade; ///< enumeration value from PROCESSOR_UPGRADE
|
2007-12-21 08:19:54 +01:00
|
|
|
UINT16 L1CacheHandle;
|
|
|
|
UINT16 L2CacheHandle;
|
|
|
|
UINT16 L3CacheHandle;
|
|
|
|
SMBIOS_TABLE_STRING SerialNumber;
|
|
|
|
SMBIOS_TABLE_STRING AssetTag;
|
|
|
|
SMBIOS_TABLE_STRING PartNumber;
|
|
|
|
//
|
|
|
|
// Add for smbios 2.5
|
|
|
|
//
|
|
|
|
UINT8 CoreCount;
|
|
|
|
UINT8 EnabledCoreCount;
|
|
|
|
UINT8 ThreadCount;
|
|
|
|
UINT16 ProcessorCharacteristics;
|
|
|
|
//
|
|
|
|
// Add for smbios 2.6
|
|
|
|
//
|
|
|
|
UINT16 ProcessorFamily2;
|
|
|
|
} SMBIOS_TABLE_TYPE4;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Memory Controller Error Detecting Method
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
ErrorDetectingMethodOther = 0x01,
|
|
|
|
ErrorDetectingMethodUnknown = 0x02,
|
|
|
|
ErrorDetectingMethodNone = 0x03,
|
|
|
|
ErrorDetectingMethodParity = 0x04,
|
|
|
|
ErrorDetectingMethod32Ecc = 0x05,
|
|
|
|
ErrorDetectingMethod64Ecc = 0x06,
|
|
|
|
ErrorDetectingMethod128Ecc = 0x07,
|
|
|
|
ErrorDetectingMethodCrc = 0x08
|
|
|
|
} MEMORY_ERROR_DETECT_METHOD;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Memory Controller Error Correcting Capability
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT8 Other :1;
|
|
|
|
UINT8 Unknown :1;
|
|
|
|
UINT8 None :1;
|
|
|
|
UINT8 SingleBitErrorCorrect :1;
|
|
|
|
UINT8 DoubleBitErrorCorrect :1;
|
|
|
|
UINT8 ErrorScrubbing :1;
|
|
|
|
UINT8 Reserved :2;
|
|
|
|
} MEMORY_ERROR_CORRECT_CAPABILITY;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Memory Controller Information - Interleave Support
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryInterleaveOther = 0x01,
|
|
|
|
MemoryInterleaveUnknown = 0x02,
|
|
|
|
MemoryInterleaveOneWay = 0x03,
|
|
|
|
MemoryInterleaveTwoWay = 0x04,
|
|
|
|
MemoryInterleaveFourWay = 0x05,
|
|
|
|
MemoryInterleaveEightWay = 0x06,
|
|
|
|
MemoryInterleaveSixteenWay = 0x07
|
|
|
|
} MEMORY_SUPPORT_INTERLEAVE_TYPE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Memory Controller Information - Memory Speeds
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT16 Other :1;
|
|
|
|
UINT16 Unknown :1;
|
|
|
|
UINT16 SeventyNs:1;
|
|
|
|
UINT16 SixtyNs :1;
|
|
|
|
UINT16 FiftyNs :1;
|
|
|
|
UINT16 Reserved :11;
|
|
|
|
} MEMORY_SPEED_TYPE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Memory Controller Information (Type 5, Obsolete)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The information in this structure defines the attributes of the system's memory controller(s)
|
|
|
|
/// and the supported attributes of any memory-modules present in the sockets controlled by
|
|
|
|
/// this controller.
|
|
|
|
/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),
|
|
|
|
/// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)
|
|
|
|
/// and Memory Device (Type 17) structures should be used instead. BIOS providers might
|
|
|
|
/// choose to implement both memory description types to allow existing DMI browsers
|
|
|
|
/// to properly display the system's memory attributes.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 ErrDetectMethod; ///< enumeration value from MEMORY_ERROR_DETECT_METHOD
|
2009-04-20 08:40:49 +02:00
|
|
|
MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 SupportInterleave; ///< enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE
|
|
|
|
UINT8 CurrentInterleave; ///< enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT8 MaxMemoryModuleSize;
|
|
|
|
MEMORY_SPEED_TYPE SupportSpeed;
|
|
|
|
UINT16 SupportMemoryType;
|
|
|
|
UINT8 MemoryModuleVoltage;
|
|
|
|
UINT8 AssociatedMemorySlotNum;
|
|
|
|
UINT16 MemoryModuleConfigHandles[1];
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE5;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Memory Module Information - Memory Types
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT16 Other :1;
|
|
|
|
UINT16 Unknown :1;
|
|
|
|
UINT16 Standard :1;
|
|
|
|
UINT16 FastPageMode:1;
|
2009-04-28 08:20:55 +02:00
|
|
|
UINT16 Edo :1;
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT16 Parity :1;
|
2009-04-28 08:20:55 +02:00
|
|
|
UINT16 Ecc :1;
|
|
|
|
UINT16 Simm :1;
|
|
|
|
UINT16 Dimm :1;
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT16 BurstEdo :1;
|
2009-04-28 08:20:55 +02:00
|
|
|
UINT16 Sdram :1;
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT16 Reserved :5;
|
|
|
|
} MEMORY_CURRENT_TYPE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Memory Module Information - Memory Size
|
|
|
|
///
|
|
|
|
typedef struct {
|
2009-04-20 09:15:14 +02:00
|
|
|
UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT8 SingleOrDoubleBank :1;
|
|
|
|
} MEMORY_INSTALLED_ENABLED_SIZE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Memory Module Information (Type 6, Obsolete)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// One Memory Module Information structure is included for each memory-module socket
|
|
|
|
/// in the system. The structure describes the speed, type, size, and error status
|
|
|
|
/// of each system memory module. The supported attributes of each module are described
|
|
|
|
/// by the "owning" Memory Controller Information structure.
|
|
|
|
/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),
|
|
|
|
/// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)
|
|
|
|
/// and Memory Device (Type 17) structures should be used instead.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING SocketDesignation;
|
|
|
|
UINT8 BankConnections;
|
|
|
|
UINT8 CurrentSpeed;
|
|
|
|
MEMORY_CURRENT_TYPE CurrentMemoryType;
|
|
|
|
MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;
|
|
|
|
MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;
|
|
|
|
UINT8 ErrorStatus;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE6;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Cache Information - SRAM Type
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT16 Other :1;
|
|
|
|
UINT16 Unknown :1;
|
|
|
|
UINT16 NonBurst :1;
|
|
|
|
UINT16 Burst :1;
|
|
|
|
UINT16 PipelineBurst :1;
|
|
|
|
UINT16 Asynchronous :1;
|
|
|
|
UINT16 Synchronous :1;
|
|
|
|
UINT16 Reserved :9;
|
|
|
|
} CACHE_SRAM_TYPE_DATA;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Cache Information - Error Correction Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
CacheErrorOther = 0x01,
|
|
|
|
CacheErrorUnknown = 0x02,
|
|
|
|
CacheErrorNone = 0x03,
|
|
|
|
CacheErrorParity = 0x04,
|
2009-04-20 09:15:14 +02:00
|
|
|
CacheErrorSingleBit = 0x05, ///< ECC
|
|
|
|
CacheErrorMultiBit = 0x06 ///< ECC
|
2009-04-20 08:40:49 +02:00
|
|
|
} CACHE_ERROR_TYPE_DATA;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Cache Information - System Cache Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
CacheTypeOther = 0x01,
|
|
|
|
CacheTypeUnknown = 0x02,
|
|
|
|
CacheTypeInstruction = 0x03,
|
|
|
|
CacheTypeData = 0x04,
|
|
|
|
CacheTypeUnified = 0x05
|
|
|
|
} CACHE_TYPE_DATA;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Cache Information - Associativity
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
CacheAssociativityOther = 0x01,
|
|
|
|
CacheAssociativityUnknown = 0x02,
|
|
|
|
CacheAssociativityDirectMapped = 0x03,
|
|
|
|
CacheAssociativity2Way = 0x04,
|
|
|
|
CacheAssociativity4Way = 0x05,
|
|
|
|
CacheAssociativityFully = 0x06,
|
|
|
|
CacheAssociativity8Way = 0x07,
|
|
|
|
CacheAssociativity16Way = 0x08,
|
|
|
|
CacheAssociativity24Way = 0x09
|
|
|
|
} CACHE_ASSOCIATIVITY_DATA;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Cache Information (Type 7)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// he information in this structure defines the attributes of CPU cache device in the system.
|
|
|
|
/// One structure is specified for each such device, whether the device is internal to
|
|
|
|
/// or external to the CPU module. Cache modules can be associated with a processor structure
|
|
|
|
/// in one or two ways depending on the SMBIOS version.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING SocketDesignation;
|
|
|
|
UINT16 CacheConfiguration;
|
|
|
|
UINT16 MaximumCacheSize;
|
|
|
|
UINT16 InstalledSize;
|
|
|
|
CACHE_SRAM_TYPE_DATA SupportedSRAMType;
|
|
|
|
CACHE_SRAM_TYPE_DATA CurrentSRAMType;
|
|
|
|
UINT8 CacheSpeed;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 ErrorCorrectionType; ///< enumeration value from CACHE_ERROR_TYPE_DATA
|
|
|
|
UINT8 SystemCacheType; ///< enumeration value from CACHE_TYPE_DATA
|
|
|
|
UINT8 Associativity; ///< enumeration value from CACHE_ASSOCIATIVITY_DATA
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE7;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Port Connector Information - Connector Types
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
PortConnectorTypeNone = 0x00,
|
|
|
|
PortConnectorTypeCentronics = 0x01,
|
|
|
|
PortConnectorTypeMiniCentronics = 0x02,
|
|
|
|
PortConnectorTypeProprietary = 0x03,
|
|
|
|
PortConnectorTypeDB25Male = 0x04,
|
|
|
|
PortConnectorTypeDB25Female = 0x05,
|
|
|
|
PortConnectorTypeDB15Male = 0x06,
|
|
|
|
PortConnectorTypeDB15Female = 0x07,
|
|
|
|
PortConnectorTypeDB9Male = 0x08,
|
|
|
|
PortConnectorTypeDB9Female = 0x09,
|
|
|
|
PortConnectorTypeRJ11 = 0x0A,
|
|
|
|
PortConnectorTypeRJ45 = 0x0B,
|
|
|
|
PortConnectorType50PinMiniScsi = 0x0C,
|
|
|
|
PortConnectorTypeMiniDin = 0x0D,
|
|
|
|
PortConnectorTypeMicriDin = 0x0E,
|
|
|
|
PortConnectorTypePS2 = 0x0F,
|
|
|
|
PortConnectorTypeInfrared = 0x10,
|
|
|
|
PortConnectorTypeHpHil = 0x11,
|
|
|
|
PortConnectorTypeUsb = 0x12,
|
|
|
|
PortConnectorTypeSsaScsi = 0x13,
|
|
|
|
PortConnectorTypeCircularDin8Male = 0x14,
|
|
|
|
PortConnectorTypeCircularDin8Female = 0x15,
|
|
|
|
PortConnectorTypeOnboardIde = 0x16,
|
|
|
|
PortConnectorTypeOnboardFloppy = 0x17,
|
|
|
|
PortConnectorType9PinDualInline = 0x18,
|
|
|
|
PortConnectorType25PinDualInline = 0x19,
|
|
|
|
PortConnectorType50PinDualInline = 0x1A,
|
|
|
|
PortConnectorType68PinDualInline = 0x1B,
|
|
|
|
PortConnectorTypeOnboardSoundInput = 0x1C,
|
|
|
|
PortConnectorTypeMiniCentronicsType14 = 0x1D,
|
|
|
|
PortConnectorTypeMiniCentronicsType26 = 0x1E,
|
|
|
|
PortConnectorTypeHeadPhoneMiniJack = 0x1F,
|
|
|
|
PortConnectorTypeBNC = 0x20,
|
|
|
|
PortConnectorType1394 = 0x21,
|
|
|
|
PortConnectorTypePC98 = 0xA0,
|
|
|
|
PortConnectorTypePC98Hireso = 0xA1,
|
|
|
|
PortConnectorTypePCH98 = 0xA2,
|
|
|
|
PortConnectorTypePC98Note = 0xA3,
|
|
|
|
PortConnectorTypePC98Full = 0xA4,
|
|
|
|
PortConnectorTypeOther = 0xFF
|
|
|
|
} MISC_PORT_CONNECTOR_TYPE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Port Connector Information - Port Types
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
PortTypeNone = 0x00,
|
|
|
|
PortTypeParallelXtAtCompatible = 0x01,
|
|
|
|
PortTypeParallelPortPs2 = 0x02,
|
|
|
|
PortTypeParallelPortEcp = 0x03,
|
|
|
|
PortTypeParallelPortEpp = 0x04,
|
|
|
|
PortTypeParallelPortEcpEpp = 0x05,
|
|
|
|
PortTypeSerialXtAtCompatible = 0x06,
|
|
|
|
PortTypeSerial16450Compatible = 0x07,
|
|
|
|
PortTypeSerial16550Compatible = 0x08,
|
|
|
|
PortTypeSerial16550ACompatible = 0x09,
|
|
|
|
PortTypeScsi = 0x0A,
|
|
|
|
PortTypeMidi = 0x0B,
|
|
|
|
PortTypeJoyStick = 0x0C,
|
|
|
|
PortTypeKeyboard = 0x0D,
|
|
|
|
PortTypeMouse = 0x0E,
|
|
|
|
PortTypeSsaScsi = 0x0F,
|
|
|
|
PortTypeUsb = 0x10,
|
|
|
|
PortTypeFireWire = 0x11,
|
|
|
|
PortTypePcmciaTypeI = 0x12,
|
|
|
|
PortTypePcmciaTypeII = 0x13,
|
|
|
|
PortTypePcmciaTypeIII = 0x14,
|
|
|
|
PortTypeCardBus = 0x15,
|
|
|
|
PortTypeAccessBusPort = 0x16,
|
|
|
|
PortTypeScsiII = 0x17,
|
|
|
|
PortTypeScsiWide = 0x18,
|
|
|
|
PortTypePC98 = 0x19,
|
|
|
|
PortTypePC98Hireso = 0x1A,
|
|
|
|
PortTypePCH98 = 0x1B,
|
|
|
|
PortTypeVideoPort = 0x1C,
|
|
|
|
PortTypeAudioPort = 0x1D,
|
|
|
|
PortTypeModemPort = 0x1E,
|
|
|
|
PortTypeNetworkPort = 0x1F,
|
|
|
|
PortType8251Compatible = 0xA0,
|
|
|
|
PortType8251FifoCompatible = 0xA1,
|
|
|
|
PortTypeOther = 0xFF
|
|
|
|
} MISC_PORT_TYPE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Port Connector Information (Type 8)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The information in this structure defines the attributes of a system port connector,
|
2009-04-20 09:01:56 +02:00
|
|
|
/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information
|
2009-04-20 08:40:49 +02:00
|
|
|
/// are provided. One structure is present for each port provided by the system.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING InternalReferenceDesignator;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 InternalConnectorType; ///< enumeration value from MISC_PORT_CONNECTOR_TYPE
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_TABLE_STRING ExternalReferenceDesignator;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 ExternalConnectorType; ///< enumeration value from MISC_PORT_CONNECTOR_TYPE
|
|
|
|
UINT8 PortType; ///< enumeration value from MISC_PORT_TYPE
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE8;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// System Slots - Slot Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
SlotTypeOther = 0x01,
|
|
|
|
SlotTypeUnknown = 0x02,
|
|
|
|
SlotTypeIsa = 0x03,
|
|
|
|
SlotTypeMca = 0x04,
|
|
|
|
SlotTypeEisa = 0x05,
|
|
|
|
SlotTypePci = 0x06,
|
|
|
|
SlotTypePcmcia = 0x07,
|
|
|
|
SlotTypeVlVesa = 0x08,
|
|
|
|
SlotTypeProprietary = 0x09,
|
|
|
|
SlotTypeProcessorCardSlot = 0x0A,
|
|
|
|
SlotTypeProprietaryMemoryCardSlot = 0x0B,
|
|
|
|
SlotTypeIORiserCardSlot = 0x0C,
|
|
|
|
SlotTypeNuBus = 0x0D,
|
|
|
|
SlotTypePci66MhzCapable = 0x0E,
|
|
|
|
SlotTypeAgp = 0x0F,
|
|
|
|
SlotTypeApg2X = 0x10,
|
|
|
|
SlotTypeAgp4X = 0x11,
|
|
|
|
SlotTypePciX = 0x12,
|
|
|
|
SlotTypeAgp4x = 0x13,
|
|
|
|
SlotTypePC98C20 = 0xA0,
|
|
|
|
SlotTypePC98C24 = 0xA1,
|
|
|
|
SlotTypePC98E = 0xA2,
|
|
|
|
SlotTypePC98LocalBus = 0xA3,
|
|
|
|
SlotTypePC98Card = 0xA4,
|
|
|
|
SlotTypePciExpress = 0xA5,
|
|
|
|
SlotTypePciExpressX1 = 0xA6,
|
|
|
|
SlotTypePciExpressX2 = 0xA7,
|
|
|
|
SlotTypePciExpressX4 = 0xA8,
|
|
|
|
SlotTypePciExpressX8 = 0xA9,
|
|
|
|
SlotTypePciExpressX16 = 0xAA
|
|
|
|
} MISC_SLOT_TYPE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// System Slots - Slot Data Bus Width
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
SlotDataBusWidthOther = 0x01,
|
|
|
|
SlotDataBusWidthUnknown = 0x02,
|
|
|
|
SlotDataBusWidth8Bit = 0x03,
|
|
|
|
SlotDataBusWidth16Bit = 0x04,
|
|
|
|
SlotDataBusWidth32Bit = 0x05,
|
|
|
|
SlotDataBusWidth64Bit = 0x06,
|
|
|
|
SlotDataBusWidth128Bit = 0x07,
|
2009-04-20 09:15:14 +02:00
|
|
|
SlotDataBusWidth1X = 0x08, ///< Or X1
|
|
|
|
SlotDataBusWidth2X = 0x09, ///< Or X2
|
|
|
|
SlotDataBusWidth4X = 0x0A, ///< Or X4
|
|
|
|
SlotDataBusWidth8X = 0x0B, ///< Or X8
|
|
|
|
SlotDataBusWidth12X = 0x0C, ///< Or X12
|
|
|
|
SlotDataBusWidth16X = 0x0D, ///< Or X16
|
|
|
|
SlotDataBusWidth32X = 0x0E ///< Or X32
|
2009-04-20 08:40:49 +02:00
|
|
|
} MISC_SLOT_DATA_BUS_WIDTH;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// System Slots - Current Usage
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
SlotUsageOther = 0x01,
|
|
|
|
SlotUsageUnknown = 0x02,
|
|
|
|
SlotUsageAvailable = 0x03,
|
|
|
|
SlotUsageInUse = 0x04
|
|
|
|
} MISC_SLOT_USAGE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// System Slots - Slot Length
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
SlotLengthOther = 0x01,
|
|
|
|
SlotLengthUnknown = 0x02,
|
|
|
|
SlotLengthShort = 0x03,
|
|
|
|
SlotLengthLong = 0x04
|
|
|
|
} MISC_SLOT_LENGTH;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// System Slots - Slot Characteristics 1
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT8 CharacteristicsUnknown :1;
|
|
|
|
UINT8 Provides50Volts :1;
|
|
|
|
UINT8 Provides33Volts :1;
|
|
|
|
UINT8 SharedSlot :1;
|
|
|
|
UINT8 PcCard16Supported :1;
|
|
|
|
UINT8 CardBusSupported :1;
|
|
|
|
UINT8 ZoomVideoSupported :1;
|
|
|
|
UINT8 ModemRingResumeSupported:1;
|
|
|
|
} MISC_SLOT_CHARACTERISTICS1;
|
|
|
|
///
|
|
|
|
/// System Slots - Slot Characteristics 2
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT8 PmeSignalSupported :1;
|
|
|
|
UINT8 HotPlugDevicesSupported :1;
|
|
|
|
UINT8 SmbusSignalSupported :1;
|
2009-04-20 09:15:14 +02:00
|
|
|
UINT8 Reserved :5; ///< Set to 0.
|
2009-04-20 08:40:49 +02:00
|
|
|
} MISC_SLOT_CHARACTERISTICS2;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// System Slots (Type 9)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The information in this structure defines the attributes of a system slot.
|
|
|
|
/// One structure is provided for each slot in the system.
|
|
|
|
///
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING SlotDesignation;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 SlotType; ///< enumeration value from MISC_SLOT_TYPE
|
|
|
|
UINT8 SlotDataBusWidth; ///< enumeration value from MISC_SLOT_DATA_BUS_WIDTH
|
|
|
|
UINT8 CurrentUsage; ///< enumeration value from MISC_SLOT_USAGE
|
|
|
|
UINT8 SlotLength; ///< enumeration value from MISC_SLOT_LENGTH
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT16 SlotID;
|
|
|
|
MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;
|
|
|
|
MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;
|
2007-12-21 08:19:54 +01:00
|
|
|
//
|
|
|
|
// Add for smbios 2.6
|
|
|
|
//
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT16 SegmentGroupNum;
|
|
|
|
UINT8 BusNum;
|
|
|
|
UINT8 DevFuncNum;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE9;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// On Board Devices Information - Device Types
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
OnBoardDeviceTypeOther = 0x01,
|
|
|
|
OnBoardDeviceTypeUnknown = 0x02,
|
|
|
|
OnBoardDeviceTypeVideo = 0x03,
|
|
|
|
OnBoardDeviceTypeScsiController = 0x04,
|
|
|
|
OnBoardDeviceTypeEthernet = 0x05,
|
|
|
|
OnBoardDeviceTypeTokenRing = 0x06,
|
|
|
|
OnBoardDeviceTypeSound = 0x07
|
|
|
|
} MISC_ONBOARD_DEVICE_TYPE;
|
|
|
|
|
2008-12-08 07:59:18 +01:00
|
|
|
///
|
|
|
|
/// Device Item Entry
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE
|
|
|
|
///< Bit 7 - 1 : device enabled, 0 : device disabled
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_TABLE_STRING DescriptionString;
|
2007-12-21 08:19:54 +01:00
|
|
|
} DEVICE_STRUCT;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// On Board Devices Information (Type 10, obsolete)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended
|
|
|
|
/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both
|
|
|
|
/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.
|
|
|
|
/// The information in this structure defines the attributes of devices that are onboard (soldered onto)
|
|
|
|
/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS
|
|
|
|
/// has some level of control over the enabling of the associated device for use by the system.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
DEVICE_STRUCT Device[1];
|
|
|
|
} SMBIOS_TABLE_TYPE10;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// OEM Strings (Type 11)
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure contains free form strings defined by the OEM. Examples of this are:
|
|
|
|
/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 StringCount;
|
|
|
|
} SMBIOS_TABLE_TYPE11;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// System Configuration Options (Type 12)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure contains information required to configure the base board's Jumpers and Switches.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 StringCount;
|
|
|
|
} SMBIOS_TABLE_TYPE12;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// BIOS Language Information (Type 13)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The information in this structure defines the installable language attributes of the BIOS.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 InstallableLanguages;
|
|
|
|
UINT8 Flags;
|
2009-02-23 03:47:51 +01:00
|
|
|
UINT8 Reserved[15];
|
2007-12-21 08:19:54 +01:00
|
|
|
SMBIOS_TABLE_STRING CurrentLanguages;
|
|
|
|
} SMBIOS_TABLE_TYPE13;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// System Event Log - Event Log Types
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
EventLogTypeReserved = 0x00,
|
|
|
|
EventLogTypeSingleBitECC = 0x01,
|
|
|
|
EventLogTypeMultiBitECC = 0x02,
|
|
|
|
EventLogTypeParityMemErr = 0x03,
|
|
|
|
EventLogTypeBusTimeOut = 0x04,
|
|
|
|
EventLogTypeIOChannelCheck = 0x05,
|
|
|
|
EventLogTypeSoftwareNMI = 0x06,
|
|
|
|
EventLogTypePOSTMemResize = 0x07,
|
|
|
|
EventLogTypePOSTErr = 0x08,
|
|
|
|
EventLogTypePCIParityErr = 0x09,
|
|
|
|
EventLogTypePCISystemErr = 0x0A,
|
|
|
|
EventLogTypeCPUFailure = 0x0B,
|
|
|
|
EventLogTypeEISATimeOut = 0x0C,
|
|
|
|
EventLogTypeMemLogDisabled = 0x0D,
|
|
|
|
EventLogTypeLoggingDisabled = 0x0E,
|
|
|
|
EventLogTypeSysLimitExce = 0x10,
|
|
|
|
EventLogTypeAsyncHWTimer = 0x11,
|
|
|
|
EventLogTypeSysConfigInfo = 0x12,
|
|
|
|
EventLogTypeHDInfo = 0x13,
|
|
|
|
EventLogTypeSysReconfig = 0x14,
|
|
|
|
EventLogTypeUncorrectCPUErr = 0x15,
|
|
|
|
EventLogTypeAreaResetAndClr = 0x16,
|
|
|
|
EventLogTypeSystemBoot = 0x17,
|
2009-04-20 09:15:14 +02:00
|
|
|
EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F
|
|
|
|
EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE
|
2009-04-20 08:40:49 +02:00
|
|
|
EventLogTypeEndOfLog = 0xFF
|
|
|
|
} EVENT_LOG_TYPE_DATA;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// System Event Log - Variable Data Format Types
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
EventLogVariableNone = 0x00,
|
|
|
|
EventLogVariableHandle = 0x01,
|
|
|
|
EventLogVariableMutilEvent = 0x02,
|
|
|
|
EventLogVariableMutilEventHandle = 0x03,
|
|
|
|
EventLogVariablePOSTResultBitmap = 0x04,
|
|
|
|
EventLogVariableSysManagementType = 0x05,
|
|
|
|
EventLogVariableMutliEventSysManagmentType = 0x06,
|
|
|
|
EventLogVariableUnused = 0x07,
|
|
|
|
EventLogVariableOEMAssigned = 0x80
|
2009-04-21 02:34:24 +02:00
|
|
|
} EVENT_LOG_VARIABLE_DATA;
|
2009-04-20 08:40:49 +02:00
|
|
|
|
2008-12-08 07:59:18 +01:00
|
|
|
///
|
|
|
|
/// Group Item Entry
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
UINT8 ItemType;
|
|
|
|
UINT16 ItemHandle;
|
|
|
|
} GROUP_STRUCT;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Event Log Type Descriptors
|
|
|
|
///
|
|
|
|
typedef struct {
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 LogType; ///< enumeration value from EVENT_LOG_TYPE_DATA
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT8 DataFormatType;
|
|
|
|
} EVENT_LOG_TYPE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Group Associations (Type 14)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The Group Associations structure is provided for OEMs who want to specify
|
|
|
|
/// the arrangement or hierarchy of certain components (including other Group Associations)
|
|
|
|
/// within the system.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING GroupName;
|
|
|
|
GROUP_STRUCT Group[1];
|
|
|
|
} SMBIOS_TABLE_TYPE14;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// System Event Log (Type 15)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The presence of this structure within the SMBIOS data returned for a system indicates
|
|
|
|
/// that the system supports an event log. An event log is a fixed-length area within a
|
|
|
|
/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header
|
|
|
|
/// record, followed by one or more variable-length log records.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT16 LogAreaLength;
|
|
|
|
UINT16 LogHeaderStartOffset;
|
|
|
|
UINT16 LogDataStartOffset;
|
|
|
|
UINT8 AccessMethod;
|
|
|
|
UINT8 LogStatus;
|
|
|
|
UINT32 LogChangeToken;
|
|
|
|
UINT32 AccessMethodAddress;
|
|
|
|
UINT8 LogHeaderFormat;
|
|
|
|
UINT8 NumberOfSupportedLogTypeDescriptors;
|
|
|
|
UINT8 LengthOfLogTypeDescriptor;
|
|
|
|
EVENT_LOG_TYPE EventLogTypeDescriptors[1];
|
|
|
|
} SMBIOS_TABLE_TYPE15;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Physical Memory Array - Location
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryArrayLocationOther = 0x01,
|
|
|
|
MemoryArrayLocationUnknown = 0x02,
|
|
|
|
MemoryArrayLocationSystemBoard = 0x03,
|
|
|
|
MemoryArrayLocationIsaAddonCard = 0x04,
|
|
|
|
MemoryArrayLocationEisaAddonCard = 0x05,
|
|
|
|
MemoryArrayLocationPciAddonCard = 0x06,
|
|
|
|
MemoryArrayLocationMcaAddonCard = 0x07,
|
|
|
|
MemoryArrayLocationPcmciaAddonCard = 0x08,
|
|
|
|
MemoryArrayLocationProprietaryAddonCard = 0x09,
|
|
|
|
MemoryArrayLocationNuBus = 0x0A,
|
|
|
|
MemoryArrayLocationPc98C20AddonCard = 0xA0,
|
|
|
|
MemoryArrayLocationPc98C24AddonCard = 0xA1,
|
|
|
|
MemoryArrayLocationPc98EAddonCard = 0xA2,
|
|
|
|
MemoryArrayLocationPc98LocalBusAddonCard = 0xA3
|
|
|
|
} MEMORY_ARRAY_LOCATION;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Physical Memory Array - Use
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryArrayUseOther = 0x01,
|
|
|
|
MemoryArrayUseUnknown = 0x02,
|
|
|
|
MemoryArrayUseSystemMemory = 0x03,
|
|
|
|
MemoryArrayUseVideoMemory = 0x04,
|
|
|
|
MemoryArrayUseFlashMemory = 0x05,
|
|
|
|
MemoryArrayUseNonVolatileRam = 0x06,
|
|
|
|
MemoryArrayUseCacheMemory = 0x07
|
|
|
|
} MEMORY_ARRAY_USE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Physical Memory Array - Error Correction Types
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryErrorCorrectionOther = 0x01,
|
|
|
|
MemoryErrorCorrectionUnknown = 0x02,
|
|
|
|
MemoryErrorCorrectionNone = 0x03,
|
|
|
|
MemoryErrorCorrectionParity = 0x04,
|
|
|
|
MemoryErrorCorrectionSingleBitEcc = 0x05,
|
|
|
|
MemoryErrorCorrectionMultiBitEcc = 0x06,
|
|
|
|
MemoryErrorCorrectionCrc = 0x07
|
|
|
|
} MEMORY_ERROR_CORRECTION;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Physical Memory Array (Type 16)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes a collection of memory devices that operate
|
|
|
|
/// together to form a memory address space.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 Location; ///< enumeration value from MEMORY_ARRAY_LOCATION
|
|
|
|
UINT8 Use; ///< enumeration value from MEMORY_ARRAY_USE
|
|
|
|
UINT8 MemoryErrorCorrection; ///< enumeration value from MEMORY_ERROR_CORRECTION
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT32 MaximumCapacity;
|
|
|
|
UINT16 MemoryErrorInformationHandle;
|
|
|
|
UINT16 NumberOfMemoryDevices;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE16;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Memory Device - Form Factor
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryFormFactorOther = 0x01,
|
|
|
|
MemoryFormFactorUnknown = 0x02,
|
|
|
|
MemoryFormFactorSimm = 0x03,
|
|
|
|
MemoryFormFactorSip = 0x04,
|
|
|
|
MemoryFormFactorChip = 0x05,
|
|
|
|
MemoryFormFactorDip = 0x06,
|
|
|
|
MemoryFormFactorZip = 0x07,
|
|
|
|
MemoryFormFactorProprietaryCard = 0x08,
|
|
|
|
MemoryFormFactorDimm = 0x09,
|
|
|
|
MemoryFormFactorTsop = 0x0A,
|
|
|
|
MemoryFormFactorRowOfChips = 0x0B,
|
|
|
|
MemoryFormFactorRimm = 0x0C,
|
|
|
|
MemoryFormFactorSodimm = 0x0D,
|
|
|
|
MemoryFormFactorSrimm = 0x0E,
|
|
|
|
MemoryFormFactorFbDimm = 0x0F
|
|
|
|
} MEMORY_FORM_FACTOR;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Memory Device - Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryTypeOther = 0x01,
|
|
|
|
MemoryTypeUnknown = 0x02,
|
|
|
|
MemoryTypeDram = 0x03,
|
|
|
|
MemoryTypeEdram = 0x04,
|
|
|
|
MemoryTypeVram = 0x05,
|
|
|
|
MemoryTypeSram = 0x06,
|
|
|
|
MemoryTypeRam = 0x07,
|
|
|
|
MemoryTypeRom = 0x08,
|
|
|
|
MemoryTypeFlash = 0x09,
|
|
|
|
MemoryTypeEeprom = 0x0A,
|
|
|
|
MemoryTypeFeprom = 0x0B,
|
|
|
|
MemoryTypeEprom = 0x0C,
|
|
|
|
MemoryTypeCdram = 0x0D,
|
|
|
|
MemoryType3Dram = 0x0E,
|
|
|
|
MemoryTypeSdram = 0x0F,
|
|
|
|
MemoryTypeSgram = 0x10,
|
|
|
|
MemoryTypeRdram = 0x11,
|
|
|
|
MemoryTypeDdr = 0x12,
|
|
|
|
MemoryTypeDdr2 = 0x13,
|
|
|
|
MemoryTypeDdr2FbDimm = 0x14
|
|
|
|
} MEMORY_DEVICE_TYPE;
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
UINT16 Reserved :1;
|
|
|
|
UINT16 Other :1;
|
|
|
|
UINT16 Unknown :1;
|
|
|
|
UINT16 FastPaged :1;
|
|
|
|
UINT16 StaticColumn :1;
|
|
|
|
UINT16 PseudoStatic :1;
|
|
|
|
UINT16 Rambus :1;
|
|
|
|
UINT16 Synchronous :1;
|
|
|
|
UINT16 Cmos :1;
|
|
|
|
UINT16 Edo :1;
|
|
|
|
UINT16 WindowDram :1;
|
|
|
|
UINT16 CacheDram :1;
|
|
|
|
UINT16 Nonvolatile :1;
|
|
|
|
UINT16 Reserved1 :3;
|
|
|
|
} MEMORY_DEVICE_TYPE_DETAIL;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Memory Device (Type 17)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes a single memory device that is part of
|
|
|
|
/// a larger Physical Memory Array (Type 16).
|
|
|
|
/// Note: If a system includes memory-device sockets, the SMBIOS implementation
|
|
|
|
/// includes a Memory Device structure instance for each slot whether or not the
|
|
|
|
/// socket is currently populated.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT16 MemoryArrayHandle;
|
|
|
|
UINT16 MemoryErrorInformationHandle;
|
|
|
|
UINT16 TotalWidth;
|
|
|
|
UINT16 DataWidth;
|
|
|
|
UINT16 Size;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 FormFactor; ///< enumeration value from MEMORY_FORM_FACTOR
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT8 DeviceSet;
|
|
|
|
SMBIOS_TABLE_STRING DeviceLocator;
|
|
|
|
SMBIOS_TABLE_STRING BankLocator;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 MemoryType; ///< enumeration value from MEMORY_DEVICE_TYPE
|
2009-04-20 08:40:49 +02:00
|
|
|
MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
|
|
|
|
UINT16 Speed;
|
|
|
|
SMBIOS_TABLE_STRING Manufacturer;
|
|
|
|
SMBIOS_TABLE_STRING SerialNumber;
|
|
|
|
SMBIOS_TABLE_STRING AssetTag;
|
|
|
|
SMBIOS_TABLE_STRING PartNumber;
|
2007-12-21 08:19:54 +01:00
|
|
|
//
|
|
|
|
// Add for smbios 2.6
|
|
|
|
//
|
|
|
|
UINT8 Attributes;
|
|
|
|
} SMBIOS_TABLE_TYPE17;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// 32-bit Memory Error Information - Error Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryErrorOther = 0x01,
|
|
|
|
MemoryErrorUnknown = 0x02,
|
|
|
|
MemoryErrorOk = 0x03,
|
|
|
|
MemoryErrorBadRead = 0x04,
|
|
|
|
MemoryErrorParity = 0x05,
|
|
|
|
MemoryErrorSigleBit = 0x06,
|
|
|
|
MemoryErrorDoubleBit = 0x07,
|
|
|
|
MemoryErrorMultiBit = 0x08,
|
|
|
|
MemoryErrorNibble = 0x09,
|
|
|
|
MemoryErrorChecksum = 0x0A,
|
|
|
|
MemoryErrorCrc = 0x0B,
|
|
|
|
MemoryErrorCorrectSingleBit = 0x0C,
|
|
|
|
MemoryErrorCorrected = 0x0D,
|
|
|
|
MemoryErrorUnCorrectable = 0x0E
|
|
|
|
} MEMORY_ERROR_TYPE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// 32-bit Memory Error Information - Error Granularity
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryGranularityOther = 0x01,
|
|
|
|
MemoryGranularityOtherUnknown = 0x02,
|
|
|
|
MemoryGranularityDeviceLevel = 0x03,
|
|
|
|
MemoryGranularityMemPartitionLevel = 0x04
|
|
|
|
} MEMORY_ERROR_GRANULARITY;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// 32-bit Memory Error Information - Error Operation
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryErrorOperationOther = 0x01,
|
|
|
|
MemoryErrorOperationUnknown = 0x02,
|
|
|
|
MemoryErrorOperationRead = 0x03,
|
|
|
|
MemoryErrorOperationWrite = 0x04,
|
|
|
|
MemoryErrorOperationPartialWrite = 0x05
|
|
|
|
} MEMORY_ERROR_OPERATION;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// 32-bit Memory Error Information (Type 18)
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// This structure identifies the specifics of an error that might be detected
|
|
|
|
/// within a Physical Memory Array.
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 ErrorType; ///< enumeration value from MEMORY_ERROR_TYPE
|
|
|
|
UINT8 ErrorGranularity; ///< enumeration value from MEMORY_ERROR_GRANULARITY
|
|
|
|
UINT8 ErrorOperation; ///< enumeration value from MEMORY_ERROR_OPERATION
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT32 VendorSyndrome;
|
|
|
|
UINT32 MemoryArrayErrorAddress;
|
|
|
|
UINT32 DeviceErrorAddress;
|
|
|
|
UINT32 ErrorResolution;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE18;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Memory Array Mapped Address (Type 19)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure provides the address mapping for a Physical Memory Array.
|
|
|
|
/// One structure is present for each contiguous address range described.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT32 StartingAddress;
|
|
|
|
UINT32 EndingAddress;
|
|
|
|
UINT16 MemoryArrayHandle;
|
|
|
|
UINT8 PartitionWidth;
|
|
|
|
} SMBIOS_TABLE_TYPE19;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Memory Device Mapped Address (Type 20)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure maps memory address space usually to a device-level granularity.
|
|
|
|
/// One structure is present for each contiguous address range described.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT32 StartingAddress;
|
|
|
|
UINT32 EndingAddress;
|
|
|
|
UINT16 MemoryDeviceHandle;
|
|
|
|
UINT16 MemoryArrayMappedAddressHandle;
|
|
|
|
UINT8 PartitionRowPosition;
|
|
|
|
UINT8 InterleavePosition;
|
|
|
|
UINT8 InterleavedDataDepth;
|
|
|
|
} SMBIOS_TABLE_TYPE20;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Built-in Pointing Device - Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
PointingDeviceTypeOther = 0x01,
|
|
|
|
PointingDeviceTypeUnknown = 0x02,
|
|
|
|
PointingDeviceTypeMouse = 0x03,
|
|
|
|
PointingDeviceTypeTrackBall = 0x04,
|
|
|
|
PointingDeviceTypeTrackPoint = 0x05,
|
|
|
|
PointingDeviceTypeGlidePoint = 0x06,
|
|
|
|
PointingDeviceTouchPad = 0x07,
|
|
|
|
PointingDeviceTouchScreen = 0x08,
|
|
|
|
PointingDeviceOpticalSensor = 0x09
|
|
|
|
} BUILTIN_POINTING_DEVICE_TYPE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Built-in Pointing Device - Interface
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
PointingDeviceInterfaceOther = 0x01,
|
|
|
|
PointingDeviceInterfaceUnknown = 0x02,
|
|
|
|
PointingDeviceInterfaceSerial = 0x03,
|
|
|
|
PointingDeviceInterfacePs2 = 0x04,
|
|
|
|
PointingDeviceInterfaceInfrared = 0x05,
|
|
|
|
PointingDeviceInterfaceHpHil = 0x06,
|
|
|
|
PointingDeviceInterfaceBusMouse = 0x07,
|
|
|
|
PointingDeviceInterfaceADB = 0x08,
|
|
|
|
PointingDeviceInterfaceBusMouseDB9 = 0xA0,
|
|
|
|
PointingDeviceInterfaceBusMouseMicroDin = 0xA1,
|
|
|
|
PointingDeviceInterfaceUsb = 0xA2
|
|
|
|
} BUILTIN_POINTING_DEVICE_INTERFACE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Built-in Pointing Device (Type 21)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes the attributes of the built-in pointing device for the
|
2009-04-20 09:01:56 +02:00
|
|
|
/// system - the presence of this structure does not imply that the built-in
|
2009-04-20 08:40:49 +02:00
|
|
|
/// pointing device is active for the system's use!
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 Type; ///< enumeration value from BUILTIN_POINTING_DEVICE_TYPE
|
|
|
|
UINT8 Interface; ///< enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT8 NumberOfButtons;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE21;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Portable Battery - Device Chemistry
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
PortableBatteryDeviceChemistryOther = 0x01,
|
|
|
|
PortableBatteryDeviceChemistryUnknown = 0x02,
|
|
|
|
PortableBatteryDeviceChemistryLeadAcid = 0x03,
|
|
|
|
PortableBatteryDeviceChemistryNickelCadmium = 0x04,
|
|
|
|
PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,
|
|
|
|
PortableBatteryDeviceChemistryLithiumIon = 0x06,
|
|
|
|
PortableBatteryDeviceChemistryZincAir = 0x07,
|
|
|
|
PortableBatteryDeviceChemistryLithiumPolymer = 0x08
|
|
|
|
} PORTABLE_BATTERY_DEVICE_CHEMISTRY;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Portable Battery (Type 22)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes the attributes of the portable battery(s) for the system.
|
|
|
|
/// The structure contains the static attributes for the group. Each structure describes
|
2009-04-20 09:01:56 +02:00
|
|
|
/// a single battery pack's attributes.
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING Location;
|
|
|
|
SMBIOS_TABLE_STRING Manufacturer;
|
|
|
|
SMBIOS_TABLE_STRING ManufactureDate;
|
|
|
|
SMBIOS_TABLE_STRING SerialNumber;
|
|
|
|
SMBIOS_TABLE_STRING DeviceName;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 DeviceChemistry; ///< enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT16 DeviceCapacity;
|
|
|
|
UINT16 DesignVoltage;
|
|
|
|
SMBIOS_TABLE_STRING SBDSVersionNumber;
|
|
|
|
UINT8 MaximumErrorInBatteryData;
|
|
|
|
UINT16 SBDSSerialNumber;
|
|
|
|
UINT16 SBDSManufactureDate;
|
|
|
|
SMBIOS_TABLE_STRING SBDSDeviceChemistry;
|
|
|
|
UINT8 DesignCapacityMultiplier;
|
|
|
|
UINT32 OEMSpecific;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE22;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// System Reset (Type 23)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes whether Automatic System Reset functions enabled (Status).
|
|
|
|
/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)
|
|
|
|
/// before the Interval elapses, an automatic system reset will occur. The system will re-boot
|
|
|
|
/// according to the Boot Option. This function may repeat until the Limit is reached, at which time
|
|
|
|
/// the system will re-boot according to the Boot Option at Limit.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 Capabilities;
|
|
|
|
UINT16 ResetCount;
|
|
|
|
UINT16 ResetLimit;
|
|
|
|
UINT16 TimerInterval;
|
|
|
|
UINT16 Timeout;
|
|
|
|
} SMBIOS_TABLE_TYPE23;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Hardware Security (Type 24)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes the system-wide hardware security settings.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 HardwareSecuritySettings;
|
|
|
|
} SMBIOS_TABLE_TYPE24;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// System Power Controls (Type 25)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes the attributes for controlling the main power supply to the system.
|
|
|
|
/// Software that interprets this structure uses the month, day, hour, minute, and second values
|
|
|
|
/// to determine the number of seconds until the next power-on of the system. The presence of
|
|
|
|
/// this structure implies that a timed power-on facility is available for the system.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 NextScheduledPowerOnMonth;
|
|
|
|
UINT8 NextScheduledPowerOnDayOfMonth;
|
|
|
|
UINT8 NextScheduledPowerOnHour;
|
|
|
|
UINT8 NextScheduledPowerOnMinute;
|
|
|
|
UINT8 NextScheduledPowerOnSecond;
|
|
|
|
} SMBIOS_TABLE_TYPE25;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Voltage Probe - Location and Status
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT8 VoltageProbeSite :5;
|
|
|
|
UINT8 VoltageProbeStatus :3;
|
|
|
|
} MISC_VOLTAGE_PROBE_LOCATION;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Voltage Probe (Type 26)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This describes the attributes for a voltage probe in the system.
|
|
|
|
/// Each structure describes a single voltage probe.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING Description;
|
|
|
|
MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;
|
|
|
|
UINT16 MaximumValue;
|
|
|
|
UINT16 MinimumValue;
|
|
|
|
UINT16 Resolution;
|
|
|
|
UINT16 Tolerance;
|
|
|
|
UINT16 Accuracy;
|
|
|
|
UINT32 OEMDefined;
|
|
|
|
UINT16 NominalValue;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE26;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Cooling Device - Device Type and Status
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT8 CoolingDevice :5;
|
|
|
|
UINT8 CoolingDeviceStatus :3;
|
|
|
|
} MISC_COOLING_DEVICE_TYPE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Cooling Device (Type 27)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes the attributes for a cooling device in the system.
|
|
|
|
/// Each structure describes a single cooling device.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT16 TemperatureProbeHandle;
|
|
|
|
MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;
|
|
|
|
UINT8 CoolingUnitGroup;
|
|
|
|
UINT32 OEMDefined;
|
|
|
|
UINT16 NominalSpeed;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE27;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Temperature Probe - Location and Status
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT8 TemperatureProbeSite :5;
|
|
|
|
UINT8 TemperatureProbeStatus :3;
|
|
|
|
} MISC_TEMPERATURE_PROBE_LOCATION;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Temperature Probe (Type 28)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes the attributes for a temperature probe in the system.
|
|
|
|
/// Each structure describes a single temperature probe.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING Description;
|
|
|
|
MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;
|
|
|
|
UINT16 MaximumValue;
|
|
|
|
UINT16 MinimumValue;
|
|
|
|
UINT16 Resolution;
|
|
|
|
UINT16 Tolerance;
|
|
|
|
UINT16 Accuracy;
|
|
|
|
UINT32 OEMDefined;
|
|
|
|
UINT16 NominalValue;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE28;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Electrical Current Probe - Location and Status
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT8 ElectricalCurrentProbeSite :5;
|
|
|
|
UINT8 ElectricalCurrentProbeStatus :3;
|
|
|
|
} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Electrical Current Probe (Type 29)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes the attributes for an electrical current probe in the system.
|
|
|
|
/// Each structure describes a single electrical current probe.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING Description;
|
|
|
|
MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;
|
|
|
|
UINT16 MaximumValue;
|
|
|
|
UINT16 MinimumValue;
|
|
|
|
UINT16 Resolution;
|
|
|
|
UINT16 Tolerance;
|
|
|
|
UINT16 Accuracy;
|
|
|
|
UINT32 OEMDefined;
|
|
|
|
UINT16 NominalValue;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE29;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Out-of-Band Remote Access (Type 30)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes the attributes and policy settings of a hardware facility
|
|
|
|
/// that may be used to gain remote access to a hardware system when the operating system
|
|
|
|
/// is not available due to power-down status, hardware failures, or boot failures.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING ManufacturerName;
|
|
|
|
UINT8 Connections;
|
|
|
|
} SMBIOS_TABLE_TYPE30;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Boot Integrity Services (BIS) Entry Point (Type 31)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 Checksum;
|
|
|
|
UINT8 Reserved1;
|
|
|
|
UINT16 Reserved2;
|
|
|
|
UINT32 BisEntry16;
|
|
|
|
UINT32 BisEntry32;
|
|
|
|
UINT64 Reserved3;
|
|
|
|
UINT32 Reserved4;
|
|
|
|
} SMBIOS_TABLE_TYPE31;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// System Boot Information - System Boot Status
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
BootInformationStatusNoError = 0x00,
|
|
|
|
BootInformationStatusNoBootableMedia = 0x01,
|
|
|
|
BootInformationStatusNormalOSFailedLoading = 0x02,
|
|
|
|
BootInformationStatusFirmwareDetectedFailure = 0x03,
|
|
|
|
BootInformationStatusOSDetectedFailure = 0x04,
|
|
|
|
BootInformationStatusUserRequestedBoot = 0x05,
|
|
|
|
BootInformationStatusSystemSecurityViolation = 0x06,
|
|
|
|
BootInformationStatusPreviousRequestedImage = 0x07,
|
|
|
|
BootInformationStatusWatchdogTimerExpired = 0x08,
|
|
|
|
BootInformationStatusStartReserved = 0x09,
|
|
|
|
BootInformationStatusStartOemSpecific = 0x80,
|
|
|
|
BootInformationStatusStartProductSpecific = 0xC0
|
|
|
|
} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// System Boot Information (Type 32)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the
|
|
|
|
/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management
|
|
|
|
/// application via this structure. When used in the PXE environment, for example,
|
|
|
|
/// this code identifies the reason the PXE was initiated and can be used by boot-image
|
2009-04-20 09:01:56 +02:00
|
|
|
/// software to further automate an enterprise's PXE sessions. For example, an enterprise
|
2009-04-20 08:40:49 +02:00
|
|
|
/// could choose to automatically download a hardware-diagnostic image to a client whose
|
|
|
|
/// reason code indicated either a firmware- or operating system-detected hardware failure.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 Reserved[6];
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 BootStatus; ///< enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE32;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// 64-bit Memory Error Information (Type 33)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure describes an error within a Physical Memory Array,
|
|
|
|
/// when the error address is above 4G (0xFFFFFFFF).
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 ErrorType; ///< enumeration value from MEMORY_ERROR_TYPE
|
|
|
|
UINT8 ErrorGranularity; ///< enumeration value from MEMORY_ERROR_GRANULARITY
|
|
|
|
UINT8 ErrorOperation; ///< enumeration value from MEMORY_ERROR_OPERATION
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT32 VendorSyndrome;
|
|
|
|
UINT64 MemoryArrayErrorAddress;
|
|
|
|
UINT64 DeviceErrorAddress;
|
|
|
|
UINT32 ErrorResolution;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE33;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Management Device - Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
ManagementDeviceTypeOther = 0x01,
|
|
|
|
ManagementDeviceTypeUnknown = 0x02,
|
|
|
|
ManagementDeviceTypeLm75 = 0x03,
|
|
|
|
ManagementDeviceTypeLm78 = 0x04,
|
|
|
|
ManagementDeviceTypeLm79 = 0x05,
|
|
|
|
ManagementDeviceTypeLm80 = 0x06,
|
|
|
|
ManagementDeviceTypeLm81 = 0x07,
|
|
|
|
ManagementDeviceTypeAdm9240 = 0x08,
|
|
|
|
ManagementDeviceTypeDs1780 = 0x09,
|
|
|
|
ManagementDeviceTypeMaxim1617 = 0x0A,
|
|
|
|
ManagementDeviceTypeGl518Sm = 0x0B,
|
|
|
|
ManagementDeviceTypeW83781D = 0x0C,
|
|
|
|
ManagementDeviceTypeHt82H791 = 0x0D
|
|
|
|
} MISC_MANAGEMENT_DEVICE_TYPE;
|
|
|
|
|
|
|
|
///
|
|
|
|
/// Management Device - Address Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
ManagementDeviceAddressTypeOther = 0x01,
|
|
|
|
ManagementDeviceAddressTypeUnknown = 0x02,
|
|
|
|
ManagementDeviceAddressTypeIOPort = 0x03,
|
|
|
|
ManagementDeviceAddressTypeMemory = 0x04,
|
|
|
|
ManagementDeviceAddressTypeSmbus = 0x05
|
|
|
|
} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Management Device (Type 34)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The information in this structure defines the attributes of a Management Device.
|
|
|
|
/// A Management Device might control one or more fans or voltage, current, or temperature
|
|
|
|
/// probes as defined by one or more Management Device Component structures.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING Description;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 Type; ///< enumeration value from MISC_MANAGEMENT_DEVICE_TYPE
|
2009-04-20 08:40:49 +02:00
|
|
|
UINT32 Address;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 AddressType; ///< enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE34;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Management Device Component (Type 35)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure associates a cooling device or environmental probe with structures
|
|
|
|
/// that define the controlling hardware device and (optionally) the component's thresholds.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
SMBIOS_TABLE_STRING Description;
|
|
|
|
UINT16 ManagementDeviceHandle;
|
|
|
|
UINT16 ComponentHandle;
|
|
|
|
UINT16 ThresholdHandle;
|
|
|
|
} SMBIOS_TABLE_TYPE35;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Management Device Threshold Data (Type 36)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The information in this structure defines threshold information for
|
|
|
|
/// a component (probe or cooling-unit) contained within a Management Device.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT16 LowerThresholdNonCritical;
|
|
|
|
UINT16 UpperThresholdNonCritical;
|
|
|
|
UINT16 LowerThresholdCritical;
|
|
|
|
UINT16 UpperThresholdCritical;
|
|
|
|
UINT16 LowerThresholdNonRecoverable;
|
|
|
|
UINT16 UpperThresholdNonRecoverable;
|
|
|
|
} SMBIOS_TABLE_TYPE36;
|
|
|
|
|
2008-12-08 07:59:18 +01:00
|
|
|
///
|
|
|
|
/// Memory Channel Entry
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
UINT8 DeviceLoad;
|
|
|
|
UINT16 DeviceHandle;
|
|
|
|
} MEMORY_DEVICE;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Memory Channel - Channel Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
MemoryChannelTypeOther = 0x01,
|
|
|
|
MemoryChannelTypeUnknown = 0x02,
|
|
|
|
MemoryChannelTypeRambus = 0x03,
|
|
|
|
MemoryChannelTypeSyncLink = 0x04
|
|
|
|
} MEMORY_CHANNEL_TYPE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Memory Channel (Type 37)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The information in this structure provides the correlation between a Memory Channel
|
|
|
|
/// and its associated Memory Devices. Each device presents one or more loads to the channel;
|
|
|
|
/// the sum of all device loads cannot exceed the channel's defined maximum.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 ChannelType;
|
|
|
|
UINT8 MaximumChannelLoad;
|
|
|
|
UINT8 MemoryDeviceCount;
|
|
|
|
MEMORY_DEVICE MemoryDevice[1];
|
|
|
|
} SMBIOS_TABLE_TYPE37;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// IPMI Device Information - BMC Interface Type
|
|
|
|
///
|
|
|
|
typedef enum {
|
|
|
|
IPMIDeviceInfoInterfaceTypeUnknown = 0x00,
|
2009-04-20 09:15:14 +02:00
|
|
|
IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< Keyboard Controller Style
|
|
|
|
IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< Server Management Interface Chip
|
|
|
|
IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< Block Transfer
|
2009-04-20 08:40:49 +02:00
|
|
|
IPMIDeviceInfoInterfaceTypeReserved = 0x04
|
|
|
|
} BMC_INTERFACE_TYPE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// IPMI Device Information (Type 38)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// The information in this structure defines the attributes of an
|
|
|
|
/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
2009-06-21 15:56:26 +02:00
|
|
|
UINT8 InterfaceType; ///< enumeration value from BMC_INTERFACE_TYPE
|
2007-12-21 08:19:54 +01:00
|
|
|
UINT8 IPMISpecificationRevision;
|
|
|
|
UINT8 I2CSlaveAddress;
|
|
|
|
UINT8 NVStorageDeviceAddress;
|
|
|
|
UINT64 BaseAddress;
|
|
|
|
UINT8 BaseAddressModifier_InterruptInfo;
|
|
|
|
UINT8 InterruptNumber;
|
|
|
|
} SMBIOS_TABLE_TYPE38;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// System Power Supply - Power Supply Characteristics
|
|
|
|
///
|
|
|
|
typedef struct {
|
|
|
|
UINT16 PowerSupplyHotReplaceable:1;
|
|
|
|
UINT16 PowerSupplyPresent :1;
|
|
|
|
UINT16 PowerSupplyUnplugged :1;
|
|
|
|
UINT16 InputVoltageRangeSwitch :4;
|
|
|
|
UINT16 PowerSupplyStatus :3;
|
|
|
|
UINT16 PowerSupplyType :4;
|
|
|
|
UINT16 Reserved :2;
|
|
|
|
} SYS_POWER_SUPPLY_CHARACTERISTICS;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// System Power Supply (Type 39)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure identifies attributes of a system power supply. One instance
|
|
|
|
/// of this record is present for each possible power supply in a system.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
2009-04-20 08:40:49 +02:00
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 PowerUnitGroup;
|
|
|
|
SMBIOS_TABLE_STRING Location;
|
|
|
|
SMBIOS_TABLE_STRING DeviceName;
|
|
|
|
SMBIOS_TABLE_STRING Manufacturer;
|
|
|
|
SMBIOS_TABLE_STRING SerialNumber;
|
|
|
|
SMBIOS_TABLE_STRING AssetTagNumber;
|
|
|
|
SMBIOS_TABLE_STRING ModelPartNumber;
|
|
|
|
SMBIOS_TABLE_STRING RevisionLevel;
|
|
|
|
UINT16 MaxPowerCapacity;
|
|
|
|
SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
|
|
|
|
UINT16 InputVoltageProbeHandle;
|
|
|
|
UINT16 CoolingDeviceHandle;
|
|
|
|
UINT16 InputCurrentProbeHandle;
|
2007-12-21 08:19:54 +01:00
|
|
|
} SMBIOS_TABLE_TYPE39;
|
|
|
|
|
2008-12-08 07:59:18 +01:00
|
|
|
///
|
|
|
|
/// Additional Information Entry Format
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
UINT8 EntryLength;
|
|
|
|
UINT16 ReferencedHandle;
|
|
|
|
UINT8 ReferencedOffset;
|
|
|
|
SMBIOS_TABLE_STRING EntryString;
|
|
|
|
UINT8 Value[1];
|
|
|
|
}ADDITIONAL_INFORMATION_ENTRY;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Additional Information (Type 40)
|
|
|
|
///
|
2009-04-20 08:40:49 +02:00
|
|
|
/// This structure is intended to provide additional information for handling unspecified
|
|
|
|
/// enumerated values and interim field updates in another structure.
|
|
|
|
///
|
2007-12-21 08:19:54 +01:00
|
|
|
typedef struct {
|
|
|
|
SMBIOS_STRUCTURE Hdr;
|
|
|
|
UINT8 NumberOfAdditionalInformationEntries;
|
|
|
|
ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];
|
|
|
|
} SMBIOS_TABLE_TYPE40;
|
|
|
|
|
2009-04-20 08:40:49 +02:00
|
|
|
///
|
|
|
|
/// Onboard Devices Extended Information - Onboard Device Types
|
|
|
|
///
|
|
|
|
typedef enum{
|
|
|
|
OnBoardDeviceExtendedTypeOther = 0x01,
|
|
|
|
OnBoardDeviceExtendedTypeUnknown = 0x02,
|
|
|
|
OnBoardDeviceExtendedTypeVideo = 0x03,
|
|
|
|
OnBoardDeviceExtendedTypeScsiController = 0x04,
|
|
|
|
OnBoardDeviceExtendedTypeEthernet = 0x05,
|
|
|
|
OnBoardDeviceExtendedTypeTokenRing = 0x06,
|
|
|
|
OnBoardDeviceExtendedTypeSound = 0x07,
|
|
|
|
OnBoardDeviceExtendedTypePATAController = 0x08,
|
|
|
|
OnBoardDeviceExtendedTypeSATAController = 0x09,
|
|
|
|
OnBoardDeviceExtendedTypeSASController = 0x0A
|
|
|
|
} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;
|
|
|
|
|
2008-10-20 17:16:32 +02:00
|
|
|
///
|
|
|
|
/// Onboard Devices Extended Information (Type 41)
|
|
|
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///
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2009-04-20 08:40:49 +02:00
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/// The information in this structure defines the attributes of devices that
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/// are onboard (soldered onto) a system element, usually the baseboard.
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/// In general, an entry in this table implies that the BIOS has some level of
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/// control over the enabling of the associated device for use by the system.
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///
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2007-12-21 08:19:54 +01:00
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typedef struct {
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2009-04-20 08:40:49 +02:00
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SMBIOS_STRUCTURE Hdr;
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SMBIOS_TABLE_STRING ReferenceDesignation;
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2009-06-21 15:56:26 +02:00
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UINT8 DeviceType; ///< enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE
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2009-04-20 08:40:49 +02:00
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UINT8 DeviceTypeInstance;
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UINT16 SegmentGroupNum;
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UINT8 BusNum;
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UINT8 DevFuncNum;
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2007-12-21 08:19:54 +01:00
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} SMBIOS_TABLE_TYPE41;
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2008-10-20 17:16:32 +02:00
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///
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/// Inactive (Type 126)
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///
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2007-12-21 08:19:54 +01:00
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typedef struct {
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SMBIOS_STRUCTURE Hdr;
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} SMBIOS_TABLE_TYPE126;
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2008-10-20 17:16:32 +02:00
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///
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/// End-of-Table (Type 127)
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///
|
2007-12-21 08:19:54 +01:00
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typedef struct {
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SMBIOS_STRUCTURE Hdr;
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} SMBIOS_TABLE_TYPE127;
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|
2008-10-20 17:16:32 +02:00
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///
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/// Union of all the possible SMBIOS record types
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///
|
2007-12-21 08:19:54 +01:00
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typedef union {
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SMBIOS_STRUCTURE *Hdr;
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SMBIOS_TABLE_TYPE0 *Type0;
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SMBIOS_TABLE_TYPE1 *Type1;
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SMBIOS_TABLE_TYPE2 *Type2;
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SMBIOS_TABLE_TYPE3 *Type3;
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SMBIOS_TABLE_TYPE4 *Type4;
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SMBIOS_TABLE_TYPE5 *Type5;
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SMBIOS_TABLE_TYPE6 *Type6;
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SMBIOS_TABLE_TYPE7 *Type7;
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SMBIOS_TABLE_TYPE8 *Type8;
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SMBIOS_TABLE_TYPE9 *Type9;
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SMBIOS_TABLE_TYPE10 *Type10;
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SMBIOS_TABLE_TYPE11 *Type11;
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SMBIOS_TABLE_TYPE12 *Type12;
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SMBIOS_TABLE_TYPE13 *Type13;
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SMBIOS_TABLE_TYPE14 *Type14;
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SMBIOS_TABLE_TYPE15 *Type15;
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SMBIOS_TABLE_TYPE16 *Type16;
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SMBIOS_TABLE_TYPE17 *Type17;
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SMBIOS_TABLE_TYPE18 *Type18;
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SMBIOS_TABLE_TYPE19 *Type19;
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SMBIOS_TABLE_TYPE20 *Type20;
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SMBIOS_TABLE_TYPE21 *Type21;
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SMBIOS_TABLE_TYPE22 *Type22;
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SMBIOS_TABLE_TYPE23 *Type23;
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SMBIOS_TABLE_TYPE24 *Type24;
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SMBIOS_TABLE_TYPE25 *Type25;
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SMBIOS_TABLE_TYPE26 *Type26;
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SMBIOS_TABLE_TYPE27 *Type27;
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SMBIOS_TABLE_TYPE28 *Type28;
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|
SMBIOS_TABLE_TYPE29 *Type29;
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|
SMBIOS_TABLE_TYPE30 *Type30;
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|
|
SMBIOS_TABLE_TYPE31 *Type31;
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|
|
SMBIOS_TABLE_TYPE32 *Type32;
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|
|
SMBIOS_TABLE_TYPE33 *Type33;
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|
|
SMBIOS_TABLE_TYPE34 *Type34;
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|
|
SMBIOS_TABLE_TYPE35 *Type35;
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|
SMBIOS_TABLE_TYPE36 *Type36;
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|
|
SMBIOS_TABLE_TYPE37 *Type37;
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|
|
SMBIOS_TABLE_TYPE38 *Type38;
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|
SMBIOS_TABLE_TYPE39 *Type39;
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|
|
SMBIOS_TABLE_TYPE40 *Type40;
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|
|
SMBIOS_TABLE_TYPE41 *Type41;
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|
|
SMBIOS_TABLE_TYPE126 *Type126;
|
|
|
|
SMBIOS_TABLE_TYPE127 *Type127;
|
|
|
|
UINT8 *Raw;
|
|
|
|
} SMBIOS_STRUCTURE_POINTER;
|
|
|
|
|
2008-11-11 23:21:08 +01:00
|
|
|
#pragma pack()
|
|
|
|
|
2007-06-19 12:39:04 +02:00
|
|
|
#endif
|