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OvmfPkg: add and use industry standard macro PIIX4_PMBA_MASK 

We already have the identical purpose (but different value) macro for
ICH9, namely ICH9_PMBASE_MASK in
"OvmfPkg/Include/IndustryStandard/Q35MchIch9.h".

Also, stop bit-negating signed integer constants.

Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
This commit is contained in:
Laszlo Ersek 2016-05-09 20:05:18 +02:00
parent b2f4da3956
commit 07d3ba0770
4 changed files with 5 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
View File

@ -33,6 +33,8 @@
#define POWER_MGMT_REGISTER_PIIX4(Offset) PCI_LIB_ADDRESS (0, 1, 3, (Offset)) #define POWER_MGMT_REGISTER_PIIX4(Offset) PCI_LIB_ADDRESS (0, 1, 3, (Offset))
#define PIIX4_PMBA 0x40 #define PIIX4_PMBA 0x40
#define PIIX4_PMBA_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \
BIT10 | BIT9 | BIT8 | BIT7 | BIT6)
#define PIIX4_PMREGMISC 0x80 #define PIIX4_PMREGMISC 0x80
#define PIIX4_PMREGMISC_PMIOSE BIT0 #define PIIX4_PMREGMISC_PMIOSE BIT0

2
OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
View File

@ -70,7 +70,7 @@ AcpiTimerLibConstructor (
// If the Power Management Base Address is not programmed, // If the Power Management Base Address is not programmed,
// then program it now. // then program it now.
// //
PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE); PciAndThenOr32 (Pmba, ~(UINT32)PIIX4_PMBA_MASK, PIIX4_PMBA_VALUE);
// //
// Enable PMBA I/O port decodes // Enable PMBA I/O port decodes

2
OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
View File

@ -68,7 +68,7 @@ AcpiTimerLibConstructor (
// If the Power Management Base Address is not programmed, // If the Power Management Base Address is not programmed,
// then program it now. // then program it now.
// //
PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE); PciAndThenOr32 (Pmba, ~(UINT32)PIIX4_PMBA_MASK, PIIX4_PMBA_VALUE);
// //
// Enable PMBA I/O port decodes // Enable PMBA I/O port decodes

2
OvmfPkg/PlatformPei/Platform.c
View File

@ -412,7 +412,7 @@ MiscInitialization (
// The PEI phase should be exited with fully accessibe ACPI PM IO space: // The PEI phase should be exited with fully accessibe ACPI PM IO space:
// 1. set PMBA // 1. set PMBA
// //
PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE); PciAndThenOr32 (Pmba, ~(UINT32)PIIX4_PMBA_MASK, PIIX4_PMBA_VALUE);
// //
// 2. set PCICMD/IOSE // 2. set PCICMD/IOSE