ArmPkg/ArmCortexA5x: Declared the helper functions to access the CPU Extended Control Register

This register is A5x specific. It is the reason why the code moved from ArmLib
to ArmCpuLib/ArmCortexA5xLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15397 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2014-03-26 19:32:48 +00:00 committed by oliviermartin
parent 52d44f77c2
commit 47d183db53
5 changed files with 88 additions and 14 deletions

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@ -0,0 +1,32 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#------------------------------------------------------------------------------
#include <AsmMacroIoLibV8.h>
.text
.align 3
GCC_ASM_EXPORT (ArmReadCpuExCr)
GCC_ASM_EXPORT (ArmWriteCpuExCr)
ASM_PFX(ArmReadCpuExCr):
mrs x0, S3_1_c15_c2_1
ret
ASM_PFX(ArmWriteCpuExCr):
msr S3_1_c15_c2_1, x0
dsb sy
isb
ret
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

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@ -48,3 +48,27 @@ ArmCpuSetupSmpNonSecure (
) )
{ {
} }
VOID
EFIAPI
ArmSetCpuExCrBit (
IN UINT64 Bits
)
{
UINT64 Value;
Value = ArmReadCpuExCr ();
Value |= Bits;
ArmWriteCpuExCr (Value);
}
VOID
EFIAPI
ArmUnsetCpuExCrBit (
IN UINT64 Bits
)
{
UINT64 Value;
Value = ArmReadCpuExCr ();
Value &= ~Bits;
ArmWriteCpuExCr (Value);
}

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@ -1,5 +1,5 @@
#/* @file #/* @file
# Copyright (c) 2011-2013, ARM Limited. All rights reserved. # Copyright (c) 2011-2014, ARM Limited. All rights reserved.
# #
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
@ -31,5 +31,8 @@
[Sources.common] [Sources.common]
ArmCortexA5xLib.c ArmCortexA5xLib.c
[Sources.AARCH64]
AArch64/ArmCortexA5xHelper.S | GCC
[FixedPcd] [FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz

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@ -1,6 +1,6 @@
/** @file /** @file
Copyright (c) 2012-2013, ARM Limited. All rights reserved. Copyright (c) 2012-2014, ARM Limited. All rights reserved.
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
@ -20,4 +20,31 @@
// //
#define A5X_FEATURE_SMP (1 << 6) #define A5X_FEATURE_SMP (1 << 6)
//
// Helper functions to access CPU Extended Control Register
//
UINT64
EFIAPI
ArmReadCpuExCr (
VOID
);
VOID
EFIAPI
ArmWriteCpuExCr (
IN UINT64 Val
);
VOID
EFIAPI
ArmSetCpuExCrBit (
IN UINT64 Bits
);
VOID
EFIAPI
ArmUnsetCpuExCrBit (
IN UINT64 Bits
);
#endif #endif

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@ -37,8 +37,6 @@ GCC_ASM_EXPORT (ArmWriteScr)
GCC_ASM_EXPORT (ArmWriteMVBar) GCC_ASM_EXPORT (ArmWriteMVBar)
GCC_ASM_EXPORT (ArmCallWFE) GCC_ASM_EXPORT (ArmCallWFE)
GCC_ASM_EXPORT (ArmCallSEV) GCC_ASM_EXPORT (ArmCallSEV)
GCC_ASM_EXPORT (ArmReadCpuExCr)
GCC_ASM_EXPORT (ArmWriteCpuExCr)
GCC_ASM_EXPORT (ArmReadCpuActlr) GCC_ASM_EXPORT (ArmReadCpuActlr)
GCC_ASM_EXPORT (ArmWriteCpuActlr) GCC_ASM_EXPORT (ArmWriteCpuActlr)
@ -200,16 +198,6 @@ ASM_PFX(ArmCallSEV):
sev sev
ret ret
ASM_PFX(ArmReadCpuExCr):
mrs x0, S3_1_c15_c2_1
ret
ASM_PFX(ArmWriteCpuExCr):
msr S3_1_c15_c2_1, x0
dsb sy
isb
ret
ASM_PFX(ArmReadCpuActlr): ASM_PFX(ArmReadCpuActlr):
mrs x0, S3_1_c15_c2_0 mrs x0, S3_1_c15_c2_0
ret ret