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UefiCpuPkg SecCore: Fix operands of different size in bitwise operation

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It is introduced by 9e9ca2100f22be29f1a53129d741f4305ff34a71.

Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Star Zeng 2017-08-02 10:07:31 +08:00
parent 354a75f9ed
commit 59d3fad32e
1 changed files with 1 additions and 1 deletions
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2
UefiCpuPkg/SecCore/SecMain.c
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@ -281,7 +281,7 @@ SecStartupPhase2(
// will be built based on them in PEI phase.
//
SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);
SecCoreData->PeiTemporaryRamSize &= ~0x07;
SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;
} else {
//
// No addition PPI, PpiList directly point to the common PPI list.