mirror of https://github.com/acidanthera/audk.git
PcAtChipsetPkg PciHostBridgeDxe: Fix build warning with GCC
Add default case to switch blocks to remove GCC compiler warning. The default case code path should never be taken. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10592 6f19259b-4bc3-4df7-8a09-765794883524
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@ -914,6 +914,13 @@ RootBridgeIoMemRW (
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case EfiPciWidthUint64:
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MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
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break;
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default:
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//
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// The RootBridgeIoCheckParameter call above will ensure that this
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// path is not taken.
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//
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ASSERT (FALSE);
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break;
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}
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} else {
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switch (OperationWidth) {
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@ -929,6 +936,13 @@ RootBridgeIoMemRW (
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case EfiPciWidthUint64:
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*((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
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break;
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default:
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//
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// The RootBridgeIoCheckParameter call above will ensure that this
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// path is not taken.
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//
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ASSERT (FALSE);
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break;
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}
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}
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}
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@ -989,6 +1003,13 @@ RootBridgeIoIoRW (
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case EfiPciWidthUint32:
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IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
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break;
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default:
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//
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// The RootBridgeIoCheckParameter call above will ensure that this
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// path is not taken.
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//
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ASSERT (FALSE);
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break;
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}
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} else {
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switch (OperationWidth) {
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@ -1001,6 +1022,13 @@ RootBridgeIoIoRW (
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case EfiPciWidthUint32:
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*((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
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break;
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default:
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//
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// The RootBridgeIoCheckParameter call above will ensure that this
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// path is not taken.
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//
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ASSERT (FALSE);
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break;
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}
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}
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}
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@ -1074,6 +1102,13 @@ RootBridgeIoPciRW (
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case EfiPciWidthUint32:
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PciWrite32 (PcieRegAddr, *((UINT32 *)Uint8Buffer));
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break;
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default:
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//
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// The RootBridgeIoCheckParameter call above will ensure that this
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// path is not taken.
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//
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ASSERT (FALSE);
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break;
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}
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} else {
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switch (OperationWidth) {
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@ -1086,6 +1121,13 @@ RootBridgeIoPciRW (
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case EfiPciWidthUint32:
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*((UINT32 *)Uint8Buffer) = PciRead32 (PcieRegAddr);
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break;
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default:
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//
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// The RootBridgeIoCheckParameter call above will ensure that this
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// path is not taken.
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//
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ASSERT (FALSE);
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break;
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}
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}
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}
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