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PcAtChipsetPkg PciHostBridgeDxe: Fix build warning with GCC 

Add default case to switch blocks to remove GCC compiler warning.
The default case code path should never be taken.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10592 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jljusten 2010-06-19 06:08:07 +00:00
parent cac2ab9556
commit daaad2703d
1 changed files with 42 additions and 0 deletions
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42
PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
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@ -914,6 +914,13 @@ RootBridgeIoMemRW (
case EfiPciWidthUint64: case EfiPciWidthUint64:
MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer)); MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
break; break;
default:
//
// The RootBridgeIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
} }
} else { } else {
switch (OperationWidth) { switch (OperationWidth) {
@ -929,6 +936,13 @@ RootBridgeIoMemRW (
case EfiPciWidthUint64: case EfiPciWidthUint64:
*((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address); *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
break; break;
default:
//
// The RootBridgeIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
} }
} }
} }
@ -989,6 +1003,13 @@ RootBridgeIoIoRW (
case EfiPciWidthUint32: case EfiPciWidthUint32:
IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer)); IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
break; break;
default:
//
// The RootBridgeIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
} }
} else { } else {
switch (OperationWidth) { switch (OperationWidth) {
@ -1001,6 +1022,13 @@ RootBridgeIoIoRW (
case EfiPciWidthUint32: case EfiPciWidthUint32:
*((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address); *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
break; break;
default:
//
// The RootBridgeIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
} }
} }
} }
@ -1074,6 +1102,13 @@ RootBridgeIoPciRW (
case EfiPciWidthUint32: case EfiPciWidthUint32:
PciWrite32 (PcieRegAddr, *((UINT32 *)Uint8Buffer)); PciWrite32 (PcieRegAddr, *((UINT32 *)Uint8Buffer));
break; break;
default:
//
// The RootBridgeIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
} }
} else { } else {
switch (OperationWidth) { switch (OperationWidth) {
@ -1086,6 +1121,13 @@ RootBridgeIoPciRW (
case EfiPciWidthUint32: case EfiPciWidthUint32:
*((UINT32 *)Uint8Buffer) = PciRead32 (PcieRegAddr); *((UINT32 *)Uint8Buffer) = PciRead32 (PcieRegAddr);
break; break;
default:
//
// The RootBridgeIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
} }
} }
} }