When booting OvmfXen, the ACPI interface for shutdown/reset might not
be available, instead use the hypercall interface.
While it's probably possible to use the hypercall in all cases, we
keep using the same interface while it still possible. That is ACPI on
HVM guest, and fallback to hypercall on PVH guest.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Signed-off-by: Jason Andryuk <jason.andryuk@amd.com>
Add a new function to allow to make an hypercall to shutdown the
machine.
This import "sched.h" public header from Xen Project's repo. Some
changes have been made to be closer to EDK2's coding style.
Add the entire OvmfPkg/Include/IndustryStandard/Xen/ directory to
LicenseCheck ignore. All the existing header files, as well as the new
sched.h, are MIT licensed.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Signed-off-by: Jason Andryuk <jason.andryuk@amd.com>
XenHypercallLib now makes direct hypercalls, so HyperPages is
unnecessary and can be removed.
Change the XenPvhDetected() ASSERT to use the Xen version. That has
never been 0, AFAIK.
Signed-off-by: Jason Andryuk <jason.andryuk@amd.com>
This removes the need to allocate memory for the hypercall page,
particularly for use during runtime. This also makes the library usable
in all phases, so LIBRARY_CLASS can remove the restrictions.
The processor vendor is used to select vmmcall or vmcall instructions.
The listed vendors are those in the Xen tree.
Signed-off-by: Jason Andryuk <jason.andryuk@amd.com>
In the current code, TDVF reads the PcdSetNxForStack value via fw_cfg ,
but overwrites it with a fixed value after the read is complete.
In this patch, TDVF removes the redundant logic code.
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Elena Reshetova <elena.reshetova@intel.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
LocateAndInstallAcpiFromFvConditional was always returning EFI_SUCCESS
even when it failed to find `AcpiFile`. Fix that, and improve the layout
by checking if an error occurred and breaking earlier.
Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
According to TCG's Platform Reset Attack Mitigation spec, the OS should
never create the MOR variable, only read and write it.
But some OSes (Fedora 24 and 25) don't follow the TCG's Platform Reset
Attack Mitigation spec and unintentionally create MOR variable.
The commit fda8f631ed added function
VariableHaveTcgProtocols() to check against Tcg/Tcg2 protocol to infer
whether the MOR variable is created by platform firmware or not. If not,
delete the variable created by OS and lock the variable to avoid OS to
create it.
But in VariableStandaloneMm, VariableHaveTcgProtocols() always returns
FALSE, it causes TCG MOR secure feature does not work in standalone MM
environment.
As Fedora 24 and 25 are EOL today, directly returns TRUE in the function
VariableHaveTcgProtocols() for VariableStandaloneMm, and rename the
function to VariableIsMorVariableLegitimate() to make it more obvious
what the narrow use-case is for which it exists.
Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
REF : https://bugzilla.tianocore.org/show_bug.cgi?id=4817
This commit is to add OrderedCollectionLib in MdePkg for DxeCore usage.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Andrew Fish <afish@apple.com>
Tested-by: Xiaoqiang Zhang <xiaoqiang.zhang@intel.com>
REF : https://bugzilla.tianocore.org/show_bug.cgi?id=4817
Before entering BIOS setup, CoreValidateHandle function executed
over 600,000 times during BDS phase on latest 8S server platform.
In CoreValidateHandle function, current implementation will go
through the doubly-linked list handle database in each call, and
this will have big impact on boot performance.
The optimization is using Red-black tree to store the EFI handle
address when insert each EFI handle into the handle database, and
remove the handle from Red-black tree if the handle is removed
from the handle database. CoreValidateHandle function changed to
go through the Red-black tree.
After verification on latest 8S server platform, BDS boot time can
save 20s+ after this change.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Andrew Fish <afish@apple.com>
Tested-by: Xiaoqiang Zhang <xiaoqiang.zhang@intel.com>
LzmaDecompressLib does not exist as a library class, and the library
implementation that is usually referenced in this context is intended to
be incorporated using NULL library class resolution.
Let's fix this so that we can drop the reference to LzmaDecompressLib.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Sami Mujawar <sami.mujawar@arm.com>
Some of the boilerplate in ArmPlatformLib is only relevant when entering
UEFI on multiple cores, and this is no longer supported. So retire the
associated helper routines.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Some of the boilerplate in ArmPlatformLib is only relevant when entering
UEFI on multiple cores, and this is no longer supported. So retire the
associated helper routines.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Add helper functions to generate AML resource data
for I/O resource descriptor.
Cc: Pierre Gondois <pierre.gondois@arm.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Implementation of MEDIA_SANITIZE_PROTOCOL for NIST
purge/clear actions with mapping to NVM Express native
commands.
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
When allocating memory for a non-discoverable PCI device's IO, the
current core code removes the XP attribute, allowing code to execute
from that region. This is a security vulnerability and unneeded. This
change updates to mark the region as XP when allocating memory for the
non-discoverable PCI device.
These allocations in this function are limited to `EfiBootServicesData`
and `EfiRuntimeServicesData`, which we expect to be XP.
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
Currently whenever gDS->SetMemorySpaceCapabilities() is called, it
attempts to set the corresponding attributes in the gMemoryMap
descriptor. However, gMemoryMap only contains entries from GCD types
EfiGcdMemoryTypeSystemMemory and EfiGcdMemoryTypeMoreReliable, so
for all other types a failure is reported in the code. This is a
failure that is expected, so it does not provide value and can
lead to real failures being ignored.
This patch updates the gDS->SetMemorySpaceCapabilities() code to
only call into updating gMemoryMap if the GCD type is SystemMemory
or MoreReliable, to avoid spurious errors being reported. This
also avoids the expensive operation of searching through gMemoryMap
for entries we know we will fail to find.
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
The Memory Attributes Table is generated by fetching the EFI memory map
and splitting entries which contain loaded images so DATA and CODE
sections have separate descriptors. The splitting is done via a call to
SplitTable() which
marks image DATA sections with the EFI_MEMORY_XP attribute and CODE
sections with the EFI_MEMORY_RO attribute when
splitting. After this process, there may still be EfiRuntimeServicesCode
regions which did not have their attributes set because they are not
part of loaded images.
This patch updates the MAT EnforceMemoryMapAttribute logic to set the
access attributes of runtime memory regions which are not part of loaded
images (have not had their access attributes set). The attributes of the
code regions will be read-only and no-execute because the UEFI spec
dictates that runtime code regions should only contain loaded EFI
modules.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4832
Refs:
1.
https://edk2.groups.io/g/devel/topic/patch_v1_mdemodulepkg/105570114?p=,,,20,0,0,0::recentpostdate/sticky,,,20,2,0,105570114
2.
https://edk2.groups.io/g/devel/topic/mdemodulepkg_fix_mat/105477564?p=,,,20,0,0,0::recentpostdate/sticky,,,20,2,0,105477564
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Per UEFI spec 2.10 section 4.6.3 EFI_MEMORY_ATTRIBUTES_TABLE,
"The Memory Attributes Table is currently used to describe memory
protections that may be applied to the EFI Runtime code and data
by an operating system or hypervisor. Consumers of this table must
currently ignore entries containing any values for Type except for
EfiRuntimeServicesData and EfiRuntimeServicesCode to ensure
compatibility with future uses of this table."
However, the current MAT code also enforces attributes for
EfiMemoryMappedIo and EfiMemoryMappedIoPortSpace, which it should
not be. Per
https://edk2.groups.io/g/devel/topic/patch_v1_mdemodulepkg/105570114?p=,,,20,0,0,0::recentpostdate/sticky,,,20,2,0,105570114,
it was suggested to remove these types from the MAT logic.
This patch removes EfiMemoryMappedIo and EfiMemoryMappedIoPortSpace
from the MAT logic in accordance with the UEFI spec.
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Check HTTP response content type to see if it is application/json
type or not. In Redfish, we expect to see response data in JSON
format. If it is not, show warning message to developer.
Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Add HTTP status code check for POST, PUT, PATCH and DELETE Redfish
request. When status code is not expected, return failure to caller.
The expected HTTP status code is defined in Redfish specification.
Signed-off-by: Nickle Wang <nicklew@nvidia.com>
FVP Base Revc doesn't support Trng.
ASSERT (FALSE) is causing the boot to stall.
Replacing ASSERT with ERROR log.
Signed-off-by: Prachotan Reddy Bathi <Prachotan.Bathi@arm.com>
In the system boot phase, if OS postpone onlining some CPU
until later, the sec page tables could be overwritten.
So, TDVF needs to reserve the initial page tables that would be
used by APs on Mailbox wakeup.
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Elena Reshetova <elena.reshetova@intel.com>
Cc: Kirill A Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4830
Allow BrainpoolP512r1 to be leveraged when the corresponding curve ID
is passed to crypto libraries in EDK2
Signed-off-by: Michael G.A. Holland <michael.holland@intel.com>
This moves the WatchdogDisable() function before the installation of the
gEfiWatchdogTimerArchProtocolGuid protocol. It allows a platform to
promptly carry out platform specific configurations, such as UEFI boot
monitoring, by registering the protocol installation callback.
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
The BSP's APIC mode is synced to all APs in CollectProcessorCount().
So, it's safe to skip the X2 APIC enabling in AutoEnableX2Apic() which
runs later when BSP's APIC mode is X2 APIC already.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
The change saves the BSP's initial APIC mode and syncs to all APs
in first time wakeup. It allows certain platforms to switch to X2 APIC
as early as possible and also independent on CpuFeaturePei/Dxe.
The platform should switch BSP to X2 APIC mode first before the
CpuMpPeim runs.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
It's very confusing that auto X2 APIC enabling and APIC ID sorting
are all performed inside CollectProcessorCount().
The change is to separate the X2 APIC enabling to AutoEnableX2Apic()
and call that from MpInitLibInitialize().
SortApicId() is called from MpInitLibInitialize() as well.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
The motivation of this change is to simplify the logic in
StandaloneMmIpl when allocating the memory for SMM profile data.
IPL does not need to detect the CPU feature regarding MSR DS
Area. That change requires the PCD value contains the MSR DS
Area. So, the size of SmmProfileData will be simplified to the
PcdCpuSmmProfileSize directly.
mMsrDsAreaSize will be within the PcdCpuSmmProfileSize if
mBtsSupported is TRUE.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
For MM, gMmProfileDataHobGuid Memory Allocation HOB is defined to
indicate SMM profile feature enabled or not. If the HOB exist, SMM
profile base address and size will be returned in the HOB, so no need
to consume the PcdCpuSmmProfileEnable feature PCD to check enable or
disable.
To achieve above purpose, Add the IsSmmProfileEnabled () function.
With this change, Both MM and SMM can use the new function for
SMM profile feature check.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
This patch is to refine the updatePageTable logic for DxeSmm.
For DxeSmm, PageTable will be updated in the first SMI when SMM
ready to lock happen:
IF SMM Profile is TRUE:
1. Mark mProtectionMemRange attribute: SmrrBase:Present, SMM
profile base:Present&Nx, MMRAM ranges:Present, MMIO ranges:
Present&Nx.
2. Mark the ranges not in mProtectionMemRange as RP (non-present).
IF SMM Profile is FALSE:
1. Mark Non-MMRAM ranges as NX.
2. IF RestrictedMemoryAccess is TRUE:
Forbidden Address mark as RP (IsUefiPageNotPresent is TRUE).
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
This patch is to add PiSmmCpuStandaloneMm.inf for MM CPU
support.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
This patch is to make sure only logging PF address for MM
can run into the SmmProfilePFHandler.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
SMM Profile start can be started early in SMM CPU EntryPoint
since page table for SMM profile is ready.
No need wait smm ready to lock.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
For MM:
SMRAM & PageTable itself & SMM Paging State shall be configured
once the gEdkiiPiMmMemoryAttributesTableGuid is installed by
SMM core. It will happen after MmIpl.Entrypoint.
PerformRemainingTasks will be called before MmIpl.Entrypoint
exit.
For SMM:
SMRAM & PageTable itself & SMM Paging State are still
configured in the first SMI when SMM ready to lock happen.
So, this patch is to differentiate PerformRemainingTasks for MM
and SMM.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
For MM:
CodeAccessCheck is designed to enable in the MM CPU Driver Entry
Point.
For SMM:
CodeAccessCheck is still enabled in the first SMI when SMM ready
to lock happen.
This patch enables the CodeAccessCheck in MM CPU Driver Entry
Point for MM support.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
For MM:
Since all accessible NON-MMRAM memory and attribute shall be in
ResourceDescriptor HOBs for MM, the page table for MM can be finalized
and created in the default Page.
For SMM:
There are still 2 steps for the finalized default Page:
1. Create default Page
2. update the page table in the first SMI when SMM ready to lock
happen
This patch to refactor the GenSmmPageTable() function to create the
default Page Table for Both SMM and MM:
1. Create NonMmram MemoryRegion
2. Gen NonMmram MemoryRegion PageTable
3. Gen MMRAM Range PageTable
4. Consider PcdCpuSmmStackGuard & PcdNullPointerDetectionPropertyMask
cases.
Meanwhile, mXdSupported needs to be initialized before GenSmmPageTable since
it's required by GenSmmPageTable function. So, move the mXdSupported init
from CheckFeatureSupported to the common EntryPoint function.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
This patch adds the PiCpuStandaloneMmEntry for MM, which is
the module Entry Point of the CPU StandaloneMm driver.
In the Entry Point:
1. Init the mIsStandaloneMm flag
2. Call PiSmmCpuEntryCommon
3. Init SmiCommandPort
4. Install the SMM Configuration Protocol.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
MM CPU can not use the dynamic PCD (PcdCpuMaxLogicalProcessorNumber),
so move the PCD usage to DxeSmm.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
Since all accessible NON-MMRAM memory shall be in ResourceDescriptor
HOBs, check the ResourceDescriptor HOBs to return if the Address is
forbidden or not for MM CPU.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
Define the mIsStandaloneMm to indicate it's the MM_STANDALONE MM CPU
driver or DXE_SMM_DRIVER SMM CPU driver execution.
With mIsStandaloneMm, GetMpInformationFromMpServices() can be skipped
for the MM CPU since it can not call the
GetMpInformationFromMpServices() due to the NON-SMM MP Services usage
for the MP Information.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
MM CPU can not call EfiLocateFirstAcpiTable to get the system
port address of the SMI Command Port. This patch just hard-code
to 0xB2 for MM CPU.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
Anthony PERARD
Jason Andryuk
Ceping Sun
Rebecca Cran
Wei6 Xu
Xiaoqiang Zhang
Ard Biesheuvel
Gerd Hoffmann
Abdul Lateef Attar
Ray Robles
Oliver Smith-Denny
Oliver Smith-Denny
Nickle Wang
Prachotan Reddy Bathi
Michael G.A. Holland
Nhi Pham
HoraceX Lien
Ray Ni
Jiaxin Wu