This patch replaces StrCpy with StrnCpy or refactors out the usage of StrCpy through some other means.
This patch replaces StrCat with StrnCat or refactors out the usage of StrCat through some other means.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16038 6f19259b-4bc3-4df7-8a09-765794883524
This PCD has been replaced by ArmPlatformIsPrimaryCore() function.
Althrough this PCD is still used in some occasions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16026 6f19259b-4bc3-4df7-8a09-765794883524
Previously we were setting it to the start of the GDT in the UEFI
driver's copy of BaseLib. This address is irrelavent, since the C code
will initialize it to the cooresponding address after the Thunk16 code
has been placed in low memory.
Additionally, initializing this was causing a link error for the
XCLANG toolchain.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16025 6f19259b-4bc3-4df7-8a09-765794883524
Convert remaining 'DB' code to assembly code by:
* Move instruction immediate data labels to end of instruction
* Use strict keyword to make sure immediate data size is not optimized
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16024 6f19259b-4bc3-4df7-8a09-765794883524
By using 'bits 16', we can write code for 16-bit use the actual
assembly syntax rather than 'DB' and sometimes writing code with
seemingly incorrect operands because we know it will run correctly
when the processor is running in 16-bit mode.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16023 6f19259b-4bc3-4df7-8a09-765794883524
http://www.nasm.us/doc/nasmdoc3.html#section-3.9
A local label is a label beginning with the period, and it's actual
name is prefixed by the previous non-local label.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16022 6f19259b-4bc3-4df7-8a09-765794883524
This is a translation of X64/Thunk16.asm to NASM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16021 6f19259b-4bc3-4df7-8a09-765794883524
This is a translation of Ia32/Thunk16.asm to NASM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16020 6f19259b-4bc3-4df7-8a09-765794883524
Some compilers may define __USER_LABEL_PREFIX__ to determine the
prefix used with ASM_PFX. Otherwise, IA32 will use a single underscore
'_' character, and all other architectures will use an empty prefix.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16019 6f19259b-4bc3-4df7-8a09-765794883524
Note: Only tested with the GCC49 toolchain so far.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16016 6f19259b-4bc3-4df7-8a09-765794883524
Allow the PCDs gArmPlatformTokenSpaceGuid.PcdPL031RtcBase and
gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy PCDs to be
declared as PcdsDynamic by the platform so they can be overridden
during boot.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16015 6f19259b-4bc3-4df7-8a09-765794883524
Remove the PCDs gArmTokenSpaceGuid.PcdGicDistributorBase and
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase from PrePeiCoreUniCore.inf,
as they are not in fact used by the module.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16014 6f19259b-4bc3-4df7-8a09-765794883524
Check Linux image and parameters are not overlapping with each other.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16013 6f19259b-4bc3-4df7-8a09-765794883524
It is actually the same sequence as AArch64.
Without cleaning the data cache prior to disable the cache, the LR value
pushed on the stack when entering in ArmCleanInvalidateDataCache()
might have been overwritten by this specific cache line maintenance.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16012 6f19259b-4bc3-4df7-8a09-765794883524
Added the header comment block to the function "RtcTimeFieldsValid()" and
reworked the alignment of the code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16011 6f19259b-4bc3-4df7-8a09-765794883524
When a Unicode string is not stored in a 2-byte aligned memory area,
the StrnCpy() or StrCpy() functions can not be used to copy the string.
The string is now copied using CopyMem().
In the same function, a copy with "AsciiStrnCpy()" has also be replaced
with a copy using "CopyMem()" as the size of the string to copy is in
normal cases known. Another copy using "AsciiStrnCpy()" has been corrected
in order not to run off the array the string is copied into and to ensure
that the copied string has a final zero.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16009 6f19259b-4bc3-4df7-8a09-765794883524
This patch replaces StrCat with StrnCat or refactors out the usage of StrCat through some other means.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16005 6f19259b-4bc3-4df7-8a09-765794883524
This patch replaces StrCat with StrnCat or refactors out the usage of StrCat through some other means.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16004 6f19259b-4bc3-4df7-8a09-765794883524
This patch replaces StrCat with StrnCat or refactors out the usage of StrCat through some other means.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16003 6f19259b-4bc3-4df7-8a09-765794883524
This patch replaces StrCat with StrnCat or refactors out the usage of StrCat through some other means.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16002 6f19259b-4bc3-4df7-8a09-765794883524
This patch replaces StrCat with StrnCat or refactors out the usage of StrCat through some other means.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16001 6f19259b-4bc3-4df7-8a09-765794883524
* Follow a consistent style
* Add consistent sections: NOTES, EXAMPLES, RETURN VALUES, etc.
* Wrap the text to fit in 80x25 formatted console output
* Remove excessive and very verbose examples output
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tapan Shah <tapandshah@hp.com>
Reviewed-By: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15994 6f19259b-4bc3-4df7-8a09-765794883524
Star Zeng
Hess Chen
Jaben Carsey
Samer El-Haj-Mahmoud elhaj
Scott Duplichan
Tian, Hot
Long Qin
Dong, Guo
Feng Tian
Jeff Fan
Gao, Liming
Fu Siyuan
Olivier Martin
Jordan Justen
Ard Biesheuvel
Ronald Cron
Ruiyu Ni
Feng, Bob C
Tapan Shah