Commit Graph

32637 Commits

Author SHA1 Message Date
Ard Biesheuvel 3dcc7b73df ArmPkg: Revert "Allow SMC/HVC monitor conduit to be specified at runtime"
This reverts commit 32460bb5b1, which is
no longer needed as ArmVirtQemu now has its own special implementation
for ArmMonitorLib.

Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-06-10 08:44:48 +00:00
Ard Biesheuvel 2c19297e6c ArmVirtPkg/ArmVirtQemu: Revert "Permit the use of dynamic PCDs in PEI"
This reverts commit 865229bcc8, and
restores the old state where dynamic PCDs are only used when TPM support
is configured.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-06-10 08:44:48 +00:00
Ard Biesheuvel 7bcd49edd0 ArmVirtPkg: Revert "Use dynamic PCD to set the SMCCC conduit"
This reverts commit c98f7f7550, which is
no longer needed: the SMCCC conduit will be converted back to being
hardcoded, as PrePi based ArmVirtPkg build cannot support dynamic PCDs,
and falling back to patchable PCDs does not work either.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-06-10 08:44:48 +00:00
Ard Biesheuvel 059676e4fa ArmVirtPkg/ArmVirtQemu: Implement ArmMonitorLib for QEMU specifically
Whether SMCCC calls use HVC or SMC generally depends on the exception
level that the firmware executes at, but also on whether or not EL2 is
implemented.

This is almost always known at build time, which is why the default
ArmMonitorLib used to model this as a feature PCD. However, on QEMU,
things are not that simple.

However, SMCCC specifies that the conduit is the same as the one used
for PSCI calls (which has been retrofitted into SMCCC when it was
defined). Given that QEMU provides this information via the device tree,
let's use it to select the conduit, using a special ArmMonitorLib
implementation.

This also removes the need to set the associated PCD at runtime, given
that its updated value will no longer be used.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-06-10 08:44:48 +00:00
Ard Biesheuvel 5bea691233 ArmVirtPkg/PrePi: Enable VFP before calling into C code
When building ArmVirtQemuKernel with CLANGDWARF (which does not require
a GCC workaround where -mgeneral-regs-only is needed to ensure
-mstrict-align works as expected), the C code invoked from the PrePi
startup code may contain instructions that access the FP/SIMD register
file. This means that the FP/SIMD must be enabled before making such
calls, and this is currently not the case. So fix that, by moving the
call to ArmEnableVFP() early into the asm startup code.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-06-10 08:44:48 +00:00
Gerd Hoffmann ab069d5801 OvmfPkg/QemuVideoDxe: purge VbeShim
The guest os which depends on vbeshim for video support is -- according
to the comments -- Windows 2008 R2.  Which went EOL in January 2020,
more than four years ago.

Time to retire VbeShim.  RIP.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2024-06-07 16:36:15 +00:00
Nhi Pham c36414b131 MdeModulePkg/DxeCapsuleLibFmp: Fix crash if no ESRT is found
The ESRT table is not required in UEFI firmware. In such cases, the
table may not be present in the UEFI Configuration Table. The mEsrtTable
is to check if the IsNestedFmpCapsule() function is invoked at runtime
to determine whether to use gEsrtManagementProtocolGuid or the ESRT
table from the Configuration Table. Unfortunately, the check does not
cover situations where the ESRT is not present, potentially resulting in
a kernel crash. This patch is intended to fix this issue.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
2024-06-07 15:20:42 +00:00
Sebastian Witt 948f234170 CryptoPkg: Fix BaseCryptLib CrtWrapper strncpy and strcat
Following https://bugzilla.tianocore.org/show_bug.cgi?id=2817 this
bug could also apply to strncpy and strcat.

For strncpy use count+1 if smaller than MAX_STRING_SIZE. This still
restricts the destination size to MAX_STRING_SIZE as before but allows
a strncpy when the source is close after destination without triggering
the InternalSafeStringNoAsciiStrOverlap check in AsciiStrnCpyS.

For strcat use the destination string length + the size of the source
string including the terminator as destination size if smaller than
MAX_STRING_SIZE.

Also move both functions to CrtWrapper.c as they do not return the
correct return value. AsciiStrnCpyS and AsciiStrCatS return
RETURN_VALUE instead of a char * to the destination buffer.

Signed-off-by: Sebastian Witt <sebastian.witt@siemens.com>
2024-06-07 13:23:04 +00:00
Sebastian Witt df8c61e4c0 CryptoPkg: Fix BaseCryptLib CrtWrapper strcpy
strcpy fails when strSource is closer than 4096 bytes after strDest.

This is caused by an overlap check in AsciiStrCpyS:
  //
  // 5. Copying shall not take place between objects that overlap.
  //
  SAFE_STRING_CONSTRAINT_CHECK (InternalSafeStringNoAsciiStrOverlap
  (Destination, DestMax, (CHAR8 *)Source, SourceLen + 1),
  RETURN_ACCESS_DENIED);

Since DestMax is MAX_STRING_SIZE (0x1000) and with a Source
that is in this area behind Destination, AsciiStrCpyS will fail
and strcpy will do nothing.

When called by CRYPTO_strdup in openssl this leads to uninitialzed
memory that gets accessed instead of the copied string.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2817

Signed-off-by: Sebastian Witt <sebastian.witt@siemens.com>
2024-06-07 13:23:04 +00:00
Rebecca Cran 8c826be35c MdeModulePkg: In RemoveTableFromRsdt don't read from unallocated memory
Instead of copying from unallocated memory in RemoveTableFromRsdt, do a
CopyMem followed by ZeroMem.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
2024-06-07 11:35:47 +00:00
HoraceX Lien 665b223d57 ShellPkg/Pci.c: Update supported link speed to PCIe Gen6
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4779

Refer to PCI express base specification Reversion 6.2,
table 7-23 Link Capabilities Register.
Supported Link Speeds Vector bit 5: speed 64 GT/s.
Add the support to shell command 'pci'.

Signed-off-by: HoraceX Lien <horacex.lien@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2024-06-07 09:06:49 +00:00
Oliver Steffen 80b59ff832 MdeModulePkg: Warn if out of flash space when writing variables
Emit a DEBUG_WARN message if there is not enough flash space left to
write/update a variable. This condition is currently not logged
appropriately in all cases, given that full variable store can easily
render the system unbootable.
This new message helps identifying this condition.

Signed-off-by: Oliver Steffen <osteffen@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
2024-06-07 03:57:02 +00:00
Michael D Kinney f9c2f2fa0f BaseTools/Scripts: Fix PatchCheck commit range
Fix logic error that changes the commit range checked depending
on the verbosity level set.

Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
2024-06-07 09:15:15 +08:00
Wenxing Hou 71606314f8 CryptoPkg: Fix wrong logic in X509GetTBSCert
REF:
https://bugzilla.tianocore.org/show_bug.cgi?id=4509

Both return 0x80 value and
Asn1Tag != V_ASN1_SEQUENCE are wrong return.

Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
2024-06-06 14:49:44 +00:00
Gerd Hoffmann 90cb1ec332 OvmfPkg/PlatformInitLib: allow PhysBits larger than 48
If GuestPhysBits reports more than 48 phys-bits can be used allow
to go beyond that limit.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2024-06-06 09:06:28 +00:00
Gerd Hoffmann 603ad2d6ae OvmfPkg/PlatformInitLib: add support for GuestPhysBits
Add support for GuestPhysBits (cpuid 0x80000008, eax, bits 23:16).

GuestPhysBits is a field which can be set by the hypervisor to inform
the guest about the /usable/ physical address space bits.  This can be
smaller than the PhysBits of the CPU, for example because of nested
paging limitations.

OVMF will read GuestPhysBits, log the value, in case it is set use it
as upper limit.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2024-06-06 09:06:28 +00:00
Jeff Brasen 65b0d08786 MdeModulePkg/HiiDatabaseDxe: Remove assert for VarStoreId = 0
It is legal for the VarStoreId of a question to
be 0 per the UEFI spec:
"Specifies the identifier of a previously
declared variable store to use when storing the
question’s value. A value of zero indicates
no associated variable store."

Instead of hitting an assert just skip this
question as there is no value to return.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
2024-06-06 05:41:00 +00:00
Gerd Hoffmann b45aff0dc9 OvmfPkg: add morlock support
Add dsc + fdf include files to add the MorLock drivers to the build.
Add the include files to OVMF build configurations.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2024-06-06 02:12:52 +00:00
Chao Li 10ab1c67c4 ArmVirtPkg: Remove the NorFlashQemuLib
The FdtNorFlashQemuLib has been enabled, remove ArmVirtPkg version.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4770

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
2024-06-05 21:50:38 +00:00
Neo Hsueh 10cd8b45ce MdePkg: Remove non-ASCII characters from header file
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4775

Signed-off-by: Neo Hsueh <Hong-Chih.Hsueh@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiangang He <jiangang.he@amd.com>
2024-06-05 12:22:53 +00:00
Aaron e2e09d8512 MdePkg: Add Ipmi Net Sensor Thresholds command defines.
Adding definitions for Ipmi Net Sensor Get/Set Thresholds commands and
structures as found in Ipmi specification v2.0

Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
2024-06-05 03:35:32 +00:00
Chao Li 7772e339bd ArmVirtPkg: Enable the non-hardcode version FdtNorFlashQemuLib
Enable the non-hardcode version of FdtNorFlashQemuLib in ArmVirtQemu.dsc
and ArmVirtQemuKernel.dsc, and it can work rightly after enabling it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4770

Build-tested (with "ArmVirtQemu.dsc" and "ArmVirtQemuKernel.dsc").

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Co-authored-by: Xianglai Li <lixianglai@loongson.cn>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2024-06-04 22:51:09 +00:00
Chao Li cac1ea6c2a OvmfPkg: Add no hardcode version of FdtNorFlashQemuLib
This library is copied from ArmVirtPkg, in the Arm version, the value of
PcdFlashNvStorageVariableBase, PcdFlashNvStorageFtwWorkingBase and
PcdFlashNvStorageFtwSpareBase are hardcoded in INC file.

This version will calculate them from FDT resource and using the set PCD
to store when the NorFlashInitialise is called. By default, the first
available flash(not used for storage UEFI code) as NV variable storage
medium.

In this way, UEFI can better handle the change of flash base address,
which is suitable for different cpu architecture board implementation.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4770

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Co-authored-by: Xianglai Li <lixianglai@loongson.cn>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2024-06-04 22:51:09 +00:00
Ard Biesheuvel de4cc40b8c MdeModulePkg/HiiDatabaseDxe: Avoid struct assignment
Struct assignments are not permitted in EDK2, as they may be converted
by the compiler into calls to the 'memcpy' intrinsic, which is not
guaranteed to be available in EDK2.

So replace the assignment with a call to CopyMem (), and -while at it-
replace the loop with a single CopyMem () call, as the loop operates on
items that are contiguous in memory.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-06-04 19:06:24 +00:00
Dun Tan 839bd17973 UefiCpuPkg:fix issue when splitting paging entry
This patch is to fix issue when splitting leaf paging
entry in CpuPageTableLib code.

In previous code, before we assign the new child paging
structure address to the content of splitted paging entry,
PageTableLibSetPnle() is called to make sure the bit7 is
set to 0, which indicate the previous leaf entry is
changed to non-leaf entry now. There is a gap between
we change the bit7 and we assign the new child paging
structure address to the content of the splitted paging
entry. If the address of code execution or data access
happens to be in the range covered by the splitted paging
entry, this gap may cause issue.

In this patch, we prepare the new paging entry content
value in a local variable and assign the value to the
splitted paging entry at once. The volatile keyword
is used to ensure that no optimization will occur in
compilation.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Zhou Jianfeng <jianfeng.zhou@intel.com>
2024-06-04 12:38:54 +00:00
Dun Tan 077760fec4 UefiCpuPkg: Remove GetAcpiCpuData() in CpuS3.c
Remove GetAcpiCpuData() in CpuS3.c. The mAcpiCpuData
is not needed in S3 boot anymore.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan e3b3e907e1 MdeModulePkg:Remove MpService2Ppi field in SMM_S3_RESUME_STATE
This MpService2Ppi field in SMM_S3_RESUME_STATE is used to
wakeup AP to do the CPU initialization during smm s3 boot when
the execution mode of PEI and DXE are the same.
Currently, in CpuS3.c of smm cpu driver, BSP doesn't need to
wakeup AP anymore. The initialization for AP will be done in
S3Resume.c before transfer to CpuS3.c of smm cpu driver.
So we can remove the MpService2Ppi field in SMM_S3_RESUME_STATE.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-06-04 07:40:27 +00:00
Dun Tan d390b163f8 UefiCpuPkg: Remove unneeded MpService2Ppi assignment
Remove the unneeded assignment of MpService2Ppi field
in SmmS3ResumeState. Previously, when the execution
combination of PEI and DXE are the same, the pointer
of mpservice ppi will be passed to CpuS3.c in smm cpu
driver to wakeup all APs, instead of init-sipi-sipi.
Currently, CpuS3.c doesn't need to wakeup Aps anymore.
So remove the duplicated mpservice locate and assignment
to MpService2Ppi field in SmmS3ResumeState.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan 341ee5c31b UefiCpuPkg:Remove code to wakeup AP and relocate ap
After the code to load mtrr setting, set register table,
handle APIC setting and Interrupt after INIT-SIPI-SIPI
is moved, the InitializeCpuProcedure() only contains
following code logic:
1.Bsp runs ExecuteFirstSmiInit().
2.Bsp transfers AP to safe hlt-loop

During S3 boot, since APs will be relocated to new safe
buffer by the callback of gEdkiiEndOfS3ResumeGuid in
PeiMpLib, Bsp doesn't need to transfer AP to safe hlt-loop
any more. SmmRestoreCpu() in CpuS3 only needs to runs the
ExecuteFirstSmiInit() on BSP. So remove code to wakeup
AP by INIT-SIPI-SIPI and remove code to relocate ap to
safe hlt-loop.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan 525578bdd5 UefiCpuPkg:Remove code to handle APIC setting and Interrupt
Remove ProgramVirtualWireMode()/DisableLvtInterrupts()
since APs won't be waken by INIT-SIPI-SIPI in CpuS3.c
any more. The two functions has been executed in
MpInitLibInitialize() in PeiMplib.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan cdc1a88272 UefiCpuPkg:Relocate AP to new safe buffer in PeiMpLib
In this commit, change PeiMpLib to install callback
of gEdkiiEndOfS3ResumeGuid to relocate AP to new safe
buffer. The gEdkiiEndOfS3ResumeGuid is installed in
S3Resume.c before jmping to OS waking vector.

Previously, code in CpuS3.c of PiSmmCpuDxe driver will
prepare the new safe buffer for AP and place AP in hlt
loop state. With this code change, we can remove the
Machine Instructions of mApHltLoopCode in PiSmmCpuDxe.
Also we can reuse the related code in DxeMpLib for
PeiMpLib.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan 669291db5a UefiCpuPkg: Install gEdkiiEndOfS3ResumeGuid in S3Resume
Install gEdkiiEndOfS3ResumeGuid in S3Resume to trigger
callback registered by PeiMpLib. The callback is to
relocate Ap to new safe memory before jump to OS waking
vector in S3 boot flow.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan fcd09b1edb UefiCpuPkg:Move some code in DxeMpLib to common place
Move some code in DxeMpLib.C to common MpLib.c.
The related code is to relocate Ap to new safe buffer
before booting into OS. In next commits, these code
also will be used by PeiMpLib. This commit doesn't
change any code functionality.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan 68310cd56a UefiCpuPkg:Abstract some DxeMpLib code to function
Abstract some DxeMpLib code to function in this commit.
Some of these internal functions will be moved to common
MpLib.c in following commits. Then PeiMpLib can reuse
the code.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan ffb8481ba8 UefiCpuPkg: Disable PG in IA32 ApLoopCode
Disable paging in IA32 RelocateApLoop assembly
code to fix the issue that the AP page table is
unavailiable after boot OS under IA32 execution mode.

This issue exist in IA32 PEI + IA32 DXE normal boot
(also S3 boot with IA32 PEI after previous three commits
are accepted). In current MpLib code, the IA32 execution
mode code did not create page table in reserved memory
like what X64 code did. If PcdCpuStackGuard is TRUE, the
PG is enabled for AP in current RelocateApLoop assembly
code. And the page table for AP is unavailiable after
boot OS. This might cause potential issue. So disable PG
in IA32 RelocateApLoop.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan 7421ea1f2a UefiCpuPkg: Remove code to set register table
Remove code to set register table in CpuS3.c.
In previous commit, PcdCpuFeaturesInitOnS3Resume
has been set to TRUE. So that CpuFeaturesPei PEIM
will initialize the CPU registers and perform CPU
features initialization.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan b7db4d895a UefiCpuPkg:Set PcdCpuFeaturesInitOnS3Resume to TRUE
Set PcdCpuFeaturesInitOnS3Resume to TRUE. So that
CpuFeaturesPei PEIM will initialize the CPU registers
and perform CPU features initialization.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan db4101c308 UefiCpuPkg: Remove code to load mtrr setting
Remove code to load mtrr setting in CpuS3.c.
In previous commits, before transferring to
CpuS3.c, MTRR setting has been loaded in
S3RestoreConfig2() for all CPU.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan ad245ffeff UefiCpuPkg: LoadMtrrData for all cpu in S3Resume
In this commit, S3Resume.c wakeup all Aps to run
LoadMtrrData for all cpu before transfer to CpuS3.c
in smm cpu driver. The MtrrSetting table can be restored
by gEdkiiS3MtrrSettingGuid which is saved by lockbox in
PEI phase. This can avoid waking up APs in CpuS3.c.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan 3a516aa240 UefiCpuPkg: Save MTRR by lockbox in CpuS3DataDxe
Save MTRR by lockbox in CpuS3DataDxe. In S3 boot,
The MTRR setting will be restored in S3Resume.c
in following patches. Then S3Resume.c will wakeup
all APs to load the MTRR setting. This can avoid
waking up APs in CpuS3.c.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan 32a9ee736e UefiCpuPkg: Add locbox lib instance in DSC
Add locbox lib instance in DSC. The SmmLockBoxDxeLib
will be consumed by CpuS3DataDxe driver

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan 52a4bc65f6 OvmfPkg: Save MTRR by lockbox in CpuS3DataDxe
Save MTRR by lockbox in CpuS3DataDxe. In S3 boot,
The MTRR setting will be restored in S3Resume.c
in following patches. Then S3Resume.c will wakeup
all APs to load the MTRR setting. This can avoid
waking up APs in CpuS3.c.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Dun Tan 87f22f4b5c MdeModulePkg: Add gEdkiiS3MtrrSettingGuid
Add gEdkiiS3MtrrSettingGuid a new GUID for s3
MTRR setting. This GUID will be used to save
MTRR_SETTINGS at EndOfDxe by LockBox and restore
at S3 boot PEI phase for s3 usage.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-06-04 07:40:27 +00:00
Rebecca Cran 27b044605c ArmPkg: Set BIOS Segment to 0 in SMBIOS Type 0 table
According to the SMBIOS specification, on UEFI systems the BIOS Segment
field in the Type 0 table isn't relevant and should be set to 0.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
2024-06-03 14:28:45 -06:00
Nhi Pham b0930e3f4e CryptoPkg/BaseCryptLib: Enable more functions for SMM/StandaloneMM
This facilitates RSA extension, PKCS7 sign, and bignum function to
broaden the range of algorithms available in SMM/StandaloneMM for
platform utilization.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
2024-06-03 10:48:34 +00:00
Du Lin de2330450f MdeModulePkg: Update GCD attribute conversion to support SP attribute
Add a new entry into GCD attribute conversion table to convert
EFI_RESOURCE_ATTRIBUTE_SPECIAL_PURPOSE to EFI_MEMORY_SP.

Signed-off-by: Du Lin <du.lin@intel.com>
2024-06-02 01:58:12 +00:00
Gerd Hoffmann 7339bfeffa OvmfPkg/VirtioRngDxe: check if device is ready
Add a 'Ready' boolean to the driver state struct, use it to track
whenever the device is ready to be used.  In case it is not ready
throw an EFI_DEVICE_ERROR instead of sending a request which will
never receive an answer.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2024-05-31 23:00:40 -07:00
Shang Qingyu 3b36aa96de CryptoPkg: Remove deprecated code related to SHA-1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4698

The default drbg type of randlib has been switched to aes_256_ctr in
openssl1.1.1, so sha1 is not really used in RandomSeed(). Remove related code
which do SHA-1 support checking in CryptRand.c and CryptRandTsc.c to avoid
potential compatibility errors.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Shang Qingyu <qingyu.shang@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2024-05-31 15:54:23 +00:00
Qingyu 7c584bb048 CryptoPkg: Fix bug for correct return value checking when get X509Cert
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4509

CryptX509.c file has X509GetTBSCert() funtion and it is added Inf variable
to collect the return value of ASN1_get_object(), which return 0x80 in error
case. Supplement the return value check during the second function call
and correct the check logic.

Signed-off-by: Qingyu <qingyu.shang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2024-05-31 12:24:38 +00:00
Shang Qingyu 746cc5cc40 CryptoPkg: Add support for aes128-sha256 and aes256-sha256 cipher
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4739

AES256-SHA256 is a Tls1.2 suite we need to support, add it to deflt_ciphers
in OpensslStub.

Signed-off-by: Shang Qingyu <qingyu.shang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2024-05-31 07:44:03 +00:00