Commit Graph

15 Commits

Author SHA1 Message Date
Ruiyu Ni b22a62be5c IntelFrameworkModule/LegacyBios: Use reserved memory for legacy data
Certain Legacy USB implementation needs to access legacy data (BDA,
etc.) from SMM environment. While currently it's not allowed to
access BS memory from SMM after EndofDxe, change the legacy data
to use reserved memory type.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-05-09 12:09:36 +08:00
Jian J Wang 2ea3576e16 IntelFrameworkModulePkg/LegacyBios: Use macro to enable/disable page 0
Current implementation uses following two methods

    EnableNullDetection()
    DisableNullDetection()

to enable/disable page 0. These two methods will check PCD
PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or not.
This is due to the fact that old GCD service doesn't provide paging related
attributes of memory block. Since this issue has been fixed, GCD services
can be used to determine the paging status of page 0. This is also make it
possible to just use a new macro

    ACCESS_PAGE0_CODE(
      <code accessing page 0>
    );

to replace above methods to do the same job, which also makes code more
readability.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2017-12-08 14:38:45 +08:00
Dandan Bi 71d047b483 IntelFrameworkModule/LegacyBios: Avoid explicit comparison for BOOLEAN
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2017-10-24 09:14:17 +08:00
Dandan Bi 2f909679b0 IntelFrameworkModulePkg/Csm: Refine coding style in comments
Make the comments follow Edk2 coding style:
1. Make the comments starts with /** and end with **/.
2. Make the comments descrition end with '.'

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2017-10-24 09:14:16 +08:00
Jian J Wang d057d8c4e9 IntelFrameworkModulePkg/Csm: Add code to bypass NULL pointer detection
Legacy has to access interrupt vector, BDA, etc. located in memory between
0-4095. To allow as much code as possible to be monitored by NULL pointer
detection, we add code to temporarily disable this feature right before
those memory access and enable it again afterwards.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ayellet Wolman <ayellet.wolman@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-10-11 16:39:01 +08:00
Hao Wu aa5f60ae41 IntelFrameworkModulePkg: Refine casting expression result to bigger size
There are cases that the operands of an expression are all with rank less
than UINT64/INT64 and the result of the expression is explicitly cast to
UINT64/INT64 to fit the target size.

An example will be:
UINT32 a,b;
// a and b can be any unsigned int type with rank less than UINT64, like
// UINT8, UINT16, etc.
UINT64 c;
c = (UINT64) (a + b);

Some static code checkers may warn that the expression result might
overflow within the rank of "int" (integer promotions) and the result is
then cast to a bigger size.

The commit refines codes by the following rules:
1). When the expression is possible to overflow the range of unsigned int/
int:
c = (UINT64)a + b;

2). When the expression will not overflow within the rank of "int", remove
the explicit type casts:
c = a + b;

3). When the expression will be cast to pointer of possible greater size:
UINT32 a,b;
VOID *c;
c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b);

4). When one side of a comparison expression contains only operands with
rank less than UINT32:
UINT8 a;
UINT16 b;
UINTN c;
if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...}

For rule 4), if we remove the 'UINTN' type cast like:
if (a + b > c) {...}
The VS compiler will complain with warning C4018 (signed/unsigned
mismatch, level 3 warning) due to promoting 'a + b' to type 'int'.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2017-03-06 14:33:22 +08:00
Elvin Li 79966a6f35 Fixed a bug in LegacyBiosDxe to allocate correct ranges of memory.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Elvin Li <elvin.li@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15789 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-12 05:19:34 +00:00
Elvin Li ad793176de Add additional check mRuntimeSmbiosEntryPoint == NULL to avoid K9 error.
Signed-off-by: Elvin Li <elvin.li@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14962 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-11 08:53:19 +00:00
Elvin Li b68237300a Following UEFI spec, update SmbiosDxe to use EfiRuntimeServicesData to put SMBIOS table. Update LegacyBiosDxe to move SMBIOS table to reserved memory for backward compatibility.
Signed-off-by: Elvin Li <elvin.li@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14932 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-05 05:30:27 +00:00
li-elvin 3e5eb44701 Remove hard code value and create new PCDs for OpROM reserved range in CSM module.
Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13991 6f19259b-4bc3-4df7-8a09-765794883524
2012-12-12 07:47:33 +00:00
li-elvin 0f8b02980e Added secure boot in CSM module entrypoint, if UEFI secure boot is enabled, CSM module cannot be started.
Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13537 6f19259b-4bc3-4df7-8a09-765794883524
2012-07-17 09:25:26 +00:00
li-elvin 74dee93181 Update the way to allocate high PMM, firstly try to allocate high PMM below 16MB, if it fails, allocate high PMM below 4GB.
Signed-off-by: li-elvin <elvin.li@intel.com>
Reviewed-by: jyao1 <jiewen.yao@intel.com>


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13352 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-23 07:26:17 +00:00
li-elvin befbc4f3fb Use PCD for PMM size and EndOpromShadowAddress to remove hard code value in CSM module.
Signed-off-by: li-elvin
Reviewed-by: jyao1

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12519 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-10 01:43:13 +00:00
li-elvin f767f99009 Update CSM module to provide the general solution when the Timer Arch Protocol is not 8254 timer. CSM module should set 8254 timer to 54ms for the execution in real mode.
Signed-off-by: li-elvin
Reviewed-by: jyao1


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12229 6f19259b-4bc3-4df7-8a09-765794883524
2011-08-30 05:52:28 +00:00
jljusten bcecde140a IntelFrameworkModulePkg: Add Compatibility Support Module (CSM) drivers
Added these drivers:
* LegacyBiosDxe
* BlockIoDxe
* KeyboardDxe
* Snp16Dxe
* VideoDxe

Signed-off-by: jljusten
Reviewed-by: mdkinney
Reviewed-by: geekboy15a

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11905 6f19259b-4bc3-4df7-8a09-765794883524
2011-06-27 23:32:56 +00:00