Commit Graph

27062 Commits

Author SHA1 Message Date
Gao, Zhichao da178f5c5c ShellPkg/SmbiosView: SMBIOS 3.3.0 Update "Intel persistent memory"
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

Memory Device (Type 17):
- SMBIOSCR00179: update the string for Intel persistent memory

Cc: Ray Ni <ray.ni@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00
Gao, Zhichao 77ad48a263 ShellPkg/SmbiosView: SMBIOS 3.3.0 Add value HBM and Die for type 17
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

Memory Device (Type 17):
- SMBIOSCR00178: add new memory device type value (HBM) and new form
factor value (Die)

Cc: Ray Ni <ray.ni@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00
Gao, Zhichao 16efcbbd3c ShellPkg/SmbiosView: SMBIOS 3.3.0 add support for CXL Flexbus
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

Various:
- SMBIOSCR00183: add support for CXL Flexbus

Cc: Ray Ni <ray.ni@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00
Gao, Zhichao 2a9ff5f33f ShellPkg/SmbiosView: SMBIOS 3.3.0 add PCI gen4 values for type 9
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

System Slots (Type 9):
- SMBIOSCR00184: add PCI Express Gen 4 values

Add the SmBios.h to use the MARCOs or enums.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00
Gao, Zhichao 4b7edd78a0 MdePkg/SmBios.h: SMBIOS 3.3.0 Update Intel Persistent Memory string
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

Memory Device (Type 17):
- SMBIOSCR00179: update the string for Intel persistent memory

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00
Gao, Zhichao 8019eb589a MdePkg/SmBios.h: SMBIOS 3.3.0 Add value HBM and Die for type 17
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

Memory Device (Type 17):
- SMBIOSCR00178: add new memory device type value (HBM) and new form
factor value (Die)

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00
Gao, Zhichao 9e50ef63e8 MdePkg/SmBios.h: SMBIOS 3.3.0 add support for CXL Flexbus
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

Various:
- SMBIOSCR00183: add support for CXL Flexbus

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00
Gao, Zhichao 70c50f1920 MdePkg/SmBios.h: SMBIOS 3.3.0 add PCI gen4 values for type 9
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

System Slots (Type 9):
- SMBIOSCR00184: add PCI Express Gen 4 values

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00
Jian J Wang c9af866cdd MdePkg: add null version of RngLib
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1871

This is null version of RngLib which should be used with modules that
inherit an (indirect) dependency on the RngLib class, but never actually
call RngLib APIs for consuming randomness.

To be more specific, if following components or functionalities are used
in a platform, the BaseRngLibNull should *not* be used. Instead, a non-Null
version of RngLib must be used (like BaseRngLib for IA32/X64, or future
DxeRngLibRngProtocol for all ARCHs).

- HddPasswordDxe.inf
- AES, TLS (TlsDxe.inf, TlsLib.inf), RSA_OAEP, RSA_PK1
- (If BaseRngLibNull interface ASSERTed at boot time)

Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-14 01:32:15 +00:00
Ray Ni c801f33d81 UefiCpuPkg/RegisterCpuFeature: Remove CPU_FEATURE_XD macro
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2329

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2019-11-13 07:26:16 +00:00
Ray Ni 6d17c9c24a UefiCpuPkg/CpuCommonFeaturesLib: Remove XD enable/disable logic
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2329

XD (ExecutionDisable) feature, when turned on, allows page table
entry BIT63 set to 1 indicating the memory pointed by the page table
is disallowed to execute.
DxeIpl::CreateIdentityMappingPageTables() enables the XD when CPU
supports it.
Later DxeCore modifies the page table to set the BIT63 to protect
the stack/heap to disallow code execution in stack/heap.

UefiCpuPkg/CpuCommonFeaturesLib enables/disables the XD feature
according to PcdCpuFeaturesSetting.
When XD is disabled, GP fault is generated immediately because some
page entries have BIT63 set.

To fix this issue, this patch removes the XD feature logic from
UefiCpuPkg/CpuCommonFeaturesLib so the XD feature is only taken
care of by DxeIpl.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2019-11-13 07:26:16 +00:00
Ni, Ray 49fb9f7e06 BaseTools: Fix build failure when using python38
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2304

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Bob C Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2019-11-13 03:47:48 +00:00
Feng, Bob C d847ac1f27 BaseTools: Enable MACRO for DSC Components section tag
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2308

This patch is to enable MACRO for Components section architecture
modifier.

Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-13 03:22:39 +00:00
Tan, Ming bfcf262488 EmulatorPkg/PlatformSmbiosDxe: fix a spell error of platform.
Old code use platfomr.
Change PlatfomrSmbiosDriverEntryPoint to PlatformSmbiosDriverEntryPoint.

Signed-off-by: Ming Tan <ming.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2019-11-13 02:11:03 +00:00
Michael D Kinney e92b155740 Readme.md: Update EDK II CI build branch name
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Update Readme.md to indicate that that status badges are for
the edk2/master branch.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2019-11-12 03:53:00 +00:00
Michael D Kinney 3b0631e57e Readme.md: Update EDK II CI build status badge and links
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Update Readme.md with the status badges from the Azure
Pipelines, tianocore organization, edk2-ci project

    https://dev.azure.com/tianocore/edk2-ci/_build

* Windows VS2019 CI pipeline badges and results
* Ubuntu GCC5 CI pipeline badges and results

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2019-11-12 01:29:23 +00:00
Michael D Kinney f8dd7c7018 Readme.md: Add CI build status badges
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Update Readme.md with status badges from the most recent
EDK II Continuous Integration(CI) build.

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2019-11-11 13:02:54 -08:00
Michael D Kinney 4baa783d5e .mergify: Add Mergify YML pull request rules configuration file
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add directory for the Mergify YML configuration files that
provides rules and actions used to process a pull request.

* Auto commit a PR from EDK II Maintainer with 'push' label
  set and all CI checks pass
* Auto close a PR from any developers without 'push' label
  set and all CI checks pass.
* Auto close a PR from a non EDK II Maintainer that has
  the 'push' label set.
* Post a comment to a PR that has a merge conflict.
  Submitter can resolved conflicts and reopen the PR.
* Post a comment to a PR that fails PatchCheck.py
  Submitter can resolve PatchCheck.py issues and
  reopen the PR.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:51 -08:00
Sean Brogan 106c7a991c .azurepipelines: Add Azure Pipelines YML configuration files
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YML configuration files used to run the EDK II Continuous
Integration (CI) checks on Azure Pipelines agents.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:47 -08:00
Sean Brogan 4eb2baba93 .pytool: Add CISettings.py and Readme.md
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add main python script for EDK II Continuous Integration (CI)
builds along with a Readme.md that provides a summary of the
packages, platforms, and checks performs during a CI build.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:44 -08:00
Michael D Kinney 3137900fc9 SignedCapsulePkg: Use BaseCryptLibNull to reduce package CI time
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Use BaseCryptLibNull for package CI builds to reduce package
build times.  Enabled with PYTOOL_CONTINUOUS_INTEGRATION in YAML
files.  By default PYTOOL_CONTINUOUS_INTEGRATION is not defined,
and the original lib mappings are preserved.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:41 -08:00
Michael D Kinney 30c00d7f19 UefiCpuPkg: Add YAML file for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:38 -08:00
Michael D Kinney e3b8a0081b ShellPkg: Add YAML file for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Zhichao Gao <zhichao.gao@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:34 -08:00
Michael D Kinney 566c45a533 SecurityPkg: Add YAML files for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Use BaseCryptLibNull for package CI builds to reduce package
build times.  Enabled with CONTINUOUS_INTEGRATION in YAML
files.  By default CONTINUOUS_INTEGRATION is not defined,
and the original lib mappings are preserved.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2019-11-11 13:02:30 -08:00
Michael D Kinney d495762a97 PcAtChipsetPkg: Add YAML files for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:27 -08:00
Michael D Kinney 420c859831 NetworkPkg: Add YAML file for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Use BaseCryptLibNull and TlsLibNull for package CI
builds to reduce package build times.  Enabled with
CONTINUOUS_INTEGRATION in YAML files.  By default
CONTINUOUS_INTEGRATION is not defined, and the
original lib mappings are preserved.

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:24 -08:00
Michael D Kinney 3059a38d5f MdePkg: Add YAML file for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:20 -08:00
Michael D Kinney e4612477b9 MdeModulePkg: Add YAML file for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:17 -08:00
Michael D Kinney 8bc648fe6c FmpDevicePkg: Add YAML file for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Use BaseCryptLibNull for package CI builds to reduce package
build times.  Enabled with CONTINUOUS_INTEGRATION in YAML
files.  By default CONTINUOUS_INTEGRATION is not defined,
and the original lib mappings are preserved.

Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:14 -08:00
Michael D Kinney 6d807aef57 FatPkg: Add YAML file for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:10 -08:00
Michael D Kinney f98a44541f CryptoPkg: Add YAML file for CI builds
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add YAML file to the package directory with the
configuration of the checks to perform during a
CI build.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Signed-off-by: Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:07 -08:00
Sean Brogan 9da7846c88 .pytool/Plugin: Add CI plugins
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add .pytool directory to the edk2 repository with the
following plugins.  These plugins are in a top level
directory because that can be used with all packages
and platforms.

* CharEncodingCheck
* CompilerPlugin
* DependencyCheck
* DscCompleteCheck
* GuidCheck
* LibraryClassCheck
* SpellCheck

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:02:03 -08:00
Sean Brogan de4ce46d6e BaseTools: Add BaseTools plugins to support CI
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add the following plugins that are required to support
EDK II Continuous Integration (CI) builds.  These plugins
are added to BaseTools because that support EDK II BaseTools
features.

* BuildToolsReportGenerator
* LinuxGcc5ToolChain
* WindowsResourceCompiler
* WindowsVsToolChain

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:01:58 -08:00
Sean Brogan f7978bb258 BaseTools: Add YAML files with path env and tool extdeps
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:01:53 -08:00
Sean Brogan 7569e35bc9 BaseTools: Add RC_PATH define for VS2017/2019
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add use of RC_PATH define that provides the path to the resource
compiler that is typically provided in a Windows SDK.  The path
changes with different Windows SDK releases.  This define is set
to the WINSDK_PATH_FOR_RC_EXE environment variable.  This
environment variable must be set to the path to the currently
installed resource compiler (rc.exe).

Update set_vsprefix_envs.bat to set WINSDK_PATH_FOR_RC_EXE
if a Windows SDK is detected.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:01:46 -08:00
Sean Brogan ab5892f260 pip-requirements.txt: Add python pip requirements file
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add pip requirements file that is used to install the
python pip modules build from the edk2-pytool-library and
edk2-pytool-extensions repositories.

These python modules provide the extensions required to
perform EDK II Continuous Integration(CI) builds.

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2019-11-11 13:01:31 -08:00
Sean Brogan 48760409cc .gitignore: Ignore python compiled files, extdeps, and vscode
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Update .gitignore to ignore .pyc files and __pycache__
directories.  Python based plugins can be added to any
package or platform, so these files and directories may
be present outside of BaseTools.

Ignore _extdep directories that are generated by the
pytool external dependency feature.

Ignore .vscode directories generated by the VS Code
editor.

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Kinney <michael.d.kinney@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-11 13:01:25 -08:00
Michael D Kinney 021eb1820e Maintainers.txt: Add continuous integration(CI) directories
https://bugzilla.tianocore.org/show_bug.cgi?id=2315

Add maintainers and reviewers for the directories associated
with continuous integration steps.
* .azurepipelines
* .mergify
* .pytool

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2019-11-11 13:01:16 -08:00
Leif Lindholm cc6854506c Readme.md: remove positional references from submodule description
Remove references to the number of submodules in the tree, as well as
reword the referring to specific submodules as "former" and "previous".
This means we won't need to keep updating the surrounding text if we
add/remove submodules.

Cc: Andrew Fish <afish@apple.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2019-11-11 15:56:43 +00:00
Jiewen Yao 995d8b8568 MdeModulePkg/Pci: Add DeviceSecurity support.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2303

Whenever a PCI device is discovered, PCI bus calls the
EDKII_DEVICE_SECURITY_PROTOCOL to authenticate it.
If the function returns success, the PCI bus allocates
the resource and installs the PCI_IO for the device.
If the function returns fail, the PCI bus skips the device.

It is similar to EFI_SECURITY_ARCH_PROTOCOL, which
is used to verify an EFI image.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Yun Lou <yun.lou@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2019-11-11 19:04:05 +08:00
Jiewen Yao 985e0a6de7 MdeModulePkg/dec: Add EdkiiDeviceSecurityProtocolGuid.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2303

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Yun Lou <yun.lou@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Ray Ni <ray.ni@intel.com>
2019-11-11 19:04:04 +08:00
Jiewen Yao aa4db5b15e MdeModulePkg/Include: Add DeviceSecurity.h
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2303

EDKII_DEVICE_SECURITY_PROTOCOL is used for device
measurement and/or authentication.
It is similar to EFI_SECURITY_ARCH_PROTOCOL.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Yun Lou <yun.lou@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Ray Ni <ray.ni@intel.com>
2019-11-11 19:04:04 +08:00
Jiewen Yao 05ca7ec3cf MdePkg/Include: Add DMTF SPDM definition.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2303

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yun Lou <yun.lou@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>
Reviewed by: Ray Ni <ray.ni@intel.com>
2019-11-11 19:04:04 +08:00
Jian J Wang fb92fe9e18 MdeModulePkg/Core/Dxe: free page 0 after disabling NULL pointer detection
To solve access issue reported by BZ1885, page 0 will be allocated to
avoid misuses if NULL pointer detection is enabled. It should be better
to be freed after EndOfDxe if BIT7 of PcdNullPointerDetectionPropertyMask
is set, because NULL pointer detection is no longer available after
EndOfDxe and there will be no access conflict.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1885
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2019-11-09 10:59:57 +08:00
Jian J Wang f9d0e5daa0 MdeModulePkg/DxeIplPeim: reserve page 0 for NULL pointer detection
When a boot loader examines the memory map, it can see that location 0
is available memory. If it chooses to use that memory, and
PcdNullPointerDetectionPropertyMask is enabled, use of memory in page 0
will cause an exception. This does occur when running the memtest86
program.

Leaving page 0 available is for legacy support purpose. Since we have
deprecated the support of legacy, the solution is just reserving it so
that it cannot be allocated for other uses.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1885
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2019-11-09 10:59:56 +08:00
Ard Biesheuvel f55c76b301 BaseTools/GenFw AARCH64: disregard ADRP instructions that are patched already
In order to permit the use of compilers that only implement the small
code model [which involves the use of ADRP instructions that require
4 KB segment alignment] for generating PE/COFF binaries with a small
footprint, we patch ADRP instructions into ADR instructions while doing
the ELF to PE/COFF conversion.

As it turns out, the linker may be doing the same, but for different
reasons: there is a silicon erratum #843419 for ARM Cortex-A53 which
affects ADRP instructions appearing at a certain offset in memory, and
one of the mitigations for this erratum is to patch them into ADR
instructions at link time if the symbol reference is within -/+ 1 MB.
However, the LD linker fails to update the static relocation tables, and
so we end up with an ADR instruction in the fully linked binary, but
with a relocation entry in the RELA section identifying it as an ADRP
instruction.

Since the linker has already updated the symbol reference, there is no
handling needed in GenFw for such instructions, and we can simply treat
it as an ordinary ADR. However, since it is guaranteed to be accompanied
by an add or load instruction with a LO12 relocation referencing the same
symbol, the section offset check we apply to ADR instructions is going to
take place anyway, so we can just disregard the ADR instruction entirely.

Reported-by: Eugene Cohen <eugene@hp.com>
Suggested-by: Eugene Cohen <eugene@hp.com>
Tested-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2019-11-08 08:58:15 +01:00
Marvin H?user 9e9f0be353 ShellPkg/CommandLib: Use first found UC for unsupported PlatformLang
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2300

On some firmwares PlatformLang is set to the local language (e.g. ru-RU),
however there is no Unicode Collation protocol instance that supports it.
As for missing PlatformLang, fall back to the first found instance.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Signed-off-by: Marvin Haeuser <mhaeuser@outlook.de>
2019-11-08 08:29:58 +08:00
Zhiguang Liu 0cecb1f99e BaseTools: Add support for parseing map files generated by CLANG9 in GenFv
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2320

Add support for parseing map files generated by CLANG9 in GenFv

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2019-11-08 08:29:36 +08:00
Zhiguang Liu 5cef92771f BaseTools: Add map file parsing support for CLANG9
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2019-11-08 08:29:36 +08:00
Ashish Singhal 601a18bf08 EmbeddedPkg/DtPlatformDxe: Add DT/ACPI Default Flexibility
Add a PCD to govern whether to use DT or ACPI in case the
variable governing this is not found or is not valid.

Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2019-11-07 12:54:53 +01:00