Table Descriptor and Level-3 Block entry descriptors have the same
translation table type value (ie: 0x3).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14771 6f19259b-4bc3-4df7-8a09-765794883524
The wrong attribute was used to set the region.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14676 6f19259b-4bc3-4df7-8a09-765794883524
Changing the attribute implies some cache management (clean & invalidate).
Preventing the cache management should improve the performance.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14568 6f19259b-4bc3-4df7-8a09-765794883524
- Fix the length used to set the GCD Memory Space attribute
- Print a warning message if the given length of a memory space region is not 4KB-aligned
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14562 6f19259b-4bc3-4df7-8a09-765794883524