As the shell inverts foreground and background it needs to be sure that it properly masks off the reserved bits and this is important since the foreground and background are not the same numbers of bits.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <Jaben.carsey@intel.com>
Reviewed-by: Tapan Shah <tapandshah@hp.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15681 6f19259b-4bc3-4df7-8a09-765794883524
Check for 8th bit being reserved as per UEFI spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <Jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Elvin Li <elvin.li@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15680 6f19259b-4bc3-4df7-8a09-765794883524
The cast to (void**) is needed for the last parameter of the AllocatePool call in malloc(). This is because type CPOOL_HEAD** is not automatically promoted to void**, as required by AllocatePool().
This was originally addressed in SVN revision 15474 but removed again in 15664.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daryl McDaniel <daryl.mcdaniel@intel.com>
Reviewed by: Stefan Kaeser <stefankaeser@hotmail.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15677 6f19259b-4bc3-4df7-8a09-765794883524
OVMF_VARS.fd and OVMF_CODE.fd split the variable store and the firmware
code in separate files.
The PCDs' values continue to depend only on FD_SIZE_1MB vs. FD_SIZE_2MB.
With the split files, it must be ensured on the QEMU command line that
OVMF_VARS.fd and OVMF_CODE.fd be contiguously mapped so that they end
exactly at 4GB. See QEMU commit 637a5acb (first released in v2.0.0).
In this patch we must take care to assign each PCD only once.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15670 6f19259b-4bc3-4df7-8a09-765794883524
This saves code duplication between the Ia32, Ia32X64, and X64 flavors,
and enables the next patch to include the varstore in new FD files by
reference.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15669 6f19259b-4bc3-4df7-8a09-765794883524
The overlap may happen when the address of Destination in
UnicodeStrToAsciiStr() or Source in AsciiStrToUnicodeStr()
is not two bytes aligned.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15665 6f19259b-4bc3-4df7-8a09-765794883524
StdLib/LibC/Uefi/GetPass.c
COPY to StdLib/PosixLib/GetPass/GetPass.c
DELETE
StdLib/PosixLib/GetPass/GetPass.c
NEW, COPIED from StdLib/LibC/Uefi/GetPass.c
StdLib/PosixLib/PosixLib.inf
Create a LibPosix library class to build all PosixLib functions into a single library.
Move GetPass from LibC/Uefi to PosixLib.inf
StdLib/LibC/Uefi/Uefi.inf
Remove GetPass.c from sources.
Remove IPF from VALID_ARCHITECTURES
Update VERSION_STRING
Align [Defines] on a two-character boundary
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daryl McDaniel <daryl.mcdaniel@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15663 6f19259b-4bc3-4df7-8a09-765794883524
The platform independant GET_CORE_POS has been replaced by the platform
dependent function ArmPlatformGetCorePosition().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15661 6f19259b-4bc3-4df7-8a09-765794883524
Reworked GetHIInputIP() function to use "NetLibStrToIp4()" library
function to parse the IPv4 address instead of doing it by itself.
Added function EditHIInputIP() in BdsHelper.c to edit an IPv4 address.
To be used when updating a tftp boot option.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15660 6f19259b-4bc3-4df7-8a09-765794883524
The AArch64 Vector Table must be aligned on a 2K boundary.
The FDF specification does not support 2K alignment but support 4K.
A clear comment has been added to help integrator to understand why the
assertion fails when porting to a new AArch64 platform.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15659 6f19259b-4bc3-4df7-8a09-765794883524
Some platforms might decide to not support PSCI in their FDT-aware Linux
system even if their firmware supports it.
It is the responsibility of the platform engineer to provide the appropriate FDT.
The PCD gArmTokenSpaceGuid.PcdArmPsciSupport is not required anymore.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15658 6f19259b-4bc3-4df7-8a09-765794883524
2. Save/restore CPU Interrupt state around sending IPI. It could avoid sending IPI be interrupted by CPU interrupt handler.
3. Add note for SetApicMode() API that must not be called from an interrupt handler or SMI handler.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com>
Reviewed-by: Mudusuru, Giri <giri.p.mudusuru@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15652 6f19259b-4bc3-4df7-8a09-765794883524
Its default value is 10 millisecond per IA32 manual.
Platform could customize this PCD value for performance requirement.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15650 6f19259b-4bc3-4df7-8a09-765794883524
Data & Instruction Caches can be kept enabled while the new
translation table is filled.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15647 6f19259b-4bc3-4df7-8a09-765794883524
WaitForEvent() are NULL.
Passing NULL pointer would cause a segmentation fault in the current code.
This change prevents to get segmentation faults in this case.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15643 6f19259b-4bc3-4df7-8a09-765794883524
Eric Dong
jyao1
Li, Elvin
Jordan Justen
Gao, Liming liming.gao
Jaben Carsey
lhauch
Daryl McDaniel
isakov-sl
Laszlo Ersek
Chen Fan
Tian, Feng
Star Zeng
Long, Qin
Ronald Cron
Olivier Martin
Jeff Fan
Fu, Siyuan
Eugene Cohen
Harry Liebel