All the required pending BaseTools patches have been merged.
This patch is not required anymore.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16275 6f19259b-4bc3-4df7-8a09-765794883524
This updated patch contains the patch:
- Fixed calculation of BaseOfCode in GenFw when the first code section is aligned:
Fixes the calculation of the PE/COFF header attribute .BaseOfCode. when the first ..text. section is aligned.
In the current code base, the alignment of the first code section is not taken into account for the calculation of BaseOfCode.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14628 6f19259b-4bc3-4df7-8a09-765794883524
- ARMLINUXGCC toolchain is now supported
- ARMGCC: Set '0x0' for the linkage base address
- Fixed Trim utility
- Fixed support for !include in DSC files
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12819 6f19259b-4bc3-4df7-8a09-765794883524
Every CPUs have their own initialization requirements.
This library allows to allows to abstract these initialization requirements
into the ARM Platform common components.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12448 6f19259b-4bc3-4df7-8a09-765794883524
The denomination 'Normal' was used to make reference to the 'Normal'
or 'Non Secure' or 'Non Trusted' world.
To avoid confusion, this prefix has been removed from PCDs to define
the normal world.
The PCDs explicitely related to the Secure/Trusted World continue to
have the 'Sec' prefix.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12416 6f19259b-4bc3-4df7-8a09-765794883524
In the previous version, every cores had the same stack size.
To avoid to waste memory with secondary core stacks, the primary core stack
size is now different from the secondary cores stack size.
These are the Stack PCDs and their default values:
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12415 6f19259b-4bc3-4df7-8a09-765794883524
- Give an overview of the different possible boot phases on ARM platforms (using
EDK2 for the full boot story or limiting its use to the last boot sequence)
- Show which functions to implement in ArmPlatformLib following the the boot phases
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12004 6f19259b-4bc3-4df7-8a09-765794883524
Olivier Martin
oliviermartin
andrewfish