This module is now identical in functionality to NorFlashDxe, and is no
longer used, so remove it altogether.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Now that the generic Variable Runtime DXE code no longer distinguishes
between gEfiVariableGuid and gEfiAuthenticatedVariableGuid in the varstore
FV header, we can relax the check in the NOR flash driver to accept either
GUID regardless of whether we are running a secure boot capable build or not.
This also means we can always use gEfiAuthenticatedVariableGuid when we
encounter an empty NOR flash that needs to be initialized before use. So
remove the mNorFlashVariableGuid global from the shared code and from both
versions of NorFlashDxe.inf. This essentially collapses the two drivers into
a single one, which means we can remove NorFlashAuthenticatedDxe entirely
in a subsequent patch.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This change corrects 3 problems in the PL011 driver.
1. The TRM states "The UARTLCR_H, UARTIBRD, and UARTFBRD registers must
not be changed:...when the UART is enabled"
2. The TRM (3.3.8) describes logic requiring the UART to be disabled and
flushed before adjusting UARTCR.
3. Several redundant calls get made to PL011UartInitializePort, where
the characteristics do not change, but updating the registers can
cause glitches in the output stream.
The parameters are compared to the current state and no action taken if
no change of state is required.
Where an update is required, the specified logic is followed, and the
register updates only made when the UART is disabled.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
On some platforms the UART clock is not the same for all the serial
ports. The PL011 driver must be capable of handling serial ports with
different clock rates, so must not rely on a PCD for the clock rate.
This patch allows the UART clock rate to be passed as a parameter
to PL011UartInitializePort(), which is called from the serial port
library. This patch also contains the corresponding changes in the
serial port library.
The PCD in Drivers/PL011Uart is replaced by an extra parameter for
PL011UartInitializePort. The PCD is moved to Library/PL011SerialPortLib
to supply the value to pass.
A corresponding patch to ArmVirtPkg is included in the same bundle to
align that with these changes.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
The variable LineControl was initialised to zero, then updated in a
condition. This change converts that to a write in each branch of the
condition, removing the Write/Read/Modify/Write sequence.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
The PCDs used in the PL011 UART Driver and Serial Port Library are
inherently "fixed at build". This change updates the source to use
Fixed PCDs for these values. This improves clarity and efficiency.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
This cosmetic change only tidies things up in preparation for actual
updates. (This reflects responses to a previously submitted patch,
which has been split into several discrete changes.)
There are no functional changes in this commit.
Changes comprise:
Minor corrections to comment typos.
Minor formatting mods.
Expansion of function comments.
Remove OUT from UartBase parameter.
Addition of #define for "magic mumbers".
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Since the only reason for keeping a local copy mRT of the gRT pointer
is to be able to call GetVariable/SetVariable at runtime, use the
UefiRuntimeLib helpers instead, so that we can drop mRT altogether.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
PL031RealTimeClockLib is a base library that could potentially (although
unlikely) be incorporated into other modules than the DXE_RUNTIME_DRIVER
module that it was intended to complement.
This means the library has no business whatsoever setting the Runtime
Service table pointers directly (since we have no way of knowing which
instance will 'win', and the pointers may end up referring to a module
that is not a DXE_RUNTIME_DRIVER). So remove the assignment altogether.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
When combining UEFI firmware built from Tianocore with ARM Trusted
Firmware running in EL3, it is the responsibility of ATF that only
a single core enters the UEFI firmware in EL2, and the remaining cores
are released directly to the OS via PSCI SMC calls.
In this case, we don't need the MpCore flavor of PrePi or PrePeiCore,
but the UniCore flavor currently checks the CPU identification registers
directly, and refuses to proceed if the boot CPU is part of a MpCore
system.
So drop the ASSERT()'s that implement this check.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
The PCI related PCDs are not platform specific, and architectural
protocols such as CpuIo2 are based on PCI provided MMIO to IO
translation, so these PCDs belong in ArmPkg not ArmPlatformPkg.
NOTE: this *WILL* break some out-of-tree platforms, the fix is changing
all consumers of gArmPlatformTokenSpaceGuid.PcdPci* to
gArmTokenSpaceGuid.PcdPci*
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
The 64-bit version of the DS-5 debug script that retrieves the debug file
path from the PE/COFF image in memory assumes that the PE/COFF header is
packed, and that the debug directory entry in the optional header appears
at a fixed offset into the file. This is no longer true, now that we pad
between the file header and the PE header if the section alignment exceeds
the size of the header (which may be the case when the module contains a
vector table or small model code, which requires 2 KB or 4 KB section
alignment, respectively), to allow this padding to be emitted if the image
is subsequently converted to TE format.
So replace the fixed offset with a dereference of the appropriate header
field.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reported-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
This patch adds a PCD for the PL011 UART Interrupt as this is needed by
the Serial Port Console Redirection Table.
Code at: 68f26f23a2
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This retypes some stack base PCD as 64-bit, and fixes up a number of references
to 64-bit PCDs (including the retypes ones), to use the correct PcdGet64()
accessors. Note that, in the case of FixedPcdGet64, this does not actually
caused any problems, since that resolves to an immediate value. But the
generic PcdGetxx accessors should be typed according to the size of the PCD.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leo Duran <leo.duran@amd.com>
[ard.biesheuvel: fixed up some instances in the 32-bit ARM code]
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Support multiple PL061 controllers. If platform gpio driver couldn't be
found, PL061 gpio driver will continue to load PcdPL061GpioBase as the
register base.
It could be compatible with the use case of current PL061 gpio driver.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
TC2 reads 0x02 for the PL180 ID3 register instead of 0x00 as defined in
the spec.
However, the spec [1] states that the contents of ID3 register represent
the "configuration option of the peripheral" and thus not part of the
Prime Cell identification.
For this patch, we drop checking the value in MCI_PERIPH_ID_REG3.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0172a/index.html
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
If the PL180 fails to probe, issue a warning on debug builds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
PL180 on TC2 has a dependency on gEfiCpuArchProtocolGuid. Without
adding the dependency, TC2 will crash in the PL180 driver.
This problem has been present since d340ef7 when TC2 stopped booting.
However, it was masked by 300fc77 which prevented PL180 from running on
TC2 due to TC2 using a version on PL180 newer than that documented
publicly.
[1] https://github.com/tianocore/edk2/commit/d340ef7
2014-08-26
ArmPkg/ArmArchTimerLib: Remove non required [depex] and IoLib
[2] https://github.com/tianocore/edk2/commit/300fc77
2015-08-25
ArmPlatformPkg/PL180MciDxe: check PrimeCell ID before initializing
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
In the recent migration of the ARM Ltd. platforms to
https://git.linaro.org/uefi/OpenPlatformPkg.git, this file unfortunately
got left behind. Delete it to reduce confusion and (further) risk of
duplication of effort.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
The PL061 GPIO controller is a bit of an anachronism, and the existing
driver does nothing to hide this - leading to it being very tricky to
read.
Rewrite it to document (in comments and code) what is actually
happening, and fix some bugs in the process.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
PL061Initialize() did not actually do anything other than call
PL061Identify() - so cut out the middle man.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
For whatever reason, every single operation on the PL061 looked for an
"Initialized" flag, and manually called the initialization function if
not set. Move this to a single call on protocol installation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
The copyright statement in PL061Gpio.c would not fit on a normal terminal
screen. Break lines at <= 80 characters.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Currently, we don't pick up removable media (USB drives) or storage
devices connected via plug-in cards. Take the sledge hammer approach
for now.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
The Juno .dsc and .fdf files were recently deleted (currently held
in OpenPlatformPkg), but a spurious Makefile for building using it
was left in place. Drop the Makefile to complete the cleanup.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Harking back to the earliest days of software development for AArch64,
this piece of code abstracted away "early setup stuff" when the
software model came out of reset.
However, it is unmaintained and has been superseded by ARM Trusted
Firmware. So drop it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Juno is now managed in OpenPlatformPkg, including the ACPI
tables - so delete this unmaintained copy.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
Juno doesn't have lots of DTB files in NOR flash, it only has 1 file,
called "board.dtb" and the motherboard configuration makes the right
choice about which DTB file gets written as board.dtb in NOR.
The code attempts to select which DTB it should use based on the board
variant or configuration. And this doesn't work because those DTB files
aren't present in NOR flash.
So remove the DTB variants and only load board.dtb.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Code was inserted to create default boot entries for Juno R1. These
don't work, but they are also preventing the board from booting into the
default options that Intel BDS would otherwise boot.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Setup the EFI System Table with information about the
Console Devices early, so that error messages in bds
are printed on the console earlier.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
The Sec library was built by the AARCH64 FVP models, but the binary was
unused because it was part of a legacy booting strategy from before ARM
Trusted Firmware came along.
This change requires changes in OpenPlatformPkg to remove the Sec binary
from the FVP build.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
This platform is untested and no longer supported, so remove it from the
tree.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
ARM Ltd Platform support is migrating to use OpenPlatformPkg [1].
Currently, Juno exists both in EDK2's ArmPlatformPkg and in
OpenPlatformPkg [2]. And they are starting to diverge, with
OpenPlatformPkg being the most up-to-date with current developments.
To prevent this divergence, remove the .dsc and .fdf files from
ArmPlatformPkg and leave OpenPlatformPkg as the master.
We can't remove ArmJuno.dec yet because ACPI still uses it to set the
include path to ArmPlatform.h.
[1] https://git.linaro.org/uefi/OpenPlatformPkg.git
[2] https://git.linaro.org/uefi/OpenPlatformPkg.git/tree/master:/Platforms/ARM/Juno
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
ARM Ltd Platform support is migrating to use OpenPlatformPkg [1].
Currently, FVP exists both in EDK2's ArmPlatformPkg and in
OpenPlatformPkg [2]. And they are starting to diverge, with
OpenPlatformPkg being the most up-to-date with current developments.
To prevent this divergence, remove the .dsc and .fdf files from
ArmPlatformPkg and leave OpenPlatformPkg as the master.
[1] https://git.linaro.org/uefi/OpenPlatformPkg.git
[2] https://git.linaro.org/uefi/OpenPlatformPkg.git/tree/master:/Platforms/ARM/VExpress
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
ARM Ltd Platform support is migrating to use OpenPlatformPkg [1].
Currently, TC2 exists both in EDK2's ArmPlatformPkg and in
OpenPlatformPkg [2]. And they are starting to diverge, with
OpenPlatformPkg being the most up-to-date with current developments.
To prevent this divergence, remove the .dsc and .fdf files from
ArmPlatformPkg and leave OpenPlatformPkg as the master.
[1] https://git.linaro.org/uefi/OpenPlatformPkg.git
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
The .dsc and .fdf files in ArmPlatformPkg are unused. Remove them as
part of a general cleanup of ArmPlatformPkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Problems have been encountered because some of the source files have
execute permission set. This can cause git to report them as changed
when they are checked out onto a file system with inherited permissions.
This has been seen using Cygwin, MinGW and PowerShell Git.
This patch makes no change to source file content, and only aims to
correct the file modes/permissions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19787 6f19259b-4bc3-4df7-8a09-765794883524
After fixing ArmGicEnableDistributor() in a previous patch, there is no
longer a reason to run the GICv3 in v2 mode, so remove the PCD override.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19275 6f19259b-4bc3-4df7-8a09-765794883524
The return_from_exception implementation in Sec/Helper.S (the GCC
version) deviates from the RVCT version, in a way that suggests that
both may have been broken at some point, and that they weren't fixed
in the same way nor at the same time.
So bring the GCC version in line with the RVCT version, and at the
same time, deobfuscate the comment.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19244 6f19259b-4bc3-4df7-8a09-765794883524
We can refer to gArmMpCoreInfoPpiGuid directly if we declare it under
[Ppis] in the library's .inf so there is no need to copy it into a
module local variable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19243 6f19259b-4bc3-4df7-8a09-765794883524
We can refer to gArmMpCoreInfoPpiGuid directly if we declare it under
[Ppis] in the library's .inf so there is no need to copy it into a
module local variable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19242 6f19259b-4bc3-4df7-8a09-765794883524
We can refer to gArmMpCoreInfoPpiGuid directly if we declare it under
[Ppis] in the library's .inf so there is no need to copy it into a
module local variable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19241 6f19259b-4bc3-4df7-8a09-765794883524
We can refer to gArmMpCoreInfoPpiGuid directly if we declare it under
[Ppis] in the library's .inf so there is no need to copy it into a
module local variable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19240 6f19259b-4bc3-4df7-8a09-765794883524
We can refer to gArmMpCoreInfoPpiGuid directly if we declare it under
[Ppis] in the library's .inf so there is no need to copy it into a
module local variable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19239 6f19259b-4bc3-4df7-8a09-765794883524
This is the complementary patch for the commit 7945b29, which strictly
aligns temporary heap size and temporary stack size, but does not do
the same thing when switching stack and heap to permanent memory, and
then it may cause fatal data corruption like PHIT HOB lost and stack
pointer unaligned.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19213 6f19259b-4bc3-4df7-8a09-765794883524
Now that we removed the complete ArmPlatformGlobalVariable implementation,
remove stale PCD references to it from ArmVExpress-CTA15-A7.dsc
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19173 6f19259b-4bc3-4df7-8a09-765794883524
RVCT does not like the arithmetic involving a VOID* pointer that was
introduced in SVN r19163, so use explicit casts instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19172 6f19259b-4bc3-4df7-8a09-765794883524
Instead of using fuzzy arithmetic with a hardcoded stack alignment value
of 0x4, use the symbolic constant CPU_STACK_ALIGNMENT (which is at least
8 bytes, btw) to round the temporary stack base and size.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19163 6f19259b-4bc3-4df7-8a09-765794883524
Now that we removed all references to the ArmGlobalVariable definitions
in the various lowlevel PrePi and PrePeiCore init routines, and removed
the PPI and HOB references from PlatformPeim, it is time to say goodbye
to ArmGlobalVariable. So remove the includes and the .DEC declarations.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19003 6f19259b-4bc3-4df7-8a09-765794883524