Commit Graph

28 Commits

Author SHA1 Message Date
Jeff Fan e41aad1521 1. Separated DxeSmmCpuExceptionHandlerLib.inf into 2 instance DxeCpuExceptionHandlerLib.inf and SmmCpuExceptionHandlerLib.inf.
2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions.
3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1.

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-22 06:24:41 +00:00
Samer El-Haj-Mahmoud 79aca636ab Fix several DEBUG_ERROR messages that are unnecessarily verbose. Several of these are marked as DEBUG_ERROR when they are really not errors.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hp.com>
reviewed-by: Fan, Jeff <jeff.fan@intel.com>
reviewed-by: Tian, Feng <feng.tian@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14750 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-08 09:27:02 +00:00
lzeng14 ce68d3bc68 Add missing braces around initializer.
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Qian Ouyang <qian.ouyang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13817 6f19259b-4bc3-4df7-8a09-765794883524
2012-10-11 02:15:23 +00:00
vanjeff be7256aeb0 Add type cast to avoid sign extension on x64 tip.
signed-off-by: Jeff Fan <jeff.fan@intel.com>
reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13709 6f19259b-4bc3-4df7-8a09-765794883524
2012-09-10 02:36:17 +00:00
rsun3 661cab5d6a UefiCpuPkg CpuDxe: Call UefiCpuLib.InitializeFloatingPointUnits () to initialize X87 FPU Control Word for BSP.
For a platform tip with 32-bit PEI+64-bit DXE, InitializeFloatingPointUnits () should be called for BSP in the DXE phase.

Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13511 6f19259b-4bc3-4df7-8a09-765794883524
2012-07-06 05:49:53 +00:00
geekboy15a d4605c23ea UefiCpuPkg: Added code to enable Local APIC.
This patch enables interrupt delivery via the Local APIC as part of the initialization process.

Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
Reviewed-by: Rosenbaum, Lee G <lee.g.rosenbaum@intel.com>
Reviewed-by: Sun Rui <rui.sun@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13338 6f19259b-4bc3-4df7-8a09-765794883524
2012-05-18 20:29:14 +00:00
vanjeff de4b64f714 Restore original IDT entry if RegisterInterruptHandler() was used to unregister user defined interrupt handler.
Signed-off-by: vanjeff
Reviewed-by: rsun3



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12719 6f19259b-4bc3-4df7-8a09-765794883524
2011-11-16 02:31:31 +00:00
vanjeff 2c4b1bdce7 Roll back the change on GetMemorySpaceAttributeFromMtrrType()'s parameter type, from MTRR_MEMORY_CACHE_TYPE to UINT8 since MtrrAttributes may be the value not belongs to MTRR_MEMORY_CACHE_TYPE.
Signed-off-by: vanjeff



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12609 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-31 06:45:56 +00:00
vanjeff 91ec78241c 1. Introduce the API MtrrGetDefaultMemoryType () in Mtrr Library.
2. Invoke MtrrGetDefaultMemoryType() to get the default memory type instead of the hard code value in module.
3. Add go though for UC attributes.

Signed-off-by: vanjeff
Reviewed-by: rsun3

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12587 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-28 06:01:55 +00:00
jljusten 323940278e UefiCpuPkg/CpuDxe: Put CPU to sleep during Idle events
When the MdeModulePkg gCoreEventIdleGuid event is signaled,
CpuSleep is called.  This will cause the CPU to sleep until
the next interrupt occurs.

Signed-off-by: jljusten
Reviewed-by: mdkinney
Reviewed-by: rsun3

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11842 6f19259b-4bc3-4df7-8a09-765794883524
2011-06-16 23:28:16 +00:00
vanjeff 62ba7e1704 CpuDxe entry point () only register exception handlers unassigned before.
Signed-off-by: vanjeff
Reviewed-by: rsun3

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11699 6f19259b-4bc3-4df7-8a09-765794883524
2011-05-25 02:35:34 +00:00
rsun3 4ec21e8b50 Per PI 1.2 errata B spec, for SetMemoryAttributes() service of CPU Architecture Protocol, EFI_INVALID_PARAMETER should be returned for cases:
If Attributes specifies a combination of memory attributes that cannot be set together, then EFI_INVALID_PARAMETER is returned. For example, if both EFI_MEMORY_UC and EFI_MEMORY_WT are set.

Signed-off-by: rsun3
Reviewed-by:  jyao1


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11694 6f19259b-4bc3-4df7-8a09-765794883524
2011-05-24 01:56:29 +00:00
mdkinney f877f3006e Add DEBUG() macros for DEBUG_CACHE to MTRR Library show all changes memory caches setting changes.
If DEBUG_PROPERTY_DEBUG_CODE_ENABLED is also set in PcdDebugPropertyMask, then the entire set of MTRRs will be displayed on every memory cache setting change.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11231 6f19259b-4bc3-4df7-8a09-765794883524
2011-01-06 02:57:26 +00:00
rsun3 304a39b746 Fix a bug that the size of a gate descriptor in the IDT is 8 bytes. The size is 8 bytes in 32-bit mode, while it is 16 bytes in 64-bit mode. Replace the hard-coded size with a sizeof.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11177 6f19259b-4bc3-4df7-8a09-765794883524
2010-12-17 02:38:26 +00:00
ydong10 1e51d5954b Refine code to follow the coding style.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10992 6f19259b-4bc3-4df7-8a09-765794883524
2010-11-01 09:00:23 +00:00
ydong10 c52acd89e8 Refine code to remove type converting warning.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10982 6f19259b-4bc3-4df7-8a09-765794883524
2010-10-26 07:52:31 +00:00
jljusten 557b970a2f UefiCpuPkg CpuDxe: Fix bug with CPU Arch RegisterInterruptHandler
The change in r10765 introduced an issue where inherited interrupt
handlers would override the driver's RegisterInterruptHandler
functionality.

DUET installs a IDT with 256 entries early in it's boot.  Therefore,
no interrupt handlers could be installed with DUET while using
UefiCpuPkg/CpuDxe (instead of DuetPkg/CpuDxe).

This change forces the IDT to be modified when RegisterInterruptHandler
is called to ensure the UEFI handler will be installed properly.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10972 6f19259b-4bc3-4df7-8a09-765794883524
2010-10-22 01:07:48 +00:00
xli24 5b7e61a0c5 Add explicit type cast to suppress possible warning of precession loss.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10783 6f19259b-4bc3-4df7-8a09-765794883524
2010-08-10 06:57:32 +00:00
mdkinney 0564ae5ee6 Inherit entries from previous IDT when new IDT is installed.
Update CS in each inherited IDT entry to match CS for the new GDT.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10765 6f19259b-4bc3-4df7-8a09-765794883524
2010-08-03 04:54:44 +00:00
xli24 430fbbe096 Code refinement.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10647 6f19259b-4bc3-4df7-8a09-765794883524
2010-07-13 03:08:54 +00:00
hhtian 01a1c0fc9e Update the copyright notice format
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10429 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-24 12:25:26 +00:00
xli24 947a573ada Add Checking for MTRR existence.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10223 6f19259b-4bc3-4df7-8a09-765794883524
2010-03-10 02:38:39 +00:00
xli24 5bdfa4e58a Add array index check to avoid potential buffer overflow.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10179 6f19259b-4bc3-4df7-8a09-765794883524
2010-03-04 06:38:22 +00:00
vanjeff dc8f418d71 roll back changing on save and restore interrupt status, it needn't doing.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10059 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-24 08:29:53 +00:00
jljusten 6640eb366c UefiCpuPkg/CpuDxe: Fix build error
This driver was not building following the r9935 & r9941 changes.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9969 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-10 17:37:37 +00:00
vanjeff ea99e00d76 a)Save and disable CPU interrupt before calling AsmWriteIdtr().
b)Restore CPU interrupt status after callng AsmWriteIdtr().


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9956 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-09 09:23:17 +00:00
jyao1 3b9be4164b Original MTRR lib hardcode VARIABLE_MTRR as 8. But it is 7 in Core2 if SMRR enabled, and 10 in latest Corei7.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9935 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-05 06:33:42 +00:00
jljusten a47463f283 Add CPU DXE driver for IA32 & X64 processor architectures.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8395 6f19259b-4bc3-4df7-8a09-765794883524
2009-05-27 21:09:47 +00:00