Olivier Martin d4c92adef7 ArmPlatformPkg/ArmVExpressLibCTA9x4: Fixed the initial secondary core bringup when remapping DRAM at 0x0 ... If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from wfe (waiting for the memory to be initialized) as the instruction is still in the remapped flash region at 0x0 to make them jumping into the C-code which lives in the NOR1 at 0x44000000 before the region 0x0 is remapped as DRAM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14910 6f19259b-4bc3-4df7-8a09-765794883524		2013-11-28 21:38:32 +00:00
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ArmVExpressSecLib.inf	ArmPlatformPkg/ArmVExpressLibCTA9x4: Fixed the initial secondary core bringup when remapping DRAM at 0x0	2013-11-28 21:38:32 +00:00
CTA9x4Boot.S	ArmPlatformPkg: Introduced 'ArmPlatformSecLib'	2012-05-02 20:13:32 +00:00
CTA9x4Boot.asm	ArmPkg: Fixed RVCT compiler warnings	2012-07-04 20:06:23 +00:00
CTA9x4Sec.c	ArmPlatformPkg/ArmVExpressLibCTA9x4: Fixed the initial secondary core bringup when remapping DRAM at 0x0	2013-11-28 21:38:32 +00:00