mirror of https://github.com/acidanthera/audk.git
30b7a50bac
The current CPU_REGISTER_TABLE_ENTRY structure only defined UINT32 Index to indicate MSR/MMIO address. It's ok for MSR because MSR address is UINT32 type actually. But for MMIO address, UINT32 limits MMIO address exceeds 4GB. This update on CPU_REGISTER_TABLE_ENTRY is to add additional UINT32 field HighIndex to indicate the high 32bit MMIO address and original Index still indicate the low 32bit MMIO address. This update makes use of original padding space between ValidBitLength and Value to add HighIndex. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> |
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| .. | ||
| Application/Cpuid | ||
| CpuDxe | ||
| CpuFeatures | ||
| CpuIo2Dxe | ||
| CpuIo2Smm | ||
| CpuIoPei | ||
| CpuMpPei | ||
| CpuS3DataDxe | ||
| Feature/Capsule | ||
| Include | ||
| Library | ||
| PiSmmCommunication | ||
| PiSmmCpuDxeSmm | ||
| ResetVector | ||
| SecCore | ||
| Universal/Acpi/S3Resume2Pei | ||
| Contributions.txt | ||
| License.txt | ||
| UefiCpuPkg.dec | ||
| UefiCpuPkg.dsc | ||
| UefiCpuPkg.uni | ||
| UefiCpuPkgExtra.uni | ||