mirror of https://github.com/acidanthera/audk.git
839bd17973
This patch is to fix issue when splitting leaf paging entry in CpuPageTableLib code. In previous code, before we assign the new child paging structure address to the content of splitted paging entry, PageTableLibSetPnle() is called to make sure the bit7 is set to 0, which indicate the previous leaf entry is changed to non-leaf entry now. There is a gap between we change the bit7 and we assign the new child paging structure address to the content of the splitted paging entry. If the address of code execution or data access happens to be in the range covered by the splitted paging entry, this gap may cause issue. In this patch, we prepare the new paging entry content value in a local variable and assign the value to the splitted paging entry at once. The volatile keyword is used to ensure that no optimization will occur in compilation. Signed-off-by: Dun Tan <dun.tan@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Zhou Jianfeng <jianfeng.zhou@intel.com> |
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| .. | ||
| AmdSvsmLibNull | ||
| BaseRiscV64CpuExceptionHandlerLib | ||
| BaseRiscV64CpuTimerLib | ||
| BaseRiscVMmuLib | ||
| BaseXApicLib | ||
| BaseXApicX2ApicLib | ||
| CcExitLibNull | ||
| CpuCacheInfoLib | ||
| CpuCommonFeaturesLib | ||
| CpuExceptionHandlerLib | ||
| CpuMmuLib | ||
| CpuPageTableLib | ||
| CpuTimerLib | ||
| MicrocodeLib | ||
| MmSaveStateLib | ||
| MpInitLib | ||
| MpInitLibUp | ||
| MtrrLib | ||
| PlatformSecLibNull | ||
| RegisterCpuFeaturesLib | ||
| SecPeiDxeTimerLibUefiCpu | ||
| SmmCpuFeaturesLib | ||
| SmmCpuPlatformHookLibNull | ||
| SmmCpuRendezvousLib | ||
| SmmCpuSyncLib | ||
| SmmRelocationLib | ||