Jiaxin Wu a232e0cd2f UefiCpuPkg/PiSmmCpuDxeSmm: Save and restore CR2 only if SmiProfile enable ... A page fault (#PF) that triggers an update to the page table only occurs if SmiProfile is enabled. Therefore, it is necessary to save and restore the CR2 register if SmiProfile is configured to be enabled. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>		2024-10-16 04:06:42 +00:00
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Cet.nasm	UefiCpuPkg: Use macro CR4_CET_BIT to replace hard code value in Cet.nasm.	2023-12-07 09:43:43 +00:00
PageTbl.c	UefiCpuPkg/PiSmmCpuDxeSmm: Save and restore CR2 only if SmiProfile enable	2024-10-16 04:06:42 +00:00
SmiEntry.nasm	UefiCpuPkg: Backup and Restore MSR IA32_U_CET in SMI handler.	2023-12-07 09:43:43 +00:00
SmiException.nasm	UefiCpuPkg/PiSmmCpuDxeSmm: Enable single step after SmmProfile start	2024-08-02 05:13:42 +00:00
SmmFuncsArch.c	UefiCpuPkg/PiSmmCpuDxeSmm: Rename PiSmmCpuDxeSmm.h to PiSmmCpuCommon.h	2024-08-28 15:25:27 +00:00
SmmFuncsArchDxeSmm.c	UefiCpuPkg/PiSmmCpuDxeSmm: Remove RestrictedMemoryAccess check for MM CPU	2024-09-06 08:41:49 +00:00
SmmProfileArch.c	UefiCpuPkg/PiSmmCpuDxeSmm: Rename PiSmmCpuDxeSmm.h to PiSmmCpuCommon.h	2024-08-28 15:25:27 +00:00
SmmProfileArch.h	UefiCpuPkg: rename the SmiDefaultPFHandler function	2024-08-05 06:59:09 +00:00