mirror of https://github.com/acidanthera/audk.git
e8aa4c6546
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4511 With 64 bit build we are seeing the CD in control register CR 0 set. This causes the NEM to disabled for some specific bios profiles. Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Debkumar De <debkumar.de@intel.com> Cc: Catharine West <catharine.west@intel.com> Signed-off-by: Wu, Mingliang <mingliangx.wu@intel.com> |
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|---|---|---|
| .. | ||
| Ia16 | ||
| Ia32 | ||
| X64 | ||
| CommonMacros.inc | ||
| DebugDisabled.asm | ||
| Main.asm | ||
| PageTables.inc | ||
| Port80Debug.asm | ||
| PostCodes.inc | ||
| ReadMe.txt | ||
| ResetVector.uni | ||
| ResetVectorExtra.uni | ||
| SerialDebug.asm | ||
| Vtf0.inf | ||
| Vtf0.nasmb | ||
ReadMe.txt
=== HOW TO USE VTF0 === Add this line to your DSC [Components.IA32] or [Components.X64] section: UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf Add this line to your FDF FV section: INF RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf In your FDF FFS file rules sections add: [Rule.Common.SEC.RESET_VECTOR] FILE RAW = $(NAMED_GUID) { RAW BIN |.bin } === VTF0 Boot Flow === 1. Transition to IA32 flat mode 2. Locate BFV (Boot Firmware Volume) by checking every 4kb boundary 3. Locate SEC image 4. X64 VTF0 transitions to X64 mode 5. Call SEC image entry point == VTF0 SEC input parameters == All inputs to SEC image are register based: EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test) DI - 'BP': boot-strap processor, or 'AP': application processor EBP/RBP - Pointer to the start of the Boot Firmware Volume