2011-09-23 00:53:54 +02:00
|
|
|
#/** @file
|
|
|
|
|
#
|
2013-07-18 21:06:52 +02:00
|
|
|
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
2011-09-23 00:53:54 +02:00
|
|
|
#
|
|
|
|
|
# This program and the accompanying materials
|
|
|
|
|
# are licensed and made available under the terms and conditions of the BSD License
|
|
|
|
|
# which accompanies this distribution. The full text of the license may be found at
|
|
|
|
|
# http://opensource.org/licenses/bsd-license.php
|
|
|
|
|
#
|
|
|
|
|
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
|
|
|
|
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|
|
|
|
#
|
|
|
|
|
#**/
|
|
|
|
|
|
|
|
|
|
[Defines]
|
|
|
|
|
DEC_SPECIFICATION = 0x00010005
|
|
|
|
|
PACKAGE_NAME = ArmPlatformPkg
|
|
|
|
|
PACKAGE_GUID = 3308e0a0-1d94-11e0-915c-0002a5d5c51b
|
|
|
|
|
PACKAGE_VERSION = 0.1
|
|
|
|
|
|
|
|
|
|
################################################################################
|
|
|
|
|
#
|
|
|
|
|
# Include Section - list of Include Paths that are provided by this package.
|
|
|
|
|
# Comments are used for Keywords and Module Types.
|
|
|
|
|
#
|
|
|
|
|
# Supported Module Types:
|
|
|
|
|
# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
|
|
|
|
|
#
|
|
|
|
|
################################################################################
|
|
|
|
|
[Includes.common]
|
|
|
|
|
Include # Root include for the package
|
|
|
|
|
|
|
|
|
|
[Guids.common]
|
|
|
|
|
gArmPlatformTokenSpaceGuid = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } }
|
|
|
|
|
#
|
|
|
|
|
# Following Guid must match FILE_GUID in MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
|
|
|
|
#
|
|
|
|
|
gVariableRuntimeDxeFileGuid = { 0xcbd2e4d5, 0x7068, 0x4ff5, { 0xb4, 0x62, 0x98, 0x22, 0xb4, 0xad, 0x8d, 0x60 } }
|
|
|
|
|
|
2011-09-23 01:11:03 +02:00
|
|
|
## Include/Guid/ArmGlobalVariableHob.h
|
|
|
|
|
gArmGlobalVariableGuid = { 0xc3253c90, 0xa24f, 0x4599, { 0xa6, 0x64, 0x1f, 0x88, 0x13, 0x77, 0x8f, 0xc9} }
|
|
|
|
|
|
|
|
|
|
[Ppis]
|
|
|
|
|
## Include/Ppi/ArmGlobalVariable.h
|
|
|
|
|
gArmGlobalVariablePpiGuid = { 0xab1c1816, 0xd542, 0x4e6f, {0x9b, 0x1e, 0x8e, 0xcd, 0x92, 0x53, 0xe2, 0xe7} }
|
|
|
|
|
|
2011-09-23 00:53:54 +02:00
|
|
|
[PcdsFeatureFlag.common]
|
|
|
|
|
# Set this PCD to TRUE to map NORFlash at 0x0. FALSE means the DRAM is mapped at 0x0.
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping|FALSE|BOOLEAN|0x00000012
|
|
|
|
|
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE|BOOLEAN|0x00000001
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|FALSE|BOOLEAN|0x00000002
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004
|
|
|
|
|
|
2012-02-28 18:32:47 +01:00
|
|
|
gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C
|
2013-09-23 11:40:27 +02:00
|
|
|
|
|
|
|
|
# Disable the GOP controller on ExitBootServices(). By default the value is FALSE,
|
|
|
|
|
# we assume the OS will handle the FrameBuffer from the UEFI GOP information.
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D
|
|
|
|
|
|
2011-09-23 00:53:54 +02:00
|
|
|
[PcdsFixedAtBuild.common]
|
2012-09-28 12:43:28 +02:00
|
|
|
gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039
|
2011-09-23 01:05:20 +02:00
|
|
|
gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038
|
|
|
|
|
|
2011-09-23 00:53:54 +02:00
|
|
|
# Stack for CPU Cores in Secure Mode
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0|UINT32|0x00000005
|
2011-09-23 01:05:20 +02:00
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000|UINT32|0x00000036
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000|UINT32|0x00000006
|
2011-09-23 00:53:54 +02:00
|
|
|
|
|
|
|
|
# Stack for CPU Cores in Non Secure Mode
|
2011-09-23 01:05:20 +02:00
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT32|0x00000009
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A
|
2011-09-23 00:53:54 +02:00
|
|
|
|
|
|
|
|
# Size of the region used by UEFI in permanent memory (Reserved 128MB by default)
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015
|
|
|
|
|
|
|
|
|
|
# Size to reserve in the primary core stack for PEI Global Variables
|
|
|
|
|
# = sizeof(UINTN) /* PcdPeiServicePtr or HobListPtr */
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize|0x4|UINT32|0x00000016
|
|
|
|
|
# PeiServicePtr and HobListPtr shares the same location in the PEI Global Variable list
|
|
|
|
|
# PeiServicePtr is only valid with PEI Core and HobListPtr only when the PEI Core is skipped.
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset|0x0|UINT32|0x00000017
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset|0x0|UINT32|0x00000018
|
|
|
|
|
|
2011-09-23 01:11:03 +02:00
|
|
|
# Size to reserve in the primary core stack for SEC Global Variables
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize|0x0|UINT32|0x00000031
|
|
|
|
|
|
2011-09-23 00:53:54 +02:00
|
|
|
#
|
|
|
|
|
# ARM Primecells
|
|
|
|
|
#
|
|
|
|
|
|
|
|
|
|
## SP804 DualTimer
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz|1|UINT32|0x0000001D
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicInterruptNum|0|UINT32|0x0000001E
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicBase|0|UINT32|0x0000002A
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase|0|UINT32|0x0000002B
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase|0|UINT32|0x0000002C
|
|
|
|
|
|
|
|
|
|
## SP805 Watchdog
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021
|
|
|
|
|
|
|
|
|
|
## PL011 UART
|
2012-02-29 18:19:52 +01:00
|
|
|
gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D
|
2011-09-23 00:53:54 +02:00
|
|
|
|
|
|
|
|
## PL031 RealTimeClock
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022
|
|
|
|
|
|
|
|
|
|
## PL061 GPIO
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdPL061GpioBase|0x0|UINT32|0x00000025
|
|
|
|
|
|
2012-02-28 18:09:16 +01:00
|
|
|
## PL111 Lcd & HdLcd
|
2011-09-23 00:53:54 +02:00
|
|
|
gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027
|
|
|
|
|
|
|
|
|
|
## PL180 MCI
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029
|
|
|
|
|
|
|
|
|
|
#
|
|
|
|
|
# BDS - Boot Manager
|
|
|
|
|
#
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Platform"|VOID*|0x00000019
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Default Boot Device"|VOID*|0x0000000C
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L""|VOID*|0x0000000D
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdDefaultBootInitrdPath|L""|VOID*|0x0000000E
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|""|VOID*|0x000000F
|
|
|
|
|
# PcdDefaultBootType define the type of the binary pointed by PcdDefaultBootDevicePath:
|
|
|
|
|
# - 0 = an EFI application
|
|
|
|
|
# - 1 = a Linux kernel with ATAG support
|
|
|
|
|
# - 2 = a Linux kernel with FDT support
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdDefaultBootType|0|UINT32|0x00000010
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdFdtDevicePath|L""|VOID*|0x00000011
|
|
|
|
|
|
|
|
|
|
## Timeout value for displaying progressing bar in before boot OS.
|
|
|
|
|
# According to UEFI 2.0 spec, the default TimeOut should be 0xffff.
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|0xffff|UINT16|0x0000001A
|
|
|
|
|
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L""|VOID*|0x0000001B
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L""|VOID*|0x0000001C
|
2013-07-18 21:06:52 +02:00
|
|
|
|
|
|
|
|
[PcdsFixedAtBuild.ARM]
|
|
|
|
|
# Stack for CPU Cores in Secure Monitor Mode
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000007
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000|UINT32|0x00000008
|
|
|
|
|
|
|
|
|
|
[PcdsFixedAtBuild.AARCH64]
|
|
|
|
|
# The Secure World is only running in EL3. Only one set of stacks is needed for AArch64.
|
|
|
|
|
# The Secure stacks are described by PcdCPUCoresSecStackBase, PcdCPUCoreSecPrimaryStackSize
|
|
|
|
|
# and PcdCPUCoreSecSecondaryStackSize
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000007
|
|
|
|
|
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x0|UINT32|0x00000008
|
|
|
|
|
|
