audk/UefiCpuPkg/CpuDxe/CpuDxe.inf

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## @file
# CPU driver installs CPU Architecture Protocol and CPU MP protocol.
#
# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = CpuDxe
MODULE_UNI_FILE = CpuDxe.uni
FILE_GUID = 1A1E4886-9517-440e-9FDE-3BE44CEE2136
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = InitializeCpu
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
CpuLib
DebugLib
DxeServicesTableLib
MemoryAllocationLib
MtrrLib
UefiBootServicesTableLib
UefiDriverEntryPoint
LocalApicLib
UefiCpuLib
UefiLib
CpuExceptionHandlerLib
HobLib
ReportStatusCodeLib
MpInitLib
TimerLib
PeCoffGetEntryPointLib
[Sources]
CpuDxe.c
CpuDxe.h
CpuGdt.c
CpuGdt.h
CpuMp.c
CpuMp.h
CpuPageTable.h
CpuPageTable.c
[Sources.IA32]
Ia32/CpuAsm.nasm
Ia32/PagingAttribute.c
[Sources.X64]
X64/CpuAsm.nasm
X64/PagingAttribute.c
[Protocols]
gEfiCpuArchProtocolGuid ## PRODUCES
gEfiMpServiceProtocolGuid ## PRODUCES
UefiCpuPkg/CpuDxe: allow accessing (DXE) page table in SMM mode The MdePkg/Library/SmmMemoryAllocationLib, used only by DXE_SMM_DRIVER, allows to free memory allocated in DXE (before EndOfDxe). This is done by checking the memory range and calling gBS services to do real operation if the memory to free is out of SMRAM. If some memory related features, like Heap Guard, are enabled, gBS interface will turn to EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes(), provided by DXE driver UefiCpuPkg/CpuDxe, to change memory paging attributes. This means we have part of DXE code running in SMM mode in certain circumstances. Because page table in SMM mode is different from DXE mode and CpuDxe always uses current registers (CR0, CR3, etc.) to get memory paging attributes, it cannot get the correct attributes of DXE memory in SMM mode from SMM page table. This will cause incorrect memory manipulations, like fail the releasing of Guard pages if Heap Guard is enabled. The solution in this patch is to store the DXE page table information (e.g. value of CR0, CR3 registers, etc.) in a global variable of CpuDxe driver. If CpuDxe detects it's in SMM mode, it will use this global variable to access page table instead of current processor registers. This can avoid retrieving wrong DXE memory paging attributes and changing SMM page table attributes unexpectedly. Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2018-06-14 03:51:34 +02:00
gEfiSmmBase2ProtocolGuid ## SOMETIMES_CONSUMES
[Guids]
gIdleLoopEventGuid ## CONSUMES ## Event
gEfiVectorHandoffTableGuid ## SOMETIMES_CONSUMES ## SystemTable
[Ppis]
gEfiSecPlatformInformation2PpiGuid ## UNDEFINED # HOB
gEfiSecPlatformInformationPpiGuid ## UNDEFINED # HOB
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize ## CONSUMES
[Depex]
TRUE
[UserExtensions.TianoCore."ExtraFiles"]
CpuDxeExtra.uni