The timer frequency for the FVP Architectural Timers have been aligned to 100Mhz.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15555 6f19259b-4bc3-4df7-8a09-765794883524
FVB (for instance for UEFI Variable) might not be at the
start of the NOR Flash. 'Lba' needs to be fixed up for it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15532 6f19259b-4bc3-4df7-8a09-765794883524
This fixes a bug whereby the image description is written over file data when
the file's size is close to a multiple of the block size.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15517 6f19259b-4bc3-4df7-8a09-765794883524
This prevents writing to a garbage location if the file has not been flushed
before, as its BlockStart and BlockEnd are not set.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15514 6f19259b-4bc3-4df7-8a09-765794883524
Now that NorFlashDxe implements DiskIo directly and at a fine granularity
this significantly improves performance.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15512 6f19259b-4bc3-4df7-8a09-765794883524
Trusted Firmware will declare this region of DRAM as secure.
There is no way for the non-secure world to access this memory region.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15511 6f19259b-4bc3-4df7-8a09-765794883524
AARCH64 does not have a BIC-with-immediate instruction. GAS assembles it as a
AND with the immediate inverted, but Clang's integrated assembler emits an
error.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15509 6f19259b-4bc3-4df7-8a09-765794883524
This ensures the .type directive is used to mark them as function symbols
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15506 6f19259b-4bc3-4df7-8a09-765794883524
Some non-GCC toolchain might support the GNU assembly language.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15504 6f19259b-4bc3-4df7-8a09-765794883524
This improves performance by accessing NOR with the fine granularity that
the hardware permits, rather than the coarse granularity assumed by DiskIoDxe.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15502 6f19259b-4bc3-4df7-8a09-765794883524
- Only read what needs reading, don't read the whole block.
- Don't write back buffers containing no data after an erase.
- Reduce number of NOR erases when writing data. Only erase the block
when required.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15500 6f19259b-4bc3-4df7-8a09-765794883524
This is the on board Versatile Express Ethernet controller.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15486 6f19259b-4bc3-4df7-8a09-765794883524
This information give a hint to reserve some contiguous pages for runtime
regions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15466 6f19259b-4bc3-4df7-8a09-765794883524
The FVP Foundation model has additional DRAM regions at 0x08_8000_0000.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15464 6f19259b-4bc3-4df7-8a09-765794883524
The FVP Base and Foundation models have additional DRAM regions at
0x08_8000_0000.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15461 6f19259b-4bc3-4df7-8a09-765794883524
This code is only specific to the ARM Versatile Express hardware board.
There is no concept of logic tile on the FVP model.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15460 6f19259b-4bc3-4df7-8a09-765794883524
EFI OS Loader application will be responsible to start their needed drivers.
While other EFI applications (eg: EFI Shell) expect to have all their drivers
started when they run.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15458 6f19259b-4bc3-4df7-8a09-765794883524
Some limitations:
- it only supports unicode string that use ASCII character (< 0x100)
- single character ASCII strings are interpreted as Unicode string
- string cannot be longer than 2 x BOOT_DEVICE_OPTION_MAX (600 bytes)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15455 6f19259b-4bc3-4df7-8a09-765794883524
OptionalData for EFI Application does not contain any more specific information about the ArmPlatformPkg/Bds.
OptionalData now only contains the data pass to the EFI application.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15451 6f19259b-4bc3-4df7-8a09-765794883524
Most UEFI applications expect unicode string parameter.
This change is allows to support Ascii or Unicode strings.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15450 6f19259b-4bc3-4df7-8a09-765794883524
- Added the NOR Flash region to the Runtime UEFI Memory Mapped IO
- Caught the gEfiEventVirtualAddressChangeGuid event to fixup the NOR Flash pointers
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15438 6f19259b-4bc3-4df7-8a09-765794883524
- No allocation during Runtime mode (post ExitBootServices())
- Allocate all the persistent data into runtime space
- Do not access BootServices API during Runtime mode
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15437 6f19259b-4bc3-4df7-8a09-765794883524
- Removed PCD base address from the macro definition. The base address needs to be fixup when the driver runs in UEFI Runtime mode
- Added the PL031 controller memory region to the Runtime UEFI Memory Mapped IO
- Caught the gEfiEventVirtualAddressChangeGuid event to fixup the PL031 Base address
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15435 6f19259b-4bc3-4df7-8a09-765794883524
The stack size in the entrypoint (ie: $ARCH/ModuleEntryPoint.S) is calculated such as
StackSize = PrimaryCoreStack + (core_count - 1) * SecondaryCoreStack
While we were declaring the stacksize into the stack hob as:
StackSize = PrimaryCoreStack + (cluster * 8) * SecondaryCoreStack
If the number of cluster (ie: PcdClusterCount) were not defined correctly then
the stack size declaration were not correct.
It could cause stack corruption if the allocator allocates memory in this range.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15431 6f19259b-4bc3-4df7-8a09-765794883524
If EditHIInputStr() is called, say with a MaxCmdLine of 2, the user is
currently allowed to enter 2 characters.
If the second character is a carriage return/line feed, this is
substituted with a NULL and the function returns.
If the second character is a regular character, the loop terminated and
the function returns. However, the buffer has not been NULL terminated.
This patch prevents the user from entering a regular character as the
final character and ensures that the only way out of the input is by
pressing ESC or ENTER (or equivalent).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15325 6f19259b-4bc3-4df7-8a09-765794883524
That includes an implementation of FASTBOOT_PLATFORM_PROTOCOL for
ARM Versatile Express.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15317 6f19259b-4bc3-4df7-8a09-765794883524