1. Update edksetup.bat and toolsetup.bat to handle PACKAGES_PATH.
BaseTools directory may be in PACKAGES_PATH instead of WORKSAPCE.
2. Introduce EDK_TOOLS_BIN env points to the windows binary tools dir.
Windows BaseTools Win32 may be a separate directory.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Wu Hao A <hao.a.wu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18582 6f19259b-4bc3-4df7-8a09-765794883524
Update ECC to refer MultipleWorkspace class to convert
the file path from WORKSPACE and PACKAGES_PATH.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Li YangX <yangx.li@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18581 6f19259b-4bc3-4df7-8a09-765794883524
WORKSPACE is still kept.
New PACKAGES_PATH is introduced to specify the additional WORKSPACEs.
In PACKAGES_PATH, ';' is separator in Windows, ':' is separator in Linux.
Build directory is in WORKSPACE. Package, BaseTools and Conf directory
will be found from WORKSPACE and PACKAGES_PATH.
In implementation, BaseTools adds MultipleWorkspace class for
the file path conversion from WORKSPACE and PACKAGES_PATH.
Verify two tree layouts.
Root\edk2\MdePkg
Root\edk2\MdeMdeModulePkg
Root\edk2\...
1. set WORKSPACE=Root\edk2
2. set WORKSPACE=Root, and set PACKAGES_PATH=Root\edk2
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Li YangX <yangx.li@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18579 6f19259b-4bc3-4df7-8a09-765794883524
With gcc5 and enabling SECURE_BOOT and NETWORK_IP6, the build
failed with this error:
GenFv: ERROR 3000: Invalid
the required fv image size 0x814c18 exceeds the set fv image size 0x800000
Raise the DXEFV size to 9 MB to fix the build error.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Ching-Pang Lin <glin@suse.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18577 6f19259b-4bc3-4df7-8a09-765794883524
When looping through all PCI functions, code should not look for functions
1-7 if function 0 is not present or if function 0 indicates the device is
not multifunction. Prior to this fix the code would use stale data in a
buffer to determine if a device is multifunction even if function 0 is not
present. This fixes a code bug and provides very small performance
improvements.
PCI 2.3 Specification states: They [multifunction devices] are also
required to always implement function 0 in the device. Implementing other
functions is optional and may be assigned in any order.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Joseph Shifflett <joseph.shifflett@hpe.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18575 6f19259b-4bc3-4df7-8a09-765794883524
When looping through all PCI functions, code should not look for functions
1-7 if function 0 is not present or if function 0 indicates the device is
not multifunction. Prior to this fix the code would use stale data in a
buffer to determine if a device is multifunction even if function 0 is not
present. This fixes a code bug and provides very small performance
improvements.
PCI 2.3 Specification states: They [multifunction devices] are also
required to always implement function 0 in the device. Implementing other
functions is optional and may be assigned in any order.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Joseph Shifflett <joseph.shifflett@hpe.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18574 6f19259b-4bc3-4df7-8a09-765794883524
Currently the MADT signature and revision is mapped to v1.0 macros
which results in MADT with incorrect entries in the header for Juno.
This patch fixes these EFI_ACPI_*_0_MULTIPLE_APIC_DESCRIPTION_TABLE
macros by using appropriate v5.0 versions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18572 6f19259b-4bc3-4df7-8a09-765794883524
These are no longer used by any platform in the tree, nor are they
of any significance to any out of tree platforms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18571 6f19259b-4bc3-4df7-8a09-765794883524
All our page tables are allocated from memory whose cacheability
attributes are inherited by the cacheability bits in the MMU control
register, so there is no need for explicit cache maintenance after
updating the page tables. And even if there were, Set/Way operations
are not appropriate anyway for ensuring that these changes make it to
main memory. So just remove the explicit cache maintenance completely.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18570 6f19259b-4bc3-4df7-8a09-765794883524
As it turns out, upstream GCC only supports the AArch64 'tiny' code
model as of version 4.9. Since the default 'small' code model requires
4 KB section alignment (which is undesirable for the XIP modules),
revert GCC 4.7 and 4.8 to using the 'large' code model instead.
Reported-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18569 6f19259b-4bc3-4df7-8a09-765794883524
Now that the AArch64 MMU code correctly identifies and handles
naturally aligned regions of more than 2 MB in size, it will happily
try to use block mappings at level 0 to map huge memory regions, such
as the single cacheable 1:1 mapping we use for Xen domU to map the
entire PA space. However, block mappings are not supported at level 0
so the resulting translation tables will be incorrect, causing
execution to fail as soon as the MMU is enabled.
So use level 1 as the minimum level at which to perform block
translations.
Reported-by: Julien Grall <julien.grall@citrix.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18568 6f19259b-4bc3-4df7-8a09-765794883524
In order to support the Properties Table memory protection feature
on 32-bit ARM, build DXE_RUNTIME_DRIVER type binaries with 4 KB section
alignment by setting the common-page-size linker command line option.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18567 6f19259b-4bc3-4df7-8a09-765794883524
In order to support the Properties Table memory protection feature
on 32-bit ARM, build DXE_RUNTIME_DRIVER type binaries with 4 KB section
alignment by setting the common-page-size linker command line option.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18566 6f19259b-4bc3-4df7-8a09-765794883524
Instead of using the ARM builtin linker script for GNU ld, use the
new unified one instead. This will allow us to increase the section
alignment for DXE_RUNTIME_MODULEs, which is a prerequisite for
enabling the UEFIv2.5 Properties Table memory protection feature.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18565 6f19259b-4bc3-4df7-8a09-765794883524
Increase the section alignment to 4 KB for DXE_RUNTIME_DRIVER modules.
This allows the OS to map them with tightened permissions (i.e., R-X for
.text and RW- for .data). This is a prerequisite for enabling the
EFI_PROPERTIES_RUNTIME_MEMORY_PROTECTION_NON_EXECUTABLE_PE_DATA (sic)
feature that was introduced in UEFIv2.5.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18564 6f19259b-4bc3-4df7-8a09-765794883524
The input length should be "The size, in bytes, of Buffer.",
the divide sizeof (UINT16) operation is not needed and incorrect.
Cc: David Wei <david.wei@intel.com>
Cc: Tim He <tim.he@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18563 6f19259b-4bc3-4df7-8a09-765794883524
Current implementation assumes the performance entry count has no change from
multiple GetPerformanceMeasurement() while loops, it may cause the allocated buffer
for PerfEntriesAsDxeHandle at the first loop to be overflowed if the following loop has
the count changed.
This patch is also to sync the change at
commit R18417 "MdeModulePkg: Fix a performance data buffer overrun issue".
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18562 6f19259b-4bc3-4df7-8a09-765794883524
Current implementation assumes the performance entry count has no change from
multiple GetPerformanceMeasurement() while loops, it may cause the allocated buffer
for PerfEntriesAsDxeHandle at the first loop to be overflowed if the following loop has
the count changed.
This patch is also to sync the change at
commit R17851 "IntelFrameworkModulePkg GenericBdsLib: Resolve array size mismatch".
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18561 6f19259b-4bc3-4df7-8a09-765794883524
Ip4Config2 protocol implementation must request for DNS server info when the
policy is set to DHCP. And when a DHCP server responds to it with a list of
DNS server addresses, it must parse it and set it for the instance. Without
this, nobody can do a Ip4Config->GetData for DNS server IPs before calling
Dns->Configure(). This will mean a DHCP is initiated when calling
Dns->Configure(), thus causing serious performance issues. This patch
attempts to address this issue.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hpe.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18560 6f19259b-4bc3-4df7-8a09-765794883524
NetLibGetSystemGuid gets the UUID from SMBIOS table to use as the System GUID
(in DHCP and other network use cases). This change adds support to get the
UUID from either SMBIOS 2.x or 3.0, since SMBIOS 3.0 uses a different GUID in
the System Configuration Table.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hpe.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18559 6f19259b-4bc3-4df7-8a09-765794883524
TestArgv.nsh is a very simple shell script to test how the interpreter parses
the parameters. It uses ShellCTestApp.efi to dump the parameters passed from the
interpreter.
TestArgv.log is the desired output created using "TestArgv.nsh > TestArgv.log".
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18558 6f19259b-4bc3-4df7-8a09-765794883524
Build all the optional libraries unconditionally so we can catch changes and how they affect the package regardless of the NO_SHELL_PROFILES,
INCLUDE_DP, and INCLUDE_TFTP_COMMAND settings.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18557 6f19259b-4bc3-4df7-8a09-765794883524
There is AARCH64 specific code in the PE/COFF loader to handle relocations
of type EFI_IMAGE_REL_BASED_DIR64 which is dead code since this type is
handled by generic code and never handed to the AARCH64 specific routine.
So remove it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18556 6f19259b-4bc3-4df7-8a09-765794883524
The TFTP command is easy to use, it has very nice documentation
(accessible with "HELP TFTP" in the shell), and it's a very versatile
tool for downloading files from the host to the guest, via virtual
network, while the guest is in the UEFI shell.
Even better, enabling this command in the shell increases the
uncompressed FVMAIN size only by 8192 bytes, in my AARCH64 build of
VirtArmQemu.dsc, and the final size increase (after LZMA compression)
that is visible in the FVMAIN_COMPACT volume is merely 1976 bytes.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18555 6f19259b-4bc3-4df7-8a09-765794883524
The TFTP command is easy to use, it has very nice documentation
(accessible with "HELP TFTP" in the shell), and it's a very versatile tool
for downloading files from the host to the guest, via virtual network,
while the guest is in the UEFI shell.
Even better, enabling this command in the shell increases the uncompressed
DXEFV size only by 12896 bytes, in my X64 build, and the final size
increase (after LZMA compression) that is visible in the FVMAIN_COMPACT
volume is merely 2576 bytes.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18554 6f19259b-4bc3-4df7-8a09-765794883524
Add the missing EFIAPI calling convention to the CheckPacket() function.
Without it, the gcc build breaks due to the incompatible pointer
assignment in "Mtftp4Token.CheckPacket = CheckPacket".
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18553 6f19259b-4bc3-4df7-8a09-765794883524
CpuData buffer should be located in allocated buffer instead of at end of
WakeupBuffer.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18550 6f19259b-4bc3-4df7-8a09-765794883524
The patch fixes iSCSI driver can't reinstate itself when configured
in AutoConfigure mode and IPv6 stack is actually used.
The issue occurs when iSCSI driver communicates with
iSCSI LIO target in IPv6 path and the target sends
back TCP FIN packets randomly.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Fu siyuan <siyuan.fu@intel.com>
Reviewed-by: Wu jiaxin <jiaxin.wu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18546 6f19259b-4bc3-4df7-8a09-765794883524
A DMA-like transfer interface has recently been implemented in QEMU for
fw-cfg. For ARM and AARCH64 virtual machines, the binding prescribes a new
8-byte wide register at offset 0x10 in the register block. Make VirtFdtDxe
expose this register if it is present.
Please see "docs/specs/fw_cfg.txt" in the QEMU tree for more information.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18544 6f19259b-4bc3-4df7-8a09-765794883524
Disable the RVCT size optimization that may put sections at an offset
that is not aligned to their own alignment, by adding the --no_legacyalign
switch to the RVCT linker command line. This is necessary since such sections
cannot be correctly converted into PE/COFF sections without padding them at
the front, which defeats the purpose of the optimization anyway.
With the optimization gone, we can also remove the special case for ARM in
GenFw that could result in corrupt PE/COFF images to be emitted. Instead,
sections whose base address is not aligned correctly are outright rejected.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18540 6f19259b-4bc3-4df7-8a09-765794883524
ARM and RVCT apply to 32-bit code only, so remove any references
to them (including the workaround for the linker) from the 64-bit
version of ElfConvert.c
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18539 6f19259b-4bc3-4df7-8a09-765794883524
Interrupt must be disabled before we storing ELR and other system
registers, or else ELR will be overridden by interrupt reentrance.
This bug is critical as we may get occasional exception or dead loop
when interrupt reentrance occurs:
After increasing SP ... Before popping out registers
Or
After restoring ELR
The 1st circumstance could also be resolved by optimizing SP operation
(Pop out registers before adding SP back), but the 2nd could not be
resolved by disabling interrupt.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18538 6f19259b-4bc3-4df7-8a09-765794883524
Commit SVN r18503 ("MdeModulePkg DxeCore: Take the range in resource
HOB for PHIT as higher priority") changed the GCD init logic to take
the sum of the region sizes in gMemoryTypeInformation[] into account
when estimating the minimal amount of memory needed to boot the system.
Unfortunately, as an unintended side effect, this change results in boot
failures of ArmVirtQemu when running with QEMU's default memory size of
128 MB. The reason is that the sum of the gMemoryTypeInformation region
sizes plus the size of the inital PEI region exceeds 128 MB. Since we do
not actually need to preallocate 20,000 pages' worth of BootServicesData
memory, reduce this figure to the more reasonable 12,000.
Reported-by: Mark Rutland <mark.rutland@arm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18533 6f19259b-4bc3-4df7-8a09-765794883524
In this patch, we replace the traditional IDE driver stack that comes from
PcAtChipsetPkg and IntelFrameworkModulePkg with more featureful drivers
from OvmfPkg and MdeModulePkg. The resultant driver stack is compatible
with the previous one, but provides more protocols, on more kinds of
virtual hardware.
Remove:
- PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf
(removing EFI_IDE_CONTROLLER_INIT_PROTOCOL [1])
Remove the dependent:
- IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
(removing EFI_DISK_INFO_PROTOCOL [2],
EFI_BLOCK_IO_PROTOCOL [3])
As replacement, add:
- OvmfPkg/SataControllerDxe/SataControllerDxe.inf
(supplying EFI_IDE_CONTROLLER_INIT_PROTOCOL [1])
On top of which, add the dependent:
- MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
(providing EFI_ATA_PASS_THRU_PROTOCOL,
EFI_EXT_SCSI_PASS_THRU_PROTOCOL)
On top of which, add the dependent:
- MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
(supplying EFI_DISK_INFO_PROTOCOL [2],
EFI_BLOCK_IO_PROTOCOL [3],
providing EFI_BLOCK_IO2PROTOCOL,
EFI_STORAGE_SECURITY_COMMAND_PROTOCOL)
Cc: Alexander Graf <agraf@suse.de>
Cc: Reza Jelveh <reza.jelveh@tuhh.de>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Gabriel L. Somlo <somlo@cmu.edu>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Reza Jelveh <reza.jelveh@tuhh.de>
[lersek@redhat.com: rewrote commit message]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18532 6f19259b-4bc3-4df7-8a09-765794883524
The OpenFirmware device paths that QEMU generates for these disks and
CD-ROMs are very similar to those generated for the i440fx IDE disks and
CD-ROMs (including the same number of devpath nodes necessary for unique
parsing). The interpretations and the translation to UEFI devpath
fragments are different, of course.
(The spaces after "ide@1,1" are inserted below only for illustration
purposes.)
primary or secondary
| master or slave
v v
i440fx IDE: /pci@i0cf8/ide@1,1 /drive@0/disk@0
Q35 SATA: /pci@i0cf8/pci8086,2922@1f,2/drive@1/disk@0
^ ^
| device number
| (fixed 0)
channel (port) number
The similarity is reflected in the translation output (spaces again
inserted for illustration only):
i440fx IDE: PciRoot(0x0)/Pci(0x1,0x1) /Ata(Primary,Master,0x0)
Q35 SATA: PciRoot(0x0)/Pci(0x1F,0x2)/Sata(0x1,0x0,0x0)
^ ^ ^
| | LUN;
| | always 0 on Q35
| port multiplier port
| number; always 0 on Q35
channel (port) number
Cc: Alexander Graf <agraf@suse.de>
Cc: Reza Jelveh <reza.jelveh@tuhh.de>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Gabriel L. Somlo <somlo@cmu.edu>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18531 6f19259b-4bc3-4df7-8a09-765794883524
IdeControllerDxe installs EFI_IDE_CONTROLLER_INIT_PROTOCOL interface(s),
and consumes PciIo. The comments in the INF file state the opposite at the
moment, fix them.
Cc: Alexander Graf <agraf@suse.de>
Cc: Reza Jelveh <reza.jelveh@tuhh.de>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Gabriel L. Somlo <somlo@cmu.edu>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18530 6f19259b-4bc3-4df7-8a09-765794883524
Some IDE controllers only update ID fields such as sector information on
specific commands such as the DIAG command.
The master/slave device is therefore selected both before and after
sending the DIAG command; otherwise reading the IDE registers yields the
master's ID fields.
(Reza's patch originally *moved* the master/slave selection from after the
DIAG command before it, however Feng asked for the original master/slave
select to be preserved; effectively making the master/slave select
*bracket* the DIAG command. See this subthread:
<http://thread.gmane.org/gmane.comp.bios.tianocore.devel/10545/focus=10550>.)
Cc: Alexander Graf <agraf@suse.de>
Cc: Reza Jelveh <reza.jelveh@tuhh.de>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Gabriel L. Somlo <somlo@cmu.edu>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Reza Jelveh <reza.jelveh@tuhh.de>
[feng.tian@intel.com: see above]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
[lersek@redhat.com: updated commit message]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18529 6f19259b-4bc3-4df7-8a09-765794883524
When we bind the SATA controller in SataControllerStart(), we read the NP
("Number of Ports") bitfield from the CAP ("HBA Capabilities") register of
the controller. (See the AHCI 1.3.1 spec.)
This register is memory mapped. If we'd like to access it, we must at
least enable memory space access for the device. In addition, Feng Tian
recommended enabling Bus Master DMA in
<http://thread.gmane.org/gmane.comp.bios.tianocore.devel/10545/focus=10659>.
We also enable IO space access for completeness.
Further, because we change the PCI attributes of the device with the above
when binding it, we must also restore its original PCI attributes when
unbinding it. See the Driver Writer's Guide for UEFI 2.3.1 v1.01, section
18.3 "PCI drivers" | 18.3.2 "Start() and Stop()".
(OvmfPkg's copy of SataControllerDxe differs from the same in DuetPkg
because Duet inherits a pre-configured SATA controller from the BIOS, as
explained by Feng. Technically, DuetPkg's SataControllerDxe could also
apply the technique seen in this patch.)
Cc: Alexander Graf <agraf@suse.de>
Cc: Reza Jelveh <reza.jelveh@tuhh.de>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Gabriel L. Somlo <somlo@cmu.edu>
Cc: Feng Tian <feng.tian@intel.com>
Suggested-by: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18528 6f19259b-4bc3-4df7-8a09-765794883524
Liming Gao
Li YangX
Hesheng Chen
Jordan Justen
Gary Ching-Pang Lin
Supreeth Venkatesh
Joseph Shifflett
Samer El-Haj-Mahmoud
Sudeep Holla
Ard Biesheuvel
Star Zeng
Ruiyu Ni
Qiu Shumin
Laszlo Ersek
Jeff Fan
Ye Ting
Jaben Carsey
Heyi Guo
Reza Jelveh