* EFI_DHCP6_DUID structure declares Duid[1], so the size
of that structure is not large enough to hold an entire
Duid. Instead, compute the correct size to allocate an
EFI_DHCP6_DUID structure.
* Dhcp6AppendOption() takes a length parameter that in
network order. Update test cases to make sure a network
order length is passed in. A value of 0x0004 was being
passed in and was then converted to 0x0400 length and
buffer overflow was detected.
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Change conditional check to check the array index before
reading the array member to prevent read past end of buffer.
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Unit test checks if AppendDevicePathInstance() returns NULL.
In those cases, AppendDevicePathInstance() does not allocate
a device path, so the call to FreePool() must not be performed.
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Consume PcdMaxMappingAddressBeforeTempRamExit for page table creation in
permanent memory before Temp Ram Exit.
This patch will create the full page table in two steps:
Step 1: Create the max address in page table before the Temporary RAM exit.
Step 2: Create the full range page table after the Temporary RAM exit.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
This change is made for boot performance considerations.
Before the Temporary RAM is disabled, the permanent memory is in UC
state, causing the creation of the page table in
permanent memory to take more time with larger page table sizes.
Therefore, this patch adds the PcdMaxMappingAddressBeforeTempRamExit
to provide the platform with the capability to control the max
mapping address in page table before Temp Ram Exit. The value of
0xFFFFFFFFFFFFFFFF, then firmware will map entire physical address
space.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Remove unnecessary check in API MmIsBufferOutsideMmValid of
StandaloneMmMemLib.
The API is used to check if a input buffer is outside MMRAM and
inside a valid non-MMRAM range. Previously, the API only checks
if the input buffer is
overlapped with MMRAM range. In the last
commit, we add logic to check if the input buffer is inside valid
non-MMRAM
ranges reported by the resource HOB. Since the resource
HOB only covers valid non-MMRAM ranges, we doesn't need to check
if the input buffer is inside the MMRAM anymore.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Check if the all the resource HOB in the input HOB list of
MmCore entry only covers non-Mmram ranges. The Resource HOB
is to describe the accessible non-Mmram range. All Resource
HOB should not overlap with any Mmram range.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Separate a function called InitializeMmHobList() to gather
all the operations related to initializing HOB. It doesn't
change any code logic.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Check if the non-MMRAM buffer is inside valid non-mmram
range in API MmIsBufferOutsideMmValid of StandaloneMmMemLib.
Previously, the API only checks if the input buffer is
overlapped with MMRAM range. Currently, in the new standalone
MM infrastructure, we limit the non-MMRAM access to the ranges
reported by the resource HOB. To meet the new design, in this
API, we cache all the memory ranges reported by the resource
HOB and check if the input buffer is inside valid non-MMRAM
ranges reported by the resource HOB.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Add a internal header file for StandaloneMmMemLib.
Move some common reference and declaration into
StandaloneMmMemLibInternal.h.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Remove unneeded check MmIsBufferOutsideMmValid() when
StandaloneMmCore checks if the BS data memory described
by a memory allocation HOB needs to be migrated to Mmram.
Currently, the API MmIsBufferOutsideMmValid() return TRUE
when input memory range belongs to non-Mmram memory. Now
the API will be changed in following 5 commits to return
TRUE when a memory range belongs to non-Mmram memroy and
the memory is inside a range described by resource HOB.
This may cause PF when some SMI handler access the memory
from a memory allocation HOB that is not migrated.
To solve this issue, we can directly remove the check
MmIsBufferOutsideMmValid() and always migrate the BS data
memory described by a memory allocation HOB to Mmram.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Clang compile will optimize undefined behavior (UB)
like a pointer with NULL + size, so it is better to
check the pointer before using it.
Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Openssl 3.0.15 has a larger memory footprint.
Updating from EDK 2022.2 (openssl 1.1.j) to 2024.2 (openssl 3.0.15)
causes our EFI provisioning application[1] to fail due to an out of
memory condition.
On inspection, at the time of that fault, 2022.2 had an additional 900
pages. This is why this patch proposes the increase of the ScratchMemory
buffer by that same ammount.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/jejb/efitools.git
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Per AMD64 Architecture Programmer's Manual Volume 2: System
Programming - 10.2.3 SMRAM State-Save Area (Rev 24593), the AMD64
architecture does not use the legacy SMM state-save area format
(Table 10-2) for 32-bit SMRAM save state map. Clean up codes for the
invalid save state map.
Signed-off-by: Phil Noh <Phil.Noh@amd.com>
Includes changes across the repo for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest
Co-authored-by: Taylor Beebe <tabeebe@microsoft.com>
Co-authored-by: kenlautner <85201046+kenlautner@users.noreply.github.com>
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4858
Ph52a PCIE to SATA card inserted on Intel MTL/ARL causes system hanged.
Root cause of this issue is because Ph52a's driver only uses DevicePath
protocol alone and EDK2 driver only uses PciIo protocol alone. Both
drivers start and try to manage SATA controller.
Signed-off-by: Paul Chang <paulchang@ami.com>
There are couples of gUniversalPayloadAcpiTableGuid in
payload , only build one
gUniversalPayloadAcpiTableGuid hob and acpi memory hob.
when the reserved memory address matched the rsdp.
Signed-off-by: Linus Liu <linus.liu@intel.com>
Per other platform request , need to add SMBIOS device node into FDT.
In the current phase(1) , only supporting SM3EntryPoint structure.
Signed-off-by: Linus Liu <linus.liu@intel.com>
4-level paging supports translating 48-bit linear addresses to 52-bit
physical addresses. Since linear addresses are sign-extended,
the linear-address space of 4-level paging is: [0, 2^47-1] and
[0xffff8000_00000000, 0xffffffff_ffffffff]. So only [0, 2^47-1]
linear-address range maps to the identical physical-address range
when 5-Level paging is disabled.
Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Makes changes to comply with alerts raised by CodeQL.
The issues here fall into the following category:
1. comparison-with-wider-type
Signed-off-by: Eeshan Londhe <eeshanlondhe@microsoft.com>
As discussed with the stewards, I have decided to resume my role as a
maintainer in the Tianocore project (if they will have me, of course)
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Check if input buffer range unblockable:
1.The input buffer range to block should be totally covered
by one or multi memory allocation HOB
2.All the memory allocation HOB that overlap with the input
buffer range should be EfiRuntimeServicesData, EfiACPIMemoryNVS
or EfiReservedMemoryType.
Signed-off-by: Dun Tan <dun.tan@intel.com>
storage data format
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4857
NVS needs to support both authenticated and non-authenticated
header for NV region. PcdNvStoreDefaultValueBuffer can have
variables with data format of the type Authenticated variable storage
and this change provides the support to differentiate between
the normal variable storage and authenticated variable storage
for the hii database to consume and update the setup variables
accordingly
Signed-off-by: nikhil p sheshagiri <nikhil.p.sheshagiri@intel.com>
BFV is outside the MMRAM. Currently, StandaloneMmIplPei uses the API
MmUnblockMemoryRequest() to unblock the access for the BFV. However,
the BFV's memory might be gone after ExitBootService event. If any
access to the memory, unexpected error would happen.
To fix the above issue, StandaloneMmCore should shadow standalone BFV
into MMRAM before processing it, then free the shadowed BFV after MM
driver dispatch is done.
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
Without this change, when building OvmfPkg with -D SMM_REQUIRE using
the XCODE5 toolchain we get:
error: equality comparison with extraneous parentheses
which stops the build.
Signed-off-by: Mike Beaton <mjsbeaton@gmail.com>
In current implementation of MmCommunication, caller (StandaloneMmIplPei
or MmCommunicationDxe) sets the IsCommBufferValid to TRUE and triggers
synchronous MMI, then caller resets IsCommBufferValid to FLASE after MMI
exits.
If asynchronous MMI happens before caller resets the IsCommBufferValid
to FALSE, StandaloneMmCore will mistakenly thought there is still a
synchronous MMI and then update incorrect values into ReturnStatus and
ReturnBufferSize.
To fix the above issue, StandaloneMmCore should reset IsCommBufferValid
to FALSE before MMI exits.
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
Includes changes across the module for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest
Co-authored-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Includes changes across the module for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest
Co-authored-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Includes changes across the module for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest
Co-authored-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Includes changes across the module for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest
Co-authored-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Includes changes across the module for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest
Co-authored-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Includes changes across the module for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest
Co-authored-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Includes changes across the module for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest
Co-authored-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Includes changes across the module for the following CodeQL rules:
- cpp/comparison-with-wider-type
- cpp/overflow-buffer
- cpp/redundant-null-check-param
- cpp/uselesstest
Co-authored-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Return from `FspsWrapperInitDispatchMode()` if a buffer allocation
fails instead of attempting to dereference the pointer.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1559
Initializes the variable to prevent an uninitialized variable
warning in Visual Studio with C4701 enabled.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
On AARCH64, there is no ordering guarantee between configuration
space (ECAM) writes and memory space reads (MMIO). ARM AMBA CHI
only guarantees ordering for reads and writes within a single address
region, however, on some systems MMIO and ECAM may be split into
separateaddress regions.
A problem may arise when an ECAM write is issued a completion before a
subsequent MMIO read is issued and receives a completion.
For example, a typical PCI software flow is the following:
1. ECAM write to device command register to enable memory space
2. MMIO read from device memory space for which access was enabled
in step 1.
There is no guarantee that step 2. will not begin before the completion
of step 1.
on systems where ECAM/MMIO are specified as separate address regions,
even
if both spaces have the memory attributes device-nGnRnE.
- Add a barrier after the final PCI Configuration space write
in RootBridgeIoPciAccess. Configuration space reads should not have
side-efects.
- When configuration space is strongly ordered, this ensures
that program execution cannot continue until the completion
is received for the previous Cfg-Write, which may have side-effects.
- Risk of reading a "write-only" register and causing a CA which leaves
the device unresponsive. The expectation based on the PCI Base Spec
v6.1 section 7.4 is that all PCI Spec-defined registers will be readable,
however, there may exist design-specific registers that fall into
this category.
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
Co-authored-by: Ard Biesheuvel <ardb@kernel.org>
To simplify automatic formatting of new code, this feature lets a
local developer specify the `UNCRUSTIFY_IN_PLACE=TRUE` parameter on
the command line to automatically format files.
This is particularly useful when a large amount of new code needs
to be formatted in batch.
See the readme for more details.
Co-authored-by: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Clang build breaks with the following error:
| DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c:1441:20:
| error: result of comparison of constant 256 with expression of type 'UINT8'
| (aka 'unsigned char') is always false [-Werror,-Wtautological-constant-out-of-range-compare]
| 1441 | (AccessSize > 256)) ||
| | ~~~~~~~~~~ ^ ~~~
| 1 error generated.
AccessSize is UINT8 and the maximum value for UINT8 is 255, so the
comparision is unnecessary. Drop the check to fix the build.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
