The long value substitution must move to the front of
HEX substitution, and updated build_rule to add --trim-long
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yingke Liu <yingke.d.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18170 6f19259b-4bc3-4df7-8a09-765794883524
EDKII usb stack is using a TPL_CALLBACK timer to monitor async transfer
request and signal event if it's done. As usb enumeration and usb mass
storage block i/o read/write runs on TPL_CALLBACK and TPL_NOTIFY level
respectively, It blocks usb async transfer requests, usually usb mouse
/use kb, getting time to run.
Without this change, user couldn't get usb mouse/kb state in time (will
show a little lag from UI view) when there is other usb transactions, such
as a new usb device inserted.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18169 6f19259b-4bc3-4df7-8a09-765794883524
Fix issue about ping fail with IPv4, which is caused by the incorrect
checksum in request message.
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18167 6f19259b-4bc3-4df7-8a09-765794883524
This feature is added for UEFI spec that says
"Stack may be marked as non-executable in identity mapped page tables".
A PCD PcdSetNxForStack is added to turn on/off this feature, and it is
FALSE by default.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: "Yao, Jiewen" <Jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18166 6f19259b-4bc3-4df7-8a09-765794883524
Set USB Ports as User Visible in the _PLD.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tim He <tim.he@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18165 6f19259b-4bc3-4df7-8a09-765794883524
The 2nd parameter in AsciiStrCpyS() should be the max available
memory of the destination.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18161 6f19259b-4bc3-4df7-8a09-765794883524
The second parameter 'DestMax' of StrCpyS() should be the number of
unicode characters, not the size in bytes.
Also, code is modified to keep align with the one in
IntelFrameworkPkg\Library\FrameworkUefiLib\UefiLibPrint.c.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18160 6f19259b-4bc3-4df7-8a09-765794883524
The second parameter 'DestMax' of StrCpyS() should be the number of
unicode characters, not the size in bytes.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18159 6f19259b-4bc3-4df7-8a09-765794883524
Now that the ARM BDS has been removed, there is a remaining BdsLib
dependency in ArmVirtXen that has now become unresolved. So re-add
the BdsLib resolution that we removed from ArmVirt.dsc.inc to
ArmVirtXen.dsc
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18156 6f19259b-4bc3-4df7-8a09-765794883524
The ARM build still needs an intermediate loader to boot Linux,
since ARM/Linux has no builtin UEFI boot stub (yet).
So add the LinuxLoader UEFI application to the FV, and enable
the FvSimpleFileSystemDxe driver so that we can invoke the
Linux loader from the shell, e.g.,
Shell> linuxloader fs2:zImage -c console=ttyAMA0
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18155 6f19259b-4bc3-4df7-8a09-765794883524
The PcdFirmwareVendor PCD was never used on this platform, since
it has never supported the ARM BDS. So remove it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18154 6f19259b-4bc3-4df7-8a09-765794883524
ARM BDS support in ArmVirtQemu has been broken since SVN r17969
("ArmPkg/BdsLib: Remove Linux loader from BdsLib") dated July 14th.
Instead of fixing this, let's get rid of the ARM BDS and LinuxLoader
altogether: they violate both the UEFI spec and the arm64 Linux boot
protocol, and lack the level of integration with the QEMU command
line that the Intel BDS has when running under ArmVirtPkg or OvmfPkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18153 6f19259b-4bc3-4df7-8a09-765794883524
Once the question is refreshed,the processing should happen in the callback function
of EFI_BROWSER_ACTION_RETRIEVE case,rather than EFI_BROWSER_ACTION_CHANGING in DriverSample.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18150 6f19259b-4bc3-4df7-8a09-765794883524
Support compatible board, and fixed some bugs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tim He <tim.he@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18149 6f19259b-4bc3-4df7-8a09-765794883524
to right after CoreInitializeGcdServices().
Why?
Some platforms maybe report both below 4G and above 4G memory resource hob as tested,
then CoreInitializeMemoryServices() will find and add the tested above 4G memory resource hob to memory descriptor for early memory allocation services,
then if ProcessLibraryConstructorList() that has library constructor tries to allocate below 4G memory and will fail.
In fact, the following CoreInitializeGcdServices() will add all the memory resource hob to GCD map,
and add the tested below 4G memory resource hob to memory descriptor,
but it has been too late for ProcessLibraryConstructorList().
Also move below two lines as they are needed to be after
the constructor of DxeCorePerfomanceLib.
PERF_END (NULL,"PEI", NULL, 0) ;
PERF_START (NULL,"DXE", NULL, 0) ;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18146 6f19259b-4bc3-4df7-8a09-765794883524
Perform Left Shift 32 bits of a 32-bit StartAddr[1] and EndingAddr[1]
instead of Right Shift when displaying 64-bit Start and End Address Value.
StartAddr[1] and EndingAddr[1] are already a 32-bit value and it should
perform left shift 32-bit to generate a complete 64-bit value along with
StartAddr[0] and EndingAddr[0] respectively.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tapan Shah <tapandshah@hp.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18144 6f19259b-4bc3-4df7-8a09-765794883524
If the storage of the question is EFI_HII_VARSTORE_BUFFER/EFI_HII_VARSTORE_EFI_VARIABLE_BUFFER,
in SetupBrowserDxe the configuration stings contain uppercase,but HiiDataBaseDxe generates the
ConfigResp string in lowercase,they mismatch,so FindQuestionFromProgress function is broken.
Now convert the configuration string in SetupBrowserDxe to lowercase to fix this issue.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18143 6f19259b-4bc3-4df7-8a09-765794883524
These scripts all now have the same contents, so we only need to use
GccBase.lds. Therefore we can delete gcc-4K-align-ld-script,
gcc4.4-ld-script and gcc4.9-ld-script.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18142 6f19259b-4bc3-4df7-8a09-765794883524
Now that we moved all users to the unified GCC linker script, remove
the old 64 KB incremental linker script for AARCH64 since it is now
unused.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18141 6f19259b-4bc3-4df7-8a09-765794883524
Move to the parametrised generic GCC linker script and set 64 KB
alignment, instead of using the AARCH64 specific incremental linker
script for 64 KB alignment which is about to be removed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18140 6f19259b-4bc3-4df7-8a09-765794883524
Move to the parametrised generic GCC linker script and set 64 KB
alignment, instead of using the AARCH64 specific incremental linker
script for 64 KB alignment which is about to be removed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18139 6f19259b-4bc3-4df7-8a09-765794883524
Drop the GCC AARCH64 specific linker script and use the new
unified one instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18138 6f19259b-4bc3-4df7-8a09-765794883524
All AutoGen.obj files consist of global GUID definitions, fixed
and patchable PCDs and other data that is essentially read-only at
runtime but has not been declared as such for various reasons.
By moving these contents to .text we achieve two things:
- global GUIDs and other data items which must be constant for correct
program operation can no longer be modified, for instance, when
running a DXE_RUNTIME_MODULE binary under the OS with the Properties
Table feature for memory protection enabled;
- the .data section becomes smaller, and may be dropped completely for
many XIP modules, which reduces wasted FV space if the PE/COFF section
alignment is large.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18137 6f19259b-4bc3-4df7-8a09-765794883524
Now that GenFw honors the ELF section alignment when placing the
PE/COFF sections in the output, the start of the PE/COFF version of
.data will be aligned to the alignment of .text if its alignment is
higher than the default. So duplicate this behavior in the ELF output,
this will make the memory layout of the PE/COFF binary match the
layout of the ELF version more closely.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18136 6f19259b-4bc3-4df7-8a09-765794883524
This unifies all GCC linker scripts into a single parametrised GCC
linker script that can be used for all GCC versions and architectures.
The two parameters that can be set on the linker command line are:
- PECOFF_HEADER_SIZE, this is a build time property of GenFw, but
its value is different between 32-bit and 64-bit;
- common-page-size, this can be set using -z on the ld command line,
and controls the value of the COMMONPAGESIZE constant when used in
a linker script. This value is used for the minimum section alignment.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18135 6f19259b-4bc3-4df7-8a09-765794883524
Instead of hardcoding the values for the PE/COFF header size and the
section alignment, set them on the linker command line. This factors
out these values from the various linker scripts, which will allow us
to unify them in a subsequent patch.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18134 6f19259b-4bc3-4df7-8a09-765794883524
Move the .got contents to the PE/COFF .text section. This should be
a no-op, since we typically don't generate position independent code
(i.e., using -fPIC). But since the GOT contains variable addresses that
are updated at relocation time only, its contents are best kept in .text
to prevent them from being overwritten inadvertently.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18133 6f19259b-4bc3-4df7-8a09-765794883524
There is no need to pad out the end of a section of the start of
the following section is aligned to the same value. So drop the
redundant ALIGN() statements.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18132 6f19259b-4bc3-4df7-8a09-765794883524
The .rodata ELF section contains constant non-executable data that
should never be modified by the program itself. Since the risk of
inadvertent modification is typically higher than the risk of
inadvertent execution, it makes sense to put this data in the
R-X .text section rather than in the RW- .data section.
So move it there.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18131 6f19259b-4bc3-4df7-8a09-765794883524
The NOP padding in the GCC linker scripts ensures that all empty
regions in the ELF binary are filled with x86 NOP instructions.
There is no upside to doing this: if the CPU ends up executing these
instructions, we have little hope of resuming normal execution of the
program anyway. And having NOP slides in memory only makes it easier
for attackers to launch exploits. So remove them.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18130 6f19259b-4bc3-4df7-8a09-765794883524
v2 changelog:
Check CurrentPeimHandle to check the matched PeimHandle.
Add check point to ShadowPeiCore based on PCD.
v1 changelog:
PeiCore LoadImage always shadow itself and PEIM on normal boot after
the physical memory is installed. On the emulator platform, the shadow
may be not necessary. To support such usage, new PCD PcdShadowPeimOnBoot
is introduced to specify whether loads PEIM in memory by default.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18125 6f19259b-4bc3-4df7-8a09-765794883524
Add FspUpdSignatureCheck() API in FspSecPlatformLib, so that FspSecCore can check if UPD data is valid in FSP API.
Add Set/GetFspMemoryInitUpdDataPointer() and Set/GetFspSiliconInitUpdDataPointer() API in FspCommonLib,
so that core can set this UdpDataPointer and platform code may get UpdDataPointer easily.
Add UpdateMemSiUpdInitOffsetValue function in GenCfgOpt.py tool, so that the MemoryInitUpdOffset and SiUpdInitOffset is recorded.
Add missing EMBED comment in GenCfgOptUserManual.docx
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18123 6f19259b-4bc3-4df7-8a09-765794883524
Now that GenFw correctly propagates the minimum alignment of the ELF
input sections to the PE/COFF binary, we can simply select 'auto'
alignment in the FDF Rule section instead of tweaking it by hand.
Also add the FIXED FFS attribute to the module types that may execute
in place. This enables a newly added optimization in GenFfs that strips
redundant padding, preventing excessive waste of FV space if the section
alignment is considerable (i.e., 2 KB or 4 KB)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18122 6f19259b-4bc3-4df7-8a09-765794883524
- Use some files from ARM version.
- Use NetBSD software floating point library to provide floating point
operations not handled directly by hardware floating point enabled
GCC compiler.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Daryl McDaniel <edk2-lists@mc2research.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18118 6f19259b-4bc3-4df7-8a09-765794883524