Now that the PL180 and PL111 drivers know how to behave when executed
on the Foundation model (which does not emulate the hardware), we can
remove the ARM_FOUNDATION_FVP ifdefs and produce a single build that
runs on both the Foundation model and the Base model.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18309 6f19259b-4bc3-4df7-8a09-765794883524
To deal gracefully with the absence of the PL111 hardware on
the Foundation model, check the PrimeCell ID before proceeding
with the installation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18308 6f19259b-4bc3-4df7-8a09-765794883524
To deal gracefully with the absence of the PL180 hardware on
the Foundation model, check the PrimeCell ID before proceeding
with the installation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18307 6f19259b-4bc3-4df7-8a09-765794883524
Remove the ARMGCC and ARMLINUXGCC from comments in the respective
Makefiles of ArmPlatformPkg and ArmJunoPkg. Also drop the wildly
outdated Versatile Express instructions, since they refer to ARMGCC
as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18209 6f19259b-4bc3-4df7-8a09-765794883524
Now that GenFw correctly propagates the minimum alignment of the ELF
input sections to the PE/COFF binary, we can simply select 'auto'
alignment in the FDF Rule section instead of tweaking it by hand.
Also add the FIXED FFS attribute to the module types that may execute
in place. This enables a newly added optimization in GenFfs that strips
redundant padding, preventing excessive waste of FV space if the section
alignment is considerable (i.e., 2 KB or 4 KB)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18196 6f19259b-4bc3-4df7-8a09-765794883524
No need to hardcode the TE alignment anymore, now that GenFw sets
the PE/COFF alignment according to the alignment requirements of
the ELF input sections.
Also enable FIXED FFS placement so that we can reclaim some of the
space wasted to padding when using clang with 4 KB section alignment.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18195 6f19259b-4bc3-4df7-8a09-765794883524
The ACPI .aslc files contain a ReferenceAcpiTable() function whose
sole purpose is to ensure that the table itself does not get optimized
away. However, when using clang, these dummy functions result in a 4 KB
section alignment requirement, which is silly since everything except
the .data section is discarded later anyway.
So instead, make ReferenceAcpiTable a CONST pointer to VOID*. This way,
we still have a .text section, which is mandatory for the PE/COFF
conversion, but no executable code with small model relocations that
impose additional alignment requirements.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18194 6f19259b-4bc3-4df7-8a09-765794883524
Make global EFI_PEI_PPI_DESCRIPTOR instances CONST to prevent them
from being emitted into the .data section.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18189 6f19259b-4bc3-4df7-8a09-765794883524
Since PrePeiCore's .text section contains an AARCH64 exception
vector table, its 2 KB alignment propagates to other sections as
well. Since this is a SEC module, it should not have any writable
data in the first place, so change some non-const PPI globals to
const. The resulting binary has no .data section at all, which
saves 2 KB in the XIP image.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18188 6f19259b-4bc3-4df7-8a09-765794883524
Move to the parametrised generic GCC linker script and set 64 KB
alignment, instead of using the AARCH64 specific incremental linker
script for 64 KB alignment which is about to be removed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18139 6f19259b-4bc3-4df7-8a09-765794883524
Remove obsolete ARM and AARCH64 platforms so the maintainers can
focus on the ones that are still supported, which are:
- TC2 (ArmVExpress-CTA15-A7.dsc)
- Foundation model and Fast model emulators (ArmVExpress-FVP-AArch64.dsc)
- Juno (ArmJunoPkg/ArmJuno.dsc)
- Cortex-A15 MPcore RTSM (ArmVExpress-RTSM-A15_MPCore)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18110 6f19259b-4bc3-4df7-8a09-765794883524
Clone ArmGicArchLib into a SEC phase specific ArmGicArchSecLib
so that we can modify the former in a subsequent patch to cache
the GIC revision in a global variable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18099 6f19259b-4bc3-4df7-8a09-765794883524
The current implementation of ArmGicGetSupportedArchRevision ()
that is used by all ARM platforms is entirely stateless (in order
to support being executed from flash) so it needs to interrogate
the hardware for the supported GIC revision upon each invocation.
However, this statelessness is only needed for SEC type modules;
in all other cases, we could easily determine the GIC revision once,
and store the result in a global variable.
In preparation of having separate early and normal versions, this patch
introduces the ArmGicArchLib library class and default implementation,
and moves the existing ArmGicGetSupportedArchRevision () into it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18098 6f19259b-4bc3-4df7-8a09-765794883524
LocateProtocol only gets the 1st SNP instance and this will be wrong
in a system with multiple SNP instances installed. Use HandleProtocol
instead.
Cc: Olivier Martin <olivier.martin@arm.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18030 6f19259b-4bc3-4df7-8a09-765794883524
Recent changes have made the A15-A7 firmware bigger...
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18029 6f19259b-4bc3-4df7-8a09-765794883524
There are still ARM/AArch64 Linux kernels that do not support EFI Stub.
By using the EFI Linux loader as the default option we can boot any
Linux kernel from UEFI as Linux kernel with EFI stub can also be
booted with the legacy way.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17975 6f19259b-4bc3-4df7-8a09-765794883524
When PcdBdsLinuxSupport is enabled, users can create boot
entries for the legacy EFI Linux loader.
The ARM BDS detects if the image is a EFI image if not
then it assumes it is a legacy Linux kernel (a kernel
without EFI Stub).
If the Boot Manager did not manage to load the binary
(it could happen when the binary is on the network or
not present on the media yet).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17974 6f19259b-4bc3-4df7-8a09-765794883524
The Linux Loader has been removed from ARM BDS. These PCDs
are not needed anymore.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17973 6f19259b-4bc3-4df7-8a09-765794883524
PcdDefaultBootType has been removed when the embedded
Linux Loader has been removed from BdsLib.
The boot arguments (defined by PcdDefaultBootArgument)
are now always targetting EFI applications.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17971 6f19259b-4bc3-4df7-8a09-765794883524
Since the embedded Linux Loader has been removed from BdsLib
there is no more Linux specific boot option.
All the boot options are now expected to be arguments for
EFI applications.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17970 6f19259b-4bc3-4df7-8a09-765794883524
This change removes the embedded Linux Loder from BdsLib.
BdsLib becomes OS agnostic.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17969 6f19259b-4bc3-4df7-8a09-765794883524
Add the legacy Linux Loader EFI application to the ARM
development platforms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <Ronald.Cron@arm.com>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17968 6f19259b-4bc3-4df7-8a09-765794883524
Replaced the function BdsLoadApplication() by two explicit
functions that load the EFI application either by its GUID
or its Name.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17966 6f19259b-4bc3-4df7-8a09-765794883524
The PSCI specification covers both ARM and AARCH64, however, the
ARM Trusted Firmware (ATF) reference implementation is only available
for AARCH64, and PSCI firmware is not widely available for ARM platforms.
So use the EfiResetSystemLib implementation that uses PSCI calls only
on AARCH64, and revert to the Versatile Express-specific system register
interface (which is only available during boot time) on ARM platforms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17927 6f19259b-4bc3-4df7-8a09-765794883524
Instead of using a NULL implementation of ArmPlatformSysConfigLib for
DXE_RUNTIME_DRIVER modules, which prevents them from accessing system
control registers even at boot time, use the new implementation that
only switches into a non-functional mode at runtime, and operates as
before otherwise.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17926 6f19259b-4bc3-4df7-8a09-765794883524
This adds a ArmPlatformSysConfigLib implementation that is usable by
DXE_RUNTIME_DRIVER modules. Since the system registers that this library
encapsulates are not usable at runtime, this driver allows access to
those registers only at boot time.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17925 6f19259b-4bc3-4df7-8a09-765794883524
Ip4ConfigDxe driver is deprecated in UEFI 2.5, so we will not support original Ip4Config Protocol,
which is replace by Ip4Config2 Protocol integrated in Ip4Dxe driver(git commit 1f6729ff (SVN r17853)).
Therefore we can remove Ip4ConfigDxe driver from this build.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17911 6f19259b-4bc3-4df7-8a09-765794883524
This reverts commit SVN rev17862.
The former commit was breaking the build when DTB_DIR is defined.
It has been the patch would be reverted for the time being.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17889 6f19259b-4bc3-4df7-8a09-765794883524
The linker script is specific to GCC toolchain.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17864 6f19259b-4bc3-4df7-8a09-765794883524
On the FVP base and foundation models, the default file name
used to retrieve the FDT depended on the values assigned to
model parameters (GIC related model parameters).
Now, in addition to the fallback "fdt.dtb" file name (used for legacy
reason), only one default file name is used :
- "fvp-base.dtb" for the base model.
- "fvp-foundation.dtb" for the foundation model.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17862 6f19259b-4bc3-4df7-8a09-765794883524
This fixes the declaration and definition of mSystemMemoryEnd so that it
is correctly annotated as a non-function symbol. Also adds the ASM_PFX
prefix, which is empty on AARCH64 but should be included for correctness.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17860 6f19259b-4bc3-4df7-8a09-765794883524
This adds the 64 KB alignment overlay linker script to the linker command
line of DXE_RUNTIME_DRIVER modules built for AARCH64. This makes these
modules compatible with the new Properties Table feature by aligning the
.text and .data sections to 64 KB.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17836 6f19259b-4bc3-4df7-8a09-765794883524
This change allows to change the top of the System Memory that
was hardcoded by:
FixedPcdGet64 (PcdSystemMemoryBase) + FixedPcdGet64 (PcdSystemMemorySize)
It allows to add support when the Trusted Firmware reserves the
top of the System Memory as Trusted. The size of this region
might not be known in advance.
Note: The reason why the start of the System Memory has not been
made dynamic is because the early code calculates where to place
the stack from the top of the System Memory.
So there is no need to make the start of the System Memory a
dynamic value at the early stage of the boot phase.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17835 6f19259b-4bc3-4df7-8a09-765794883524
The PlatformLib could have declared the resource hob for
the main system memory region.
This change would prevent to get this system memory resource
to be declared twice.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17834 6f19259b-4bc3-4df7-8a09-765794883524
PcdFirmwareVersionString is defined in MdeModulePkg to be
either fixed or dynamic, but is restricted in ArmPlatformPkg
drivers to FixedPcd. Changed to remove the FixedPcd
restrictions to allow platforms to chose the correct type
in their DSC files.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hp.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17833 6f19259b-4bc3-4df7-8a09-765794883524
We use the NorFlash file system to read the
Device Tree from.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17831 6f19259b-4bc3-4df7-8a09-765794883524
Filenames cannot be longer than 8-character long on
ARM Versatile Express.
Use the default DTB filenames (the ones provided by
the ARM Versatile Express DVD) for the different Core
Tile.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17830 6f19259b-4bc3-4df7-8a09-765794883524
The A15-A7 FVP model was previously the default build.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17829 6f19259b-4bc3-4df7-8a09-765794883524
By default, a MemoryMap() EFI Device Path is created
for the Firmware Volumes.
It means it is difficult to build a Non-Volatile permanent
Device Path for the Firmware Volume as the location in
System Memory may change.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17827 6f19259b-4bc3-4df7-8a09-765794883524
People has requested this feature to be restaured in the
ARM Boot Manager.
The configuration from the EFI Shell is always possible
and it is the recommended approach to update the FDT
Device Path.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <Ronald.Cron@arm.com>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17826 6f19259b-4bc3-4df7-8a09-765794883524
Remove gVariableAuthenticatedRuntimeDxeFileGuid definition in
ArmPlatformPkg.dec and use gVariableRuntimeDxeFileGuid in
NorFlashAuthenticatedDxe.inf as auth Variable driver in SecurityPkg
and Variable driver in MdeModulePkg have been merged.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17768 6f19259b-4bc3-4df7-8a09-765794883524
These library classes are now linked with
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
to optionally support secure variables.
For ArmPlatformPkg, secure boot is not currently enabled,
so we map these libraries to the NULL versions that don't support secure variables.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17762 6f19259b-4bc3-4df7-8a09-765794883524
The PCI Root bridge is defined by PciRoot(0x0)/Pci(0x0,0x0).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17528 6f19259b-4bc3-4df7-8a09-765794883524
1. Data type for GcdMemoryType and GcdIoType is enumeration type
rather than bit field, so we need to use strict equation "=="
instead of bit-and "&";
2. Testing for GcdIoType should use EfiGcdIoType*** constants
rather than EfiGcdMemoryType***;
3. As we are going to use strict equation, it is clearer to use
switch-case than if-else.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17527 6f19259b-4bc3-4df7-8a09-765794883524
... since gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut has recently
been introduced.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17443 6f19259b-4bc3-4df7-8a09-765794883524
PCI support is only present on Juno R1.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17415 6f19259b-4bc3-4df7-8a09-765794883524
Since there is now a formal definition of EFI_LOAD_OPTION, we can no
longer typedef it as a UINT8*. So update the code to use the common
definition, which is not a pointer type, hence the additional changes
to the C code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17410 6f19259b-4bc3-4df7-8a09-765794883524
Since ArmVExpressSysConfigLib cannot be supported at runtime, restrict
its use to the types of modules that are currently using it legally.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17382 6f19259b-4bc3-4df7-8a09-765794883524
The ArmVExpressSysConfigLib library does not (and cannot) runtime
remap its MMIO registers, so use a NULL implementation of the
ArmPlatformSysConfigLib library class for DXE_RUNTIME_DRIVER
type modules.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17381 6f19259b-4bc3-4df7-8a09-765794883524
Since the default EfiResetSystemLib for VExpress cannot be used at
runtime (due to the fact that its MMIO registers need to be owned
by the OS and so cannot be runtime remapped), instead use PSCI calls
into EL3 at runtime.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17380 6f19259b-4bc3-4df7-8a09-765794883524
If DTB_DIR=<path> is set during the build, incorporate DTBs from
that path for all AArch64 FVP platform variants so that they can
be loaded straight from the firmware image instead of from a file
system. This relieves a user of having to keep a DTB file with the
right name in the working directory of the model.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17360 6f19259b-4bc3-4df7-8a09-765794883524
This adds support to the ArmVExpressPkg platforms to load their
device tree binary from a Firmware Volume if one is found that
matches the current platform. If none is found, the existing
logic to find a FDT by name from a file system is retained as
a fallback.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17359 6f19259b-4bc3-4df7-8a09-765794883524
Instead of using open coded GUIDs, define them only once, and refer
to them by name everywhere else.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17358 6f19259b-4bc3-4df7-8a09-765794883524
This adds all the required modules and library dependencies so that
the ArmVirtualizationQemu platform can be built with support for
UEFI Secure Boot. This support consists of the OpenSSL crypto
library (whose source needs to be downloaded separately), the
authenticated variable store, and authentication of executables
before launching them.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17356 6f19259b-4bc3-4df7-8a09-765794883524
The NorFlashDxe uses an explicit 'BEFORE xxx' Depex declaration to
ensure that it is dispatched before VariableRuntimeDxe, and uses the
file GUID of the latter as 'xxx' explicitly to accomplish that.
However, when enabling UEFI Secure Boot, this breaks down since the
authenticated VariableRuntimeDxe is a completely separate driver, with
a different GUID. Also, the hardcoded dependency on gEfiVariableGuid,
which is not used under UEFI Secure Boot, needs to be factored out in
order to allow this driver to be used.
So clone NorFlashDxe.inf into NorFlashAuthenticatedDxe.inf, and fix
up the dependencies so they refer to gEfiAuthenticatedVariableGuid and
SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableRuntimeDxe.inf
instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17355 6f19259b-4bc3-4df7-8a09-765794883524
We keep UID=0 for the 'real' PCI root complex on the Juno board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17342 6f19259b-4bc3-4df7-8a09-765794883524
PcdOverridePlatformFdt was set with its default value.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17306 6f19259b-4bc3-4df7-8a09-765794883524
The Fdt platform driver has been moved at the end of the list
of the DXE/UEFI drivers to ensure the device drivers have been
dispatched prior to load the FDT platform driver.
For instance, if we want to load FDT from TFTP we must have
the ethernet driver to be already loaded.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17305 6f19259b-4bc3-4df7-8a09-765794883524
Other libraries/modules could use it (eg: EFI Shell command `runaxf`).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17297 6f19259b-4bc3-4df7-8a09-765794883524
Some ARM development platforms use ARM Trusted Firmware to boot.
ARM Trusted Firmware encapsulates UEFI into the FIP (Firmware
Image Package) binary.
This change allows to update the FIP binary after building UEFI.
Example to build UEFI for FVP Base model:
$ make -f ArmPlatformPkg/Scripts/Makefile \
EDK2_DSC=ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc \
EDK2_ARCH=AARCH64 EDK2_TOOLCHAIN=GCC49 \
FIP_BIN=~/arm-trusted-firmware/build/fvp/release/fip.bin
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17296 6f19259b-4bc3-4df7-8a09-765794883524
In order to prevent memory corruption issues caused by the fact that,
under virtualization, the guest is incoherent with the hypervisor's view
of memory until it enables its caches and MMU, this patch reshuffles the
init sequence so that the Xen shared memory regions are not touched
before the caches and MMU are enabled.
In addition, the loaded image itself is invalidated by virtual address,
to ensure that any runtime changes (such as the applied relocations) will
not suddenly become invisible once we turn the caches on.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17178 6f19259b-4bc3-4df7-8a09-765794883524
This updates ArmVirtualizationMemoryInitPeiLib so that the PEI memory
region, i.e., the region that is used both before and after the MMU
and caches are enabled, is invalidated by virtual address before
enabling the MMU.
This prevents issues where data we modified with the caches and MMU
off may be shadowed by clean cachelines in system caches or in lower
level caches on other CPUs, resulting in the this data to become
invisible once we turn the MMU and caches on.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17177 6f19259b-4bc3-4df7-8a09-765794883524
MemoryInitPeim short-circuits its MemoryInitPeiLib dependency by including
the .c file directly. This prevents us from having a special implementation
for ArmVirtualizationPkg that performs additional cache maintenance before
enabling the MMU. So instead, make it depend on the library class.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17175 6f19259b-4bc3-4df7-8a09-765794883524
This updates ArmVirtualization.dsc.inc to use the MemoryInitPeiLib
implementation for virt targets. The only difference between that one
and the original one is that the original one removes memory from the
available list if it overlaps the FD region (which may be the case when
shadowing NOR flash with system RAM). This is never the case for the
Qemu target, which is the only platform affected by this change, since
the Xen target already uses this library explicitly.
This allows us to remove the Xen-specific declaration of this library
dependency. For the Qemu target, this change will not take effect until
after the MemoryInitPeim<->MemoryInitPeiLib dependency resolution is
fixed in a subsequent patch.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17174 6f19259b-4bc3-4df7-8a09-765794883524
LzmaDecompress support is moving from IntelFrameworkPkg to
MdeModulePkg.
This change ensures ArmPlatformPkg reflects this future change.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <ronald.cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17133 6f19259b-4bc3-4df7-8a09-765794883524
The default name should match the legacy Juno R0 name (ie: juno.dtb)
to ensure the updated UEFI firmware still works on the deployed Juno R0
board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17097 6f19259b-4bc3-4df7-8a09-765794883524
On Juno R1, the MAC address assigned to the PCI Gigabyte Ethernet device
as to be passed to the Linux Kernel.
The MAC address is passed to the Linux Kernel by means of the boot argument
"sky2.mac_address".
This patch adds this boot argument to the lists of boot arguments of the
two Juno R1 default boot options.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17095 6f19259b-4bc3-4df7-8a09-765794883524
This is a copy/paste of the exact same code in both cases: Buffer
should only be freed on the success path, otherwise it will be
NULL
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17078 6f19259b-4bc3-4df7-8a09-765794883524
The "virt" machine type of qemu-system-(arm|aarch64) had no PCIe support
prior to qemu commit
4ab29b82 arm: Add PCIe host bridge in virt machine
With that commit, the "virt" board acquired the capability to expose an
XHCI controller. Using a USB keyboard as example, the command line options
were
-device nec-usb-xhci -device usb-kbd
However, due to a slight XHCI emulation bug in QEMU -- dating back to
several years earlier -- edk2's XHCI driver would encounter a failed
ASSERT().
This emulation problem has been fixed in QEMU commit
aa685789 xhci: generate a Transfer Event for each Transfer TRB with the
IOC bit set
and now edk2's XHCI driver works well on QEMU's "nec-usb-xhci" device.
Let's enable the driver in ArmVirtualizationQemu, as XHCI emulation is
reportedly more virtualization-friendly than EHCI, consuming less CPU.
(ArmVirtualizationXen is not modified because it includes no USB-related
drivers at all.)
This patch should not regress existing QEMU command lines (ie. expose the
failed ASSERT()) because QEMU's "-device nec-usb-xhci" has never before
resulted in USB devices that worked with edk2 firmware builds, hence users
have never had a reason to add that option.
Now that they learn about XHCI support in ArmVirtualizationQemu by reading
this commit message, they (or their packagers) will also know to update
qemu to aa685789 or later (in practice that means the upcoming 2.3
release), at least if they want to use '-device nec-usb-xhci' with edk2,
for the first time ever.
Cc: Leif Lindholm <Leif.Lindholm@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Alexander Graf <agraf@suse.de>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17053 6f19259b-4bc3-4df7-8a09-765794883524
Including a prebuilt shell executable in the firmware binary is suboptimal
practice, especially given that the source code of the UEFI shell resides
in the same edk2 tree. Benefits of building the shell from source are
partly technical (a developer patching the shell can actually see the
results), partly ideological (the nominally built-from-source firmware is
actually built from source). "Security" might be worth a mention too.
The stanza for the [Components.common] section of
"ArmVirtualization.dsc.inc" originates from under OvmfPkg.
Cc: Leif Lindholm <Leif.Lindholm@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17052 6f19259b-4bc3-4df7-8a09-765794883524
Perform the following renames in order to stick with edk2 tradition more
closely:
XenHypercallLibArm, XenHypercallLibIntel -> XenHypercallLib
XenHypercallIntel -> X86XenHypercall
In addition, we unify the INF files.
This patch modifies ArmVirtualizationPkg and OvmfPkg at once, in order to
keep both bisectable (client code shouldn't break).
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16998 6f19259b-4bc3-4df7-8a09-765794883524
This enables -D DEBUG_PRINT_ERROR_LEVEL=0x8040004F style command line
options.
Since we're massaging the debug message bitmask anyway, let's update the
description of the individual bits too in the comments, so that they match
"MdePkg/Include/Library/DebugLib.h".
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16986 6f19259b-4bc3-4df7-8a09-765794883524
When the user doesn't pass a kernel with QEMU's "-kernel" switch, the
firmware sees a zero-sized kernel blob via the QemuFwCfgItemKernelSize
key; there's no way to distinguish "no kernel" from "zero sized kernel".
In both cases TryRunningQemuKernel() proceeds as far as gBS->LoadImage(),
which then rejects the zero sized synthetic file with EFI_UNSUPPORTED.
This is known and works fully as expected; however we should rather catch
the much more frequent "no kernel" case earlier, in order to avoid the
EFI_D_ERROR message
TryRunningQemuKernel: LoadImage(): Unsupported
which is arguably meaningless noise for the "no kernel" case.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16985 6f19259b-4bc3-4df7-8a09-765794883524
This adds the .dsc and .fdf descriptions to build a UEFI image that
is bootable by a Xen guest on 64-bit ARM (AArch64)
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16981 6f19259b-4bc3-4df7-8a09-765794883524
This patchs adds support to VirtFdtDxe for the Xen DT node which
contains the base address of the Grant Table. This data is communicated
to XenBusDxe using a XENIO_PROTOCOL instance.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16980 6f19259b-4bc3-4df7-8a09-765794883524
This implements a dummy RealTimeClockLib for Xen, as there is no
guest interface to access the time kept by Xen that can be shared
between UEFI and the OS.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16977 6f19259b-4bc3-4df7-8a09-765794883524
Add a ArmPlatformLib instance that can deal with the self relocation
and truly dynamic discovery of system RAM base and size.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16964 6f19259b-4bc3-4df7-8a09-765794883524
Allow the use of patchable PCDs for gArmTokenSpaceGuid.PcdFvBaseAddress
and gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
by moving them from the [FixedPcd] to the [Pcd] section in the INF file of
PlatformPeiLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16963 6f19259b-4bc3-4df7-8a09-765794883524
This implements a MemoryInitPeiLib instance that differs from the
stock ArmPlatformPkg version only in the fact that it does not remove
the memory used by the flash device (FD). The reason is that, when using
PrePi, the DXE core is started immediately and never returns so there is
no reason to preserve any of the memory that the flash device occupied
originally, and it is preferable to release is so that the OS loader
can reuse it. This is especially important for the relocatable PrePi
configuration, which is aimed at being launched from a boot loader that
itself adheres to the Linux arm64 boot protocol.
Contributed-under: TianoCore Contribution Agreement 1.0
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martn@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16962 6f19259b-4bc3-4df7-8a09-765794883524
This patch introduces a relocatable PrePi, which can execute
from arbitrary offsets in RAM. This is intendend to be run
from a boot loader which passes a description of the actual
platform in a device tree, for instance.
This module is based on the PrePi implementations residing under
ArmPlatformPkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16961 6f19259b-4bc3-4df7-8a09-765794883524
Our primary user QEMU/mach-virt presents us with a FDT blob padded
to 64 KB with plenty of room to set additional properties. However,
in the general case, we should only add properties after making sure
there is enough room available.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16960 6f19259b-4bc3-4df7-8a09-765794883524
Instead of using a dynamic PCD, store the device tree address in a HOB
so that we can also run under a configuration that does not support
dynamic PCDs.
This also adds MemoryAllocationLib to the [LibraryClasses] section of
ArmVirtualizationPlatformLib/ArmVirtualizationPlatformLib.inf, as this
dependency was formerly satisfied transitively through one of the
library dependencies that were dropped.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16959 6f19259b-4bc3-4df7-8a09-765794883524
This is partially motivated by the desire to use PrePi in a virt
environment, and in that configuration, ArmPlatformInitializeSystemMemory()
is never called. But actually, this is a more suitable place anyway.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16958 6f19259b-4bc3-4df7-8a09-765794883524
To allow a runtime self relocating PrePi instance to discover the base
address of the device tree at runtime, allow the use of a patchable PCD
for gArmVirtualizationTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress.
We will not be using the build time patch tool in this case, but using
a patchable PCD will make the build system aware that its value is not
a compile time constant.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16957 6f19259b-4bc3-4df7-8a09-765794883524
This adds support for detecting the presence of a GICv3 interrupt
controller from the device tree, and recording its distributor and
redistributor base addresses in their respective PCDs.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16956 6f19259b-4bc3-4df7-8a09-765794883524
This moves the reference to gArmTokenSpaceGuid.PcdFdBaseAddress
from the [FixedPcd] to the [Pcd] section in the INF file of
PrePiArmPlatformGlobalVariableLib so that its users may choose
to use a patchable PCD instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16955 6f19259b-4bc3-4df7-8a09-765794883524
The DT binding for the ARM generic timer describes the secure,
non-secure, virtual and hypervisor timer interrupts, respectively.
However, under virtualization, only the virtual timer is usable, and
the device tree may omit the hypervisor timer interrupt. (Other timer
interrupts cannot be omitted simply due to the fact that the virtual
timer is listed third)
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16953 6f19259b-4bc3-4df7-8a09-765794883524
Juno R1 can run in two configurations:
- A57x2
- A57x2-A53x4
The Device Tree tell Linux which configuration has been selected.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16942 6f19259b-4bc3-4df7-8a09-765794883524
Remove the option to update the "Fdt" UEFI variable in the ARM BDS as
the "setfdt" EFI Shell command provides this service from now.
Remove the use of this variable in the legacy kernel boot loader and
use the FDT installed in the configuration table instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <Ronald.Cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16940 6f19259b-4bc3-4df7-8a09-765794883524
The MIDR register of the CPU on which the UEFI firmware is running on
is used to infer if the platform is a Juno r0 or a Juno r1. The right
device path to the platform FDT is then stored in the
"gEmbeddedTokenSpaceGuid.PcdFdtDevicePaths" dynamic PCD.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <Ronald.Cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16939 6f19259b-4bc3-4df7-8a09-765794883524
Remove the installation of the FDT for Juno into the UEFI Configuration
Table from the Juno specific DXE driver. Use the FdtPlatformDxe driver to
do it instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <Ronald.Cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16938 6f19259b-4bc3-4df7-8a09-765794883524
There are three FVP variants for the Base and Foundation models:
- model with GICv2 legacy memory map (same location as the Versatile Express model)
- model with GICv2 and Base model memory map
- model with GICv3 and Base model memory map
The new code detects the variants to load the appropriate device tree.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16932 6f19259b-4bc3-4df7-8a09-765794883524
Add a function to ArmVExpressDxe to identify the current platform we
are running on. This includes ARM32 and AArch64 models and hardware.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16931 6f19259b-4bc3-4df7-8a09-765794883524
- 'earlycon' is the new name for 'earlyprintk'
- Support Linux EFI stub by default
- The command line is expected to be in unicode when
booting an EFI application.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16928 6f19259b-4bc3-4df7-8a09-765794883524
ARM toolchain raises the build error:
Error #188-D: enumerated type mixed with another type
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16927 6f19259b-4bc3-4df7-8a09-765794883524
Detect the video displays dynamically, and add them to the console and
error output variables.
Add a short-form, "wild card" USB_CLASS_DEVICE_PATH to the console input
variable, which causes the USB keyboard to be handled automatically.
Add the fixed location serial console to all of the console input, console
output, and error output variables.
This patch enables QEMU users to drop "addr=..." PCI address
specifications from the -device options (or to use whatever addresses they
like). For example, the following works:
-device VGA \
\
-device ich9-usb-ehci1,multifunction=on,id=ehci \
-device ich9-usb-uhci1,multifunction=on,masterbus=ehci.0,firstport=0 \
-device ich9-usb-uhci2,multifunction=on,masterbus=ehci.0,firstport=2 \
-device ich9-usb-uhci3,multifunction=on,masterbus=ehci.0,firstport=4 \
-device usb-kbd,bus=ehci.0
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16924 6f19259b-4bc3-4df7-8a09-765794883524
In this patch we remove all dependencies on ARM BDS libraries. We also
remove empty and/or unneeded functions, includes, etc.
PlatformIntelBdsLib "goes back to basics" temporarily -- there are no
consoles configured, and it's practically not possible to interact with
the user interface. Bisection remains available in the sense that
"ArmVirtualizationQemu.dsc" continues to build and should boot preexistent
boot options, but user interaction does regress temporarily.
The reason for this is that it's preferable to keep this patch and the
next one separate for readability's sake -- they amount to a rewrite from
scratch.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16923 6f19259b-4bc3-4df7-8a09-765794883524
Similarly to the previous patch, we can now multiplex input from the USB
keyboard.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16914 6f19259b-4bc3-4df7-8a09-765794883524
Alex Graf's QEMU patchset enables "-device VGA" for the virt machtype as
well. We can now include OvmfPkg/QemuVideoDxe in the firmware, and set
PcdDefaultConOutPaths such that the console output is multiplexed to the
video window as well. (Our platform BDS lib doesn't (yet) locate the VGA
device automatically.)
OvmfPkg/PlatformDxe is included too; it allows users to select a video
resolution. (Note that PcdSetupVideoHorizontalResolution and
PcdSetupVideoVerticalResolution are independent; see git commit 848834cb
(SVN r16311) for explanation.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16913 6f19259b-4bc3-4df7-8a09-765794883524
In the following call chain:
PlatformBdsPolicyBehavior()
PlatformBdsConnectConsole()
InitializeConsolePipe() x 3
BdsConnectDevicePath() [ArmPkg/Library/BdsLib/BdsFilePath.c]
the three InitializeConsolePipe() function calls pass through
- (&gST->ConsoleOutHandle, &gST->ConOut),
- (&gST->ConsoleInHandle, &gST->ConIn),
- (&gST->StandardErrorHandle, &gST->StdErr)
to BdsConnectDevicePath(), in ArmPkg's BdsLib.
At least when more than one console device paths are specified in the
ConIn / ConOut / ErrOut variables, the above resuls in:
- unchanged protocol interfaces (ConOut, ConIn, StdErr) in the system
table (because ConSplitterDxe installs its non-NULL interfaces first),
- but, changed handles in the system table.
This effectively separates the handle fields in the system table from the
protocol interfaces in the same that should always be associated with the
handles. The end result is that clients using the handles break (splitting
/ multiplexing doesn't work for them), while clients directly using the
protocol interfaces work.
Therefore, do not attempt to connect consoles separately. ConSplitterDxe
is dispatched before PlatformBdsPolicyBehavior() is called (the latter
happens in the BDS phase), and ConSplitterDxe installs virtual handles and
protocol interfaces for input / output / error.
BdsLibConnectAll() covers all devices, including consoles; as those
consoles are connected, ConPlatformDxe and ConSplitterDxe pick them up
nicely as "slaves". We just need to make sure that the variables are set
first, for the variables -> ConPlatformDxe -> ConSplitterDxe dependency
chain.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16912 6f19259b-4bc3-4df7-8a09-765794883524
If there is a PCI host, then PCI enumeration (which happens inside
BdsLibConnectAll()) blocks ACPI table installation (correctly). Make sure
we install ACPI tables before trying to direct-boot a QEMU kernel.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16911 6f19259b-4bc3-4df7-8a09-765794883524
Beyond including the foundational drivers in the DSC and FDF files, we
enable virtio-over-PCI, and turn on QemuBootOrderLib's OFW-to-UEFI device
path translation for PCI devices.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16910 6f19259b-4bc3-4df7-8a09-765794883524
The BarExisted() function in
"MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c" raises the TPL to
TPL_HIGH_LEVEL before accessing PCI config space.
The PciExpressLib instance under "MdePkg/Library/BasePciExpressLib" --
serving the PCI config space access -- calls
PcdGet64(PcdPciExpressBaseAddress) in turn, for each such call.
The PcdGet64() function, when issued at TPL_HIGH_LEVEL, triggers an
ASSERT(). PcdGet64() is based on a protocol in this UEFI phase, and
protocol handler services are not allowed above TPL_NOTIFY (see Table 23
"TPL Restrictions" in the UEFI spec).
Clone the library, and in a new constructor, cache the PCD in a global
variable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16909 6f19259b-4bc3-4df7-8a09-765794883524
When there are no devices connected to the root bridge, no resources are
needed. GetProposedResources() currently considers this an invalid
condition (the PI spec doesn't regulate it).
Emitting an empty set of EFI_ACPI_ADDRESS_SPACE_DESCRIPTORs, followed by
the required EFI_ACPI_END_TAG_DESCRIPTOR, allows
PciHostBridgeResourceAllocator() [MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c]
to advance.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16908 6f19259b-4bc3-4df7-8a09-765794883524
According to Volume 5 of the PI spec, 10.8.2 PCI Host Bridge Resource
Allocation Protocol, SubmitResources(),
It is considered an error if no resource requests are submitted for a
PCI root bridge. If a PCI root bridge does not require any resources, a
zero-length resource request must explicitly be submitted.
Under MdeModulePkg/Bus/Pci/PciBusDxe/, we have:
PciHostBridgeResourceAllocator() [PciLib.c]
ConstructAcpiResourceRequestor(..., &AcpiConfig) [PciEnumerator.c]
PciResAlloc->SubmitResources(..., &AcpiConfig)
ASSERT_EFI_ERROR ()
If ConstructAcpiResourceRequestor() finds no resources to request (for
example because no PCI devices are on the root bridge), it places a
zero-length EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR followed by an
EFI_ACPI_END_TAG_DESCRIPTOR in "AcpiConfig"; satisfying the PI spec.
However, PciHostBridgeDxe's SubmitResources() function does not expect
such input; the following part of the code rejects it:
switch (Ptr->ResType) {
case 0:
//
// Check invalid Address Sapce Granularity
//
if (Ptr->AddrSpaceGranularity != 32) {
return EFI_INVALID_PARAMETER;
}
Skip EFI_ACPI_ADDRESS_SPACE_DESCRIPTORs with zero AddrLen early. Also,
allow PciHostBridgeResourceAllocator() to proceed to the AllocateResources
phase by setting "ResourceSubmited" to TRUE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16907 6f19259b-4bc3-4df7-8a09-765794883524
This is our MMIO space map:
> GCD:AddMemorySpace(Base=0000000010000000,Length=000000002EFF0000)
> GcdMemoryType = MMIO
> Capabilities = 0000000000000001
> Status = Success
> GCDMemType Range Capabilities Attributes
> ========== ================================= ================ ================
> NonExist 0000000000000000-0000000003FFFFFF 0000000000000000 0000000000000000
> MMIO 0000000004000000-0000000007FFFFFF C000000000000001 8000000000000001
NorFlashDxe adds this, but does not allocate it.
> NonExist 0000000008000000-000000000900FFFF 0000000000000000 0000000000000000
> MMIO 0000000009010000-0000000009010FFF C000000000000001 8000000000000001
Added by RealTimeClockRuntimeDxe, but also not allocated.
> NonExist 0000000009011000-000000000FFFFFFF 0000000000000000 0000000000000000
> MMIO 0000000010000000-000000003EFEFFFF C000000000000001 0000000000000000
Added by ourselves.
> NonExist 000000003EFF0000-000000003FFFFFFF 0000000000000000 0000000000000000
> SystemMem 0000000040000000-00000000BFFFFFFF 800000000000000F 0000000000000008*
> NonExist 00000000C0000000-0000FFFFFFFFFFFF 0000000000000000 0000000000000000
In the EfiPciHostBridgeAllocateResources phase, we allocate memory BARs
bottom up, from whichever MMIO range comes first and has room left.
Unfortunately, this places memory BARs into MMIO ranges that belong to
other devices. (Arguably, their respective drivers should not just add,
but immediately allocate those ranges as well.)
(
This problem is not seen in OVMF / PcAtChipsetPkg, because there we
allocate bottom-up from the range
[max(2GB, top-of-low-RAM), 0xFC000000).
(See the MMIO resource descriptor HOB created in MemMapInitialization()
[OvmfPkg/PlatformPei/Platform.c].)
That MMIO range fits in the static [2GB, 4GB) aperture given in
"mResAperture" in PcAtChipsetPkg/PciHostBridgeDxe; plus other MMIO
ranges (IO-APIC, HPET, LAPIC, flash chip) are higher than 0xFC000000.
Hence the bottom-up BAR allocation in OvmfPkg always finds the right
MMIO range first.
)
In ArmVirtualizationPkg/PciHostBridgeDxe we can solve the problem by
working our way downwards from the top of our own aperture.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16906 6f19259b-4bc3-4df7-8a09-765794883524
Currently we allocate IO BARs bottom-up in the
EfiPciHostBridgeAllocateResources phase of the enumeration.
> GCD:AddIoSpace(Base=0000000000000000,Length=0000000000010000)
> GcdIoType = I/O
> Status = Success
> GCDIoType Range
> ========== =================================
> I/O 0000000000000000-000000000000FFFF
Because the IO aperture is based at zero, the first allocation happens to
get the zero address. However, a zero address for a PCI BAR is considered
unmapped; see eg.:
- <http://www.pcisig.com/reflector/msg00459.html>,
- the (new_addr == 0) part in QEMU, pci_bar_address() [hw/pci/pci.c]:
new_addr = pci_get_long(d->config + bar) & ~(size - 1);
last_addr = new_addr + size - 1;
/* Check if 32 bit BAR wraps around explicitly.
* TODO: make priorities correct and remove this work around.
*/
if (last_addr <= new_addr || new_addr == 0 || last_addr >= UINT32_MAX)
{
return PCI_BAR_UNMAPPED;
}
We can avoid this problem by allocating top-down in the IO aperture.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16905 6f19259b-4bc3-4df7-8a09-765794883524
Quite non-intuitively, we must allow guest-side writes to emulated PCI
MMIO regions to go through the CPU cache, otherwise QEMU, whose accesses
always go through the cache, may see stale data in the region.
This change makes no difference for QEMU/TCG, but it is important for
QEMU/KVM, at the moment.
Because gDS->SetMemorySpaceAttributes() is ultimately implemented by
EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes() -- see
"MdeModulePkg/Core/Dxe/Gcd/Gcd.c" and "ArmPkg/Drivers/CpuDxe/" -- we add
the CPU architectural protocol to the module's DepEx.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16904 6f19259b-4bc3-4df7-8a09-765794883524
VirtFdtDxe parses the following address space properties from the DTB (and
saves them in PCDs) :
ProcessPciHost: Config[0x3F000000+0x1000000)
Bus[0x0..0xF]
Io[0x0+0x10000)@0x3EFF0000
Mem[0x10000000+0x2EFF0000)@0x0
In order to allow PCI enumeration to allocate IO and MMIO resources from
the above ranges for devices, we must add the ranges to the Global
Coherency Domain.
There are two ways for that:
- building resource descriptor HOBs in the HOB producer phase (basically,
PEI), and letting the DXE core process them,
- calling gDS->AddIoSpace() and gDS->AddMemorySpace() during DXE.
We opt for the second method for simplicity.
In the address space maps, the corresponding ranges change from
"nonexistent" to "IO" and "MMIO", from which the gDS->AllocateIoSpace()
and gDS->AllocateMemorySpace() services can later allocate PCI BARs.
GCD:AddIoSpace(Base=0000000000000000,Length=0000000000010000)
GcdIoType = I/O
Status = Success
GCDIoType Range
========== =================================
-> I/O 0000000000000000-000000000000FFFF
GCD:AddMemorySpace(Base=0000000010000000,Length=000000002EFF0000)
GcdMemoryType = MMIO
Capabilities = 0000000000000001
Status = Success
GCDMemType Range Capabilities Attributes
========== ================================= ================ ================
NonExist 0000000000000000-0000000003FFFFFF 0000000000000000 0000000000000000
MMIO 0000000004000000-0000000007FFFFFF C000000000000001 8000000000000001
NonExist 0000000008000000-000000000900FFFF 0000000000000000 0000000000000000
MMIO 0000000009010000-0000000009010FFF C000000000000001 8000000000000001
NonExist 0000000009011000-000000000FFFFFFF 0000000000000000 0000000000000000
-> MMIO 0000000010000000-000000003EFEFFFF C000000000000001 0000000000000000
NonExist 000000003EFF0000-000000003FFFFFFF 0000000000000000 0000000000000000
SystemMem 0000000040000000-00000000BFFFFFFF 800000000000000F 0000000000000008*
NonExist 00000000C0000000-0000FFFFFFFFFFFF 0000000000000000 0000000000000000
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16903 6f19259b-4bc3-4df7-8a09-765794883524
Set gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize to 16, which determines the
maximum "I/O address width".
This ensures, through the BuildCpuHob() call in
"ArmPkg/Drivers/CpuPei/CpuPei.c", that the inital I/O Space Map will
consist of a 16-bit wide "splittable" entry, when the DXE core starts (see
CoreInitializeGcdServices() in "MdeModulePkg/Core/Dxe/Gcd/Gcd.c"):
GCD:Initial GCD I/O Space Map
GCDIoType Range
========== =================================
NonExist 0000000000000000-000000000000FFFF
Otherwise this range would have size 0, and (since it could not be split)
any gDS->AddIoSpace() calls would fail.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16902 6f19259b-4bc3-4df7-8a09-765794883524
The RootBridgeIoCheckParameter() function currently relies on the range
limit being of the form (2^n - 1). This assumption is not necessarily
true; handle the general case.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16901 6f19259b-4bc3-4df7-8a09-765794883524
There is no IO space on ARM, and there are no special instructions that
access it. QEMU emulates the IO space for PCI devices with a special MMIO
range. We're ready to use it at this point, we just have to switch the
Io(Read|Write)(8|16|32) primitives to their MMIO counterparts, because in
"MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c", the IO primitives
correctly ASSERT (FALSE).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16900 6f19259b-4bc3-4df7-8a09-765794883524
Unlike the one in PcAtChipsetPkg, our PciHostBridgeDxe module must handle
address space translation. IO addresses expressed in the respective
aperture are mapped to a different base in CPU address space.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16899 6f19259b-4bc3-4df7-8a09-765794883524
If VirtFdtDxe found no PCI host in the DTB, then the config space base
address will be left at zero -- the default is set in the DSC --, and we
should exit PciHostBridgeDxe immediately.
This causes gEfiPciRootBridgeIoProtocolGuid not to be installed, which in
turn prevents MdeModulePkg/Bus/Pci/PciBusDxe from binding (see
PciBusDriverBindingSupported()).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16898 6f19259b-4bc3-4df7-8a09-765794883524
Our PciHostBridgeDxe module creates one root bridge on the one and only
host bridge. The resource apertures of the root bridge (bus range, IO
space, MMIO space) are configured with the "mResAperture" array, which at
the moment carries static values inherited from PcAtChipsetPkg.
Set the array as first thing from the PCDs that we parsed from the device
tree.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16897 6f19259b-4bc3-4df7-8a09-765794883524
The Enhanced Configuration Access Mechanism provides access to 4096
register bytes per PCIe B/D/F. The MAX_PCI_REG_ADDRESS macro that we're
changing here is used by RootBridgeIoCheckParameter() for verifying config
space boundaries in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.Pci.Read() and
.Write().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16896 6f19259b-4bc3-4df7-8a09-765794883524
MdeModulePkg/Bus/Pci/PciBusDxe depends on
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL and
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. Here we clone the driver that produces
these from PcAtChipsetPkg, with the following immediate changes:
- a new FILE_GUID is generated;
- the assembly-language Ia32 / X64 specific IoFifo "accelerators" are not
copied, and their client code (which would be dead code anyway) is
removed;
- UNI files are not copied: they are used in conjunction with the UEFI
Packaging Tool (UPT), but the driver under ArmVirtualizationPkg will not
be part of UDK.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16895 6f19259b-4bc3-4df7-8a09-765794883524
This setting makes OvmfPkg/AcpiPlatformDxe not wait for PCI
enumeration to complete before installing ACPI tables.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16886 6f19259b-4bc3-4df7-8a09-765794883524
The FeaturePcd gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy was not
defined in the correct section.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16881 6f19259b-4bc3-4df7-8a09-765794883524
ARM GICv3 specification introduces some new components and registers.
This patch adds their definitions.
The most important GICv3 component is the GIC Redistributor. It supports
LPIs (Locality-specific peripheral Interrupt), 8+ CPU configuration.
Some GIC distributor registers have moved to the GIC redistributor.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Tested-by: Ard Biesheuvel <ard@linaro.org>
Reviewed-by: Ard Biesheuvel <ard@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16872 6f19259b-4bc3-4df7-8a09-765794883524
Use the example.com domain as recommended in RFC 2606.
NOTE: This does not modify the wording of the "TianoCore Contribution
Agreement 1.0" section
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Bruce Cran <bruce.cran@gmail.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16724 6f19259b-4bc3-4df7-8a09-765794883524
Ard Biesheuvel
Star Zeng
Heyi Guo
Olivier Martin
Ronald Cron
Jiaxin Wu
Samer El-Haj-Mahmoud
Ruiyu Ni
Laszlo Ersek
Jordan Justen