Commit Graph

318 Commits

Author SHA1 Message Date
Hao Wu 05bf4747dd MdeModulePkg NvmExpressDxe: Fix invalid queue size when creating IO queues
The Maximum Queue Entries Supported (MQES) field in the CAP (Controller
Capabilities) register for a NVMe controller restrict the maximum
individual queue size that the controller supports.

The origin code does not check this value and always uses a hardcode value
when creating I/O submission/completion queues for asynchronous
transmission. The hardcode value might be larger than the MQES field, this
will lead to an 'Invalid Queue Size' error when creating I/O
submission/completion queues.

The patch will add checks to make sure proper queue size is passed when
creating I/O submission/completion queues.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-06-02 16:40:17 +08:00
Darbin Reyes e79bed787d MdeModulePkg: Move/Replace NvmExpressHci.h definitions to Nvme.h.
Move NvmExpressHci.h definitions to a public industry standard
header in MdePkg. The NvmExpressHci.h contains definitions based
on the NVMe v1.1 specification. These definitions should be in
a public header so that clients of the NVMe passthru protocol
can use them to execute NVMe commands.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Darbin Reyes <darbin.emm.reyes@hpe.com>
Reviewed-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hpe.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-27 13:31:35 +08:00
Hao Wu 6b571c4d8c MdeModulePkg NvmExpressDxe: Fix VS2010 build error
Potentially uninitialized 'Status' might be returned in functions
NvmeCreateIoCompletionQueue() and NvmeCreateIoSubmissionQueue() in file
NvmExpressHci.c.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-26 08:33:27 +08:00
Ruiyu Ni 26bd6437ca MdeModulePkg/PciHostBridgeDxe: Fix VS tool chain build failure
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
2016-05-24 13:42:01 +08:00
Ruiyu Ni 0b58c4894d MdeModulePkg/PciHostBridgeDxe: Add CpuArch protocol dependency
The driver entry point calls gDS->SetMemorySpaceAttributes().
This interface may return EFI_NOT_AVAILABLE_YET when CPU Arch
protocol is not available.
So we need to list CpuArch protocol in its INF dependency section.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-05-24 13:42:01 +08:00
Ruiyu Ni 05070c1b47 MdeModulePkg/PciBus: do not improperly degrade resource
PciBus driver originally always degrade (64->32) the MMIO resource
for PCI BAR when the PCI device contains option ROM.
But the degrade causes the PCI device can only use resource below 4GB
which makes the resource allocation fails when the PCI device wants
very big MMIO.
The patch follows the PI spec (ECR 1529) to honor the granularity
setting for PCI BAR from IncompatiblePciDeviceSupport so that even
for PCI device which contains option ROM, the degrade doesn't happen
if IncompatiblePciDeviceSupport returns 64 as granularity.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-05-23 13:49:41 +08:00
Ruiyu Ni ea669c1ba3 MdeModulePkg/PciBus: Use shorter global variable name
Remove "Efi" from gEfiIncompatiblePciDeviceSupport to shorten
the global variable name.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-05-23 13:49:41 +08:00
Ruiyu Ni 48495aae38 MdeModulePkg/PciBus: Remove unused fields in PCI_BAR
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-05-23 13:49:41 +08:00
Ruiyu Ni cf81d5a680 MdeModulePkg/PciBus: use better name for local variables.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-05-23 13:49:41 +08:00
Hao Wu 758ea94651 MdeModulePkg NvmExpressDxe: Add BlockIo2 support
Together with EFI_BLOCK_IO_PROTOCOL, EFI_BLOCK_IO2_PROTOCOL is also
produced on NVMe devices.

The following Block I/O 2 functions are implemented:
Reset
ReadBlocksEx
WriteBlocksEx
FlushBlocksEx

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-19 12:37:59 +08:00
Ma, Maurice c28306c3d6 MdeModulePkg: Skip invalid bus number scanning in PciBusDxe driver
When PcdPciDisableBusEnumeration is enabled, the PciBus driver
might get into a dead loop if the secondary bus register on PCI
bridge is not programmed or programmed improperly. Adding this
check to avoid any potential dead loop caused by this.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Lee Leahy <Leroy.p.leahy@intel.com>
2016-05-18 16:03:30 +08:00
Ruiyu Ni 401f8cd110 MdeModulePkg/PciHostBridgeDxe: Honor ResourceAssigned
Change PciHostBridgeDxe driver to not install the
PciHostBridgeResourceAllocation protocol and let
PciRootBridgeIo.Configuration() return the correct PCI resource
assignment information when the ResourceAssigned is TRUE.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-05-11 08:53:36 +08:00
Ruiyu Ni f9607bef04 MdeModulePkg/PciHostBridgeDxe: Fix a Base/Limit comparing bug
When the aperture base equals to aperture limit, the old code treats
the aperture as non-existent. It's not correct because it indicates
a range starting with base and the length is 1.
The new code corrects the comparing bug.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-05-11 08:53:36 +08:00
Ruiyu Ni 814f4306d8 MdeModulePkg/PciHostBridgeDxe: Don't miss prefetchable MMIO aperture
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-05-11 08:53:36 +08:00
Ruiyu Ni 9c0dc0b01a MdeModulePkg/PciSioSerialDxe: Do not flush the UART
The patch aligns to the IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe
driver not flush the UART in Reset() and SetAttributes() function.
It was found the flush causes hang on certain PCI serial devices.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Jin <eric.jin@intel.com>
2016-05-10 14:12:57 +08:00
Feng Tian 6263ae931d MdeModulePkg/SdMmcPciHcDxe: Check SD's supported bus mode before switch
Before switch to a bus mode, we need check if the SD device supports
this bus mode.

Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06 16:10:01 +08:00
Feng Tian 8c983d3e06 MdeModulePkg/SdMmcPciHcDxe: Error handling enhance on tuning procedure
Enhance the code to reset tuning circuit when tuning error case happens.

Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06 16:10:00 +08:00
Feng Tian e7e89b0861 MdeModulePkg/SdMmcPciHcDxe: Using PIO rather than DMA for clock tuning
The original code is using ADMA mode to do clock tuning procedure. It
may have problem on some SD/MMC host controllers as there is no way to
know when to send next tuning cmd.

Update it to PIO mode to strictly follow SD Host Controller Simplified
Specification 3.0 Figure 2-29. By this way, if the Buffer Read Ready
interrupt is set, we could know it's ok to send the next clock tuning
cmd.

Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06 16:09:59 +08:00
Feng Tian cb9cb9e2aa MdeModulePkg/SdMmcPciHcDxe: Use BaseClk if the target clock is larger
The original code has a bug to calculate which clock freq should be
used when the target clock freq is larger than the BaseClock Freq
provided by the system.

Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06 16:09:59 +08:00
Feng Tian c25ddd0134 MdeModulePkg/SdMmcPciHcDxe: break cmd exec if the card isn't identified
Check if the card is identified/initialized correctly. if not, break
the following cmd execution through PassThru()/ResetDevice().

Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
2016-05-06 16:09:58 +08:00
Hao Wu 9cc0168a70 MdeModulePkg NvmExpressDxe: Initialize IoAlign info for an NVMe device
The "IoAlign" field in EFI_BLOCK_IO_MEDIA of an NVMe device is not
initialized properly, leading to a zero value for this field.

It should be initialized from the "IoAlign" field in the
EFI_NVM_EXPRESS_PASS_THRU_MODE structure maintained by the NVMe
controller.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-05-06 08:56:04 +08:00
Ard Biesheuvel b59e2427c2 MdeModulePkg/PciBusDxe: don't create bogus descriptor if no resources needed
If the current PCI configuration requires no resources to be allocated at
all (i.e., unpopulated bus), the PCI enumeration code creates a single
ACPI_ADDRESS_SPACE_DESCRIPTOR memory descriptor with all fields cleared.
This is rejected by the SubmitResources() implementation of the generic
PciHostBridgeDxe in the following way:

  PciHostBridge: SubmitResources for PcieRoot(0x0)
   Mem: Granularity/SpecificFlag = 0 / 00
        Length/Alignment = 0x0 / 0x0
  PciBus: HostBridge->SubmitResources() - Invalid Parameter

  ASSERT_EFI_ERROR (Status = Invalid Parameter)
  ASSERT [PciBusDxe] .../PciBusDxe/PciLib.c(561): !EFI_ERROR (Status)

So instead, create the empty configuration as a single entry of type
EFI_ACPI_END_TAG_DESCRIPTOR.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2016-04-29 15:23:20 +08:00
Feng Tian 5db1ac89be MdeModulePkg/NvmExpressDxe: comments update to meet implementation
Cc: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
Cc: Wu, Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Wu, Hao A <hao.a.wu@intel.com>
Reviewed-by: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
2016-04-29 11:25:46 +08:00
Tian Feng 6523ae8baa MdeModulePkg/NvmExpress: Clean Phase/CqHdbl/SqTdbl fields to restart HC
Phase Tag, SqTdbl/CqHdbl and SqBuffer/CqBuffer should be cleared in
NvmeControllerInit() to make HC functionality work when user invokes
NvmeBlockIoReset().

Cc: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
2016-04-26 15:44:55 +08:00
Feng Tian da7c72740f MdeModulePkg/NvmExpress: Fix bug of handling not null-terminated strings
In EnumerateNvmeDevNamespace(), when Private->ControllerData->Sn and/or
Private->ControllerData->Mn are NOT null-terminated strings,
UnicodeSPrintAsciiFormat(…) may generate unexpected (garbage) output
string.

Cc: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-04-26 15:44:55 +08:00
Tian Feng ac231001f5 MdeModulePkg/NvmExpress: Fix mem leak in error handling of Start()
Memory pointed to by Private->ControllerData has not been freed up
correctly at error handling path.

Cc: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Simon (Xiang) Lian-SSI <simon.lian@ssi.samsung.com>
2016-04-26 15:44:54 +08:00
Feng Tian e26575f79b MdeModulePkg/Sd: Not explicitly compare BOOLEAN type with TRUE/FALSE
It's coding style update to follow EDKII coding style doc.

Cc: Qiu Shumin <shumin.qiu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
2016-04-26 15:44:52 +08:00
Feng Tian 2a8b78cfd5 MdeModulePkg/Sd: wait 1ms before check DATA line in voltage switch proc
According to SD Host Controller 3.0 spec figure 3-10, we have to wait
1ms before checking DAT[3:0] in voltage switch proc

Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2016-04-21 16:08:11 +08:00
Feng Tian 83ceccabd3 MdeModulePkg/SdMmcPciHc: Reset the slot when sd device is connected
The original code doesn't reset the slot when there is device change.
It may bring issue on device identification procedure of some SD cards.

Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@Intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2016-04-21 16:07:45 +08:00
Feng Tian ac30e4c15d MdeModulePkg/Sd: Fix wrong response type of SD Deselect cmd
The SD CMD7 deselect cmd have no response according to SD
physical layer simplified spec.

Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2016-04-21 16:07:27 +08:00
Feng Tian 2e9107b87e MdeModulePkg/Sd: update the sd detection logic
If there is no card presented before power on, there would
have no card change interrupt generated. This is a corner
case which can't be handled by old logic.

The patch is used to move card present detection in the front
of card change interrupt detection.

Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2016-04-21 16:06:59 +08:00
Feng Tian b9953b6506 MdeModulePkg/Usb: Fix wrong condition judgment to support usb3.1 dev
The bcdUSB value of usb3.1 is 0x0310, we update the condition judgment
to get correct max packet size for usb3.1 dev.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-04-21 15:53:14 +08:00
Hao Wu 60cfeeb3b6 MdeModulePkg NvmExpressDxe: Ensure write-through for NVMe write command
Set the Force Unit Access (FUA) bit in NVMe Write - Command Dword 12 to
ensure write-through behavior.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
2016-04-18 09:09:33 +08:00
Feng Tian 48555339be MdeModulePkg/SdMmc: Add EDKII SD/MMC stack
This stack includes:
1. Dxe phase support by:
   1) SdMmcPciHcDxe driver to consume PciIo and produce
      SdMmcPassThru.
   2) SdDxe driver to consume SdMmcPassThru to produce
      BlkIo1/BlkIo2.
   3) EmmcDxe driver to consume SdMmcPassThru to produce
      BlkIo1/BlkIo2/SSP.

2. Pei phase support
   1) SdBlockIoPei driver to consume SdMmcHostController
      Ppi and produce VirutalBlkIo1&2.
   2) EmmcBlockIoPei driver to consume SdMmcHostController
      Ppi and produce VirutalBlkIo1&2.
   3) SdMmcPciHcPei driver to produce SdMmcHostController
      Ppi.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2016-03-30 11:27:41 +08:00
Ard Biesheuvel 3a9dcf9f28 MdeModulePkg/PciHostBridgeDxe: remove unused but set variables
Remove variables that are declared, assigned but never referenced. This
fixes a warning emitted by GCC when -Wunused-but-set-variable is in effect.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-03-25 10:52:22 +01:00
Ruiyu Ni f6830005bb MdeModulePkg/PciBus: Should reserve enough bus number for HPC
When there is no bridge before the HPC (hot plug controller),
the issue cannot be seen.
But when there are bridges before the HPC, the PciBus will only
use the value (= <CurrentBusNumber> + <ReservedBusNumber>) as the
sub-ordinary bus number for HPC.
The correct sub-ordinary bus number should be:
<CurrentBusNumber> + <OccupiedBusNumber>(by earlier bridges) +
<ReservedBusNumber>.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-03-24 11:24:30 +08:00
Ruiyu Ni 13be90faaf MdeModulePkg/PciHostBridge: Don't assert when setting UC to MMIO fails
Failing to set EFI_MEMORY_UC to MMIO aperture is not a fatal error.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-03-04 10:06:26 +01:00
Laszlo Ersek 014b472053 MdeModulePkg: PciHostBridgeDxe: don't assume extended config space
The "pc" ("pc-i440fx-*") machine types of QEMU don't support extended
config space. Accordingly, OVMF will use the following library instances
in connection with the core PciHostBridgeDxe driver:

  BasePciSegmentLibPci [class: PciSegmentLib]
    BasePciLibCf8      [class: PciLib]
      BasePciCf8Lib    [class: PciCf8Lib]

Add a new field to the PCI_ROOT_BRIDGE structure so that
RootBridgeIoCheckParameter() can catch config space offsets above 0xFF on
such old (emulated) platforms.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2016-03-03 10:00:24 +01:00
Laszlo Ersek 3da829657e MdeModulePkg: PciHostBridgeDxe: insert horizontal whitespace
... in preparation for the next patch.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-03 09:59:30 +01:00
Tian, Feng d2a2678b1c MdeModulePkg/NvmExpress: Fix uninitialized field used in NVMe DiskInfo
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-03-01 14:37:07 +08:00
Ruiyu Ni 7b0a1ead7d MdeModuelPkg/PciBus: Return AddrTranslationOffset in GetBarAttributes
Some platform doesn't use CPU(HOST)/Device 1:1 mapping for PCI Bus.
But PCI IO doesn't have interface to tell caller (device driver)
whether the address returned by GetBarAttributes() is HOST address
or device address.
UEFI Spec 2.6 addresses this issue by clarifying the address returned
is HOST address and caller can use AddrTranslationOffset to calculate
the device address.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-02-29 10:19:57 +08:00
Ruiyu Ni e90f51a822 MdeModulePkg/PciBus: reorganize case-statement to reduce code lines
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-02-29 10:19:57 +08:00
Ruiyu Ni 4653749963 MdeModulePkg/PciBus: Change local variable AddressSpace to Descriptor
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-02-29 10:19:57 +08:00
Ruiyu Ni 6474f1f156 MdeModulePkg/PciHostBridge: Don't assume resources are fully NonExistent
The patch removes the assumption that the resources claimed by root
bridges should not exist. Because resources might have been added:
1. by platform modules either in PEI through resource HOB, or in DXE,
   before the PCI host bridge driver runs.
2. Resources claimed by different root bridges may overlap so that
   resource adding operation for latter root bridges may fail if
   we assume the resource should not exist.

In real world, this patch is to fit OVMF platform needs because
different root bridges in OVMF platform shares the same resources.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: intersection-based implementation]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2016-02-26 13:31:51 +01:00
Ruiyu Ni 63b90643af MdeModulePkg/PciHostBridge: Refine function header comments.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Shumin Qiu <shumin.qiu@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
2016-02-26 13:28:33 +01:00
Laszlo Ersek c4b6f26281 MdeModulePkg: NvmExpressDxe: clean up NvmeRead() / NvmeWrite() debug msgs
These workhorse functions are part of the BlockIo protocol that
NvmExpressDxe produces. For bulk data access, they are called very
frequently. Their debug messages should be therefore downgraded to
EFI_D_VERBOSE.

In addition, the following DEBUG() warts are cleaned up:

- The function name should be printed with %a / __FUNCTION__, so that
  renaming the function, or copying the DEBUG() elsewhere, be reflected in
  the debug output automatically. (In fact, after this patch, the DEBUG()
  calls become identical.)

- "Lba" is of type UINT64, therefore it should be printed with %Lx, not
  %x.

- "OrginalBlocks" and "Blocks" are both UINTN. The only portable way to
  print UINTN is to convert it to UINT64 manually, then format it with the
  %Lx (or %Lu) conversion specifier.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@Intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19763 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-28 11:03:15 +00:00
Ruiyu Ni ccf660168e MdeModulePkg/PciHostBridgeDxe: Fix GCC build failure.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19744 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-26 05:49:18 +00:00
Ruiyu Ni 4a50cf4ebd MdeModulePkg: Add generic PciHostBridgeDxe driver.
This driver links to PciHostBridgeLib provided by platform/silicon to
produce PciRootBridgeIo and PciHostBridgeResourceAllocation protocol.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19658 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-18 04:50:18 +00:00
Feng Tian c592181266 MdeModulePkg/NvmExpressDxe: Fix MS toolchain /Od 32bit build failure
Note NVME_ACQ & NVME_ASQ internal data structure are changed to make
build pass.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19632 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-11 02:47:21 +00:00
Hao Wu 363badad19 MdeModulePkg UhciDxe: Fix a typo in function description
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19595 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-06 01:09:56 +00:00