In function SignalCallerEvent(), 'Private' and 'TransReq' are dereferenced
before NULL checking.
Since the function assumes that both 'Private' and 'TransReq' passed in
are not NULL pointer, this commit will add an ASSERT to make sure the
above assumption is satisfied.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19266 6f19259b-4bc3-4df7-8a09-765794883524
Add missing braces in module global mControllerDevicePathTemplate.
Initialize ControllerNumber and ContainsControllerNode in
SerialControllerDriverStart() to address warning for potential use
before initialization warning.
Move initialization of local SerialIo earlier in
SerialControllerDriverStart() to address warning for potential use
before initialization warning.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19232 6f19259b-4bc3-4df7-8a09-765794883524
For function ScsiExecuteSCSICommand(), when the 'Event' parameter is not
NULL but the target SCSI device does not support non-blocking I/O, it will
execute a blocking I/O operation instead.
However, after the SCSI operation is done, the 'Event' is not signaled to
inform the caller.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19217 6f19259b-4bc3-4df7-8a09-765794883524
PciSioSerialDxe driver can manages UARTs on a SIO chip or a PCI/PCIE
card.
It manages the SIO instance whose last device path node is a ACPI
device path and the HID in the ACPI device path node equals to
EISA_PNP_ID (0x501).
It also manages the PCI IO instance whose class code is 7/0/2 (16550
UART). But when proper value is set to PcdPciSerialParameters, the
driver can also manage non-standard PCI serial cards by matching
the Vendor ID and Device ID specified in PcdPciSerialParameters.
The PCI BAR index, IO/MMIO offset, register stride, clock rate can
also be specified through the same PCD.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19179 6f19259b-4bc3-4df7-8a09-765794883524
For a hot plug bridge with device attached, PciBusDxe driver reserves
the resources which equal to the total amount of padding resource
returned from HotPlug->GetResourcePadding() and the actual occupied
resource by the attached device. The behavior is incorrect.
Correct behavior is to reserve the bigger one between the padding
resource and the actual occupied resource.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18719 6f19259b-4bc3-4df7-8a09-765794883524
The resource dumping logic contains a bug which cannot dump the
resource for hot plug controller correctly. The patch fixes this
bug.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18718 6f19259b-4bc3-4df7-8a09-765794883524
Leif suggested to split the big patch to smaller ones.
This reverts commit 73b7f115c653c807b9d0be97bf516871d8aff7ba.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18717 6f19259b-4bc3-4df7-8a09-765794883524
Add a check for ResourcePaddingDescriptors being a valid pointer in
DumpPpbPaddingResource() to prevent looping on memory not owned by
PciBusDxe. The ResourcePaddingDescriptors is initialized to NULL
when the PCI_IO_DEVICE structure is allocated and remains NULL if
no PCI hot plug controllers are present. This issue is only
observed when DEBUG_CODE() macros are enabled and was introduced
by the following patch:
[edk2] [Patch] MdeModulePkg: Fix a PciBusDxe hot plug bug
SVN revsion 18658
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Kinney Michael <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18696 6f19259b-4bc3-4df7-8a09-765794883524
For a hot plug bridge with device attached, PciBusDxe driver reserves
the resources which equal to the total amount of padding resource
returned from HotPlug->GetResourcePadding() and the actual occupied
resource by the attached device. The behavior is incorrect.
Correct behavior is to reserve the bigger one between the padding
resource and the actual occupied resource.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18658 6f19259b-4bc3-4df7-8a09-765794883524
When looping through all PCI functions, code should not look for functions
1-7 if function 0 is not present or if function 0 indicates the device is
not multifunction. Prior to this fix the code would use stale data in a
buffer to determine if a device is multifunction even if function 0 is not
present. This fixes a code bug and provides very small performance
improvements.
PCI 2.3 Specification states: They [multifunction devices] are also
required to always implement function 0 in the device. Implementing other
functions is optional and may be assigned in any order.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Joseph Shifflett <joseph.shifflett@hpe.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18574 6f19259b-4bc3-4df7-8a09-765794883524
Some IDE controllers only update ID fields such as sector information on
specific commands such as the DIAG command.
The master/slave device is therefore selected both before and after
sending the DIAG command; otherwise reading the IDE registers yields the
master's ID fields.
(Reza's patch originally *moved* the master/slave selection from after the
DIAG command before it, however Feng asked for the original master/slave
select to be preserved; effectively making the master/slave select
*bracket* the DIAG command. See this subthread:
<http://thread.gmane.org/gmane.comp.bios.tianocore.devel/10545/focus=10550>.)
Cc: Alexander Graf <agraf@suse.de>
Cc: Reza Jelveh <reza.jelveh@tuhh.de>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Gabriel L. Somlo <somlo@cmu.edu>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Reza Jelveh <reza.jelveh@tuhh.de>
[feng.tian@intel.com: see above]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
[lersek@redhat.com: updated commit message]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18529 6f19259b-4bc3-4df7-8a09-765794883524
Certain PCI device may have capability pointing to itself.
Update LocateCapabilityRegBlock() to break when detecting such loop.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18473 6f19259b-4bc3-4df7-8a09-765794883524
The specification of the EFI_EXT_SCSI_PASS_THRU_PROTOCOL.PassThru()
function documents the EFI_BAD_BUFFER_SIZE return status, and the
EFI_EXT_SCSI_STATUS_HOST_ADAPTER_DATA_OVERRUN_UNDERRUN host adapter
status.
These allow an EFI_EXT_SCSI_PASS_THRU_PROTOCOL implementation to request
higher layers in the stack (in this instance, UefiScsiLib and ScsiDiskDxe)
to break up the transfer into smaller pieces.
These conditions percolate up the stack correctly: the retry loops in
ScsiDiskDxe's ScsiDiskReadSectors() and ScsiDiskWriteSectors() functions
correctly and transparently update the transfer size (ByteCount),
accommodating any shortening requested by lower levels of the stack. After
the loop -- if the request ultimately succeeds -- SectorCount is even
recalculated from the final ByteCount, to see how many sectors the outer
loop should advance.
However, the inner (ie. retry) loops both have the same error: when the
underlying protocols request the transfer to be shortened, the decrease in
transfer size (ie. ByteCount) should immediately be reflected in
SectorCount. Otherwise the sector count encoded in the CDB will exceed the
transfer size, which is a permanent error.
This issue has been witnessed while booting
en_windows_8.1_pro_n_vl_with_update_x86_dvd_6051127.iso
on the 32-bit build of OVMF, from a virtio-scsi CD-ROM:
(1) "cdboot.efi" correctly requested (from far atop) a long read:
Timeout=940000000
CdbLength=10
DataDir=Read
InTransferLength=134215680
OutTransferLength=0
SenseDataLength=108
Cdb: 28 00 00 00 25 DD 00 FF FF 00
^ ^^^^^^^^^^^ ^^^^^
| | |
| | number of 2KB sectors to read,
| | corresponding to 2048 * 65535 = 134215680 bytes
| | (see InTransferLength above)
| |
| LBA to read from
|
READ (10)
(2) In turn, the EFI_EXT_SCSI_PASS_THRU_PROTOCOL.PassThru() function
provided by "OvmfPkg/VirtioScsiDxe/VirtioScsi.c" asked for the request
to be shortened:
InTransferLength=16776704
OutTransferLength=16776704
SenseDataLength=0
HostAdapterStatus=EFI_EXT_SCSI_STATUS_HOST_ADAPTER_DATA_OVERRUN_UNDERRUN
TargetStatus=0
Status=EFI_BAD_BUFFER_SIZE
(3) Then ScsiDiskReadSectors() in
"MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c" retried the request
with correctly shortened transfer length, but incorrectly unchanged
sector count:
Timeout=940000000
CdbLength=10
DataDir=Read
InTransferLength=16776704 <--- updated as requested
OutTransferLength=0
SenseDataLength=108
Cdb: 28 00 00 00 25 DD 00 FF FF 00
^ ^^^^^^^^^^^ ^^^^^
| | |
| | not changed!
| |
| LBA to read from
|
READ (10)
(4) Since 65535 sectors of 2KB each wouldn't fit in a buffer of approx.
16MB, QEMU's virtio-scsi controller unconditionally rejected this
request with VIRTIO_SCSI_S_OVERRUN, which VirtioScsiDxe then mapped
to:
InTransferLength=16776704
OutTransferLength=0
SenseDataLength=0
HostAdapterStatus=EFI_EXT_SCSI_STATUS_HOST_ADAPTER_DATA_OVERRUN_UNDERRUN
TargetStatus=0
Status=EFI_DEVICE_ERROR
(5) After two more tries of the same, ScsiDiskDxe passed up the error,
which ultimately caused "cdboot.efi" to BSOD.
Many thanks to Larry Cleeton from Microsoft for helping debug
"cdboot.efi".
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18438 6f19259b-4bc3-4df7-8a09-765794883524
Acting specifically upon this error condition from UefiScsiLib (and
ultimately from EFI_EXT_SCSI_PASS_THRU_PROTOCOL.PassThru()) in the
- ScsiDiskRead10(),
- ScsiDiskWrite10(),
- ScsiDiskRead16(),
- ScsiDiskWrite16()
functions allows us to retry these operations from ScsiDiskReadSectors()
and ScsiDiskWriteSectors(), with adjusted transfer sizes, without
investigating further error details like Host Adapter Status, Target
Status, and Sense Data.
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18437 6f19259b-4bc3-4df7-8a09-765794883524
The error handling for timeout case is enhanced to remove TDs from
transfer ring. The original code only removed s/w URB, but the h/w
transfer descriptor TDs didn't get removed. It would cause data lost
for data stream peripheral, such as usb-to-serial device, from the
s/w perspective.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Baraneedharan Anbazhagan <anbazhagan@hp.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18313 6f19259b-4bc3-4df7-8a09-765794883524
In the original code, there exists some mismatches between the real
waiting time and the corresponding timeout comments. For example, the
XHC_GENERIC_TIMEOUT comment says it's 10ms timeout value, but the real
code in fact waits 10s.
So the code is refined to be consistent in code logic and comments.
Note XHC_POLL_DELAY macro also be removed and the polling interval in
XhcWaitOpRegBit() is changed from 1ms to 1us to keep same code style
with other code. It has no real functionality impact.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18235 6f19259b-4bc3-4df7-8a09-765794883524
EDKII usb stack is using a TPL_CALLBACK timer to monitor async transfer
request and signal event if it's done. As usb enumeration and usb mass
storage block i/o read/write runs on TPL_CALLBACK and TPL_NOTIFY level
respectively, It blocks usb async transfer requests, usually usb mouse
/use kb, getting time to run.
Without this change, user couldn't get usb mouse/kb state in time (will
show a little lag from UI view) when there is other usb transactions, such
as a new usb device inserted.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18169 6f19259b-4bc3-4df7-8a09-765794883524
According to the PCI spec, when software writes all-one to BAR for size probing,
the value read back should be 0b1...10...0 after masking the BAR type bits.
But in real world, it's possible that certain device returns 0b0...01...10...0
for MEM64 BAR size probing: some bits in the high 32bit may be 0.
PciBus driver has the code to handle such case. However, it doesn't handle the
case that the high 32bit is totally 0. The patch is to handle the special case.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18114 6f19259b-4bc3-4df7-8a09-765794883524
The logic in an if statement in PciIo is too complex and hard to understand
and make VS2015 build failure. The fix simplifies the logic.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18109 6f19259b-4bc3-4df7-8a09-765794883524
GLOBAL_REMOVE_IF_UNREFERENCED means __declspec(selectany) for MS tool
chain IA32/X64 build.
According to MSDN, "selectany" would tell the compiler that the declared
global data item (variable or object) is a pick-any COMDAT (a packaged
function). At link time, if multiple definitions of a COMDAT are seen,
the linker picks one and discards the rest.
So we have to remove GLOBAL_REMOVE_IF_UNREFERENCED key word from two global
variable's extern definitions of .h file as we have used this keyword in
.c file, otherwise the MS tool chain would pick the definitions in .h file
and treat it as uninitialized data to generate full-0 content for these two
global variables.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18088 6f19259b-4bc3-4df7-8a09-765794883524
The TPer Reset operation would be moved into SecurityPkg/Tcg/
MemoryOverwriteControl/TcgMor.inf module and be triggered at EndOfDxe.
By this way, all encrypted drives which produce EFI_STORAGE_SECURITY_
RPOTOCOL interface would be force reset when MOR is set.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tian Feng <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17717 6f19259b-4bc3-4df7-8a09-765794883524
Produce this protocol for each namespace at NVMe controller.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tian Feng <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17638 6f19259b-4bc3-4df7-8a09-765794883524
Open NVM_EXPRESS_PASS_THRU rather than PCI_IO to create parent-child
relationship.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tian Feng <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17636 6f19259b-4bc3-4df7-8a09-765794883524
The initialization of Cc.Iosqes and Cc.Iocqes should not be removed
before any I/O operation as it would impact Qemu-NVMe functionality
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17559 6f19259b-4bc3-4df7-8a09-765794883524
Follow IDE BUS Master spec to ensure the PRDT table not cross 64k
boundary in memory.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17552 6f19259b-4bc3-4df7-8a09-765794883524
LocatePciExpressCapabilityRegBlock () doesn't check the return status of Pci.Read().
Certain platform's PciRootBridge.Pci.Read() doesn't support PCIE access causing the CapabilityEntry not updated.
If the uninitialized CapabilityEntry equals to a big enough initial value, the while-loop will never end.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17513 6f19259b-4bc3-4df7-8a09-765794883524
A previous incorrect check-in adds the IsaBusDxe driver to <Root>/Bus directory.
The patch fixes it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17506 6f19259b-4bc3-4df7-8a09-765794883524
The original code hard-codes block size to 512. But after ATA 7 spec,
the non-512 block size is also supported. The code is updated to
dynamically calculate the block size according to IDENTIFY data.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17495 6f19259b-4bc3-4df7-8a09-765794883524
It's to follow the PI spec 1.4.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jie Lin <jie.lin@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17367 6f19259b-4bc3-4df7-8a09-765794883524
This patch produces a EFI_NVM_EXPRESS_PASS_THRU protocol instance
on device handle to provide upper user a way to send cmd to NVMe
device.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17286 6f19259b-4bc3-4df7-8a09-765794883524
Hao Wu
Jordan Justen
Michael Kinney
Ruiyu Ni
Anbazhagan, Baraneedharan
Joseph Shifflett
Reza Jelveh
Laszlo Ersek
Liming Gao
Feng Tian
Qiu Shumin
Olivier Martin