Commit Graph

59 Commits

Author SHA1 Message Date
Jiewen Yao fc8be1ad9a IntelSiliconPkg/VTdPmrPei: Add EndOfPei callback for S3
In S3 resume, before system transfer to waking vector,
the VTdPmr need turn off VTd protection based upon VTdPolicy.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-23 16:14:30 +08:00
Jiewen Yao 8be3ff8fb8 IntelSiliconPkg/dec: Clarify VTdPolicy.
Clarify the VTdPolicy is for both PEI and DXE.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-23 16:14:28 +08:00
Jiewen Yao 73a2fe8b87 IntelSiliconPkg/VTdDxe: Clean up DXE flush memory.
Make sure the context table are flush to memory.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-23 16:14:27 +08:00
Jiewen Yao 70dc3ec5a7 IntelSiliconPkg/VTdInfoSample: Add RMRR table.
Let system report RMRR table for the platform support
PEI graphic.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-20 14:45:45 +08:00
Jiewen Yao 8e9da4ba3c IntelSiliconPkg/IntelVTdPmrPei: Parse RMRR table.
In order to support PEI graphic, we let VTdPmrPei driver
parse DMAR table RMRR entry and allow the UMA access.

If a system has no PEI IGD, no RMRR is needed. The behavior
is unchanged.

If a system has PEI IGD, it must report RMRR in PEI phase.
The PeiVTdPrm will program the IGD VTd engine to skip the
RMRR region, and program the rest PCI VTd engine to skip
the another DMA buffer allocated in PEI phase for other
device driver.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-20 14:45:43 +08:00
Jiewen Yao f02c531967 IntelSiliconPkg/VTdInfoPpi: Let it follow DMAR table.
We notice that there is real usage in PEI to show
the graphic out. As such we need report RMRR table
in PEI to let VTdPmrPei driver skip the IGD UMA region.

Now the VTD_INFO PPI uses the same DMAR data structure.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-20 14:45:42 +08:00
Jiewen Yao 4084ccfa22 IntelSiliconPkg/VTdPei: Fix Linux build error.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2017-09-18 08:56:39 +08:00
Jiewen Yao bec7a86c70 IntelSiliconPkg/PlatformIntelVTdInfoSamplePei: Move to feature dir.
Move PlatformIntelVTdInfoSamplePei to Feature/VTd/.

Suggested-by: Star Zeng <star.zeng@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-17 09:52:15 +08:00
Jiewen Yao db5c75863d IntelSiliconPkg/IntelVTdPmrPei: Move to feature dir.
Move IntelVTdPmrPei to Feature/VTd/IntelVTdPmrPei.

Suggested-by: Star Zeng <star.zeng@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-17 09:52:13 +08:00
Jiewen Yao e4c9ac648d IntelSiliconPkg/PlatformVTdSampleDxe: Move to feature dir.
Move PlatformVTdSampleDxe to Feature/VTd/PlatformVTdSampleDxe.

Suggested-by: Star Zeng <star.zeng@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-17 09:52:12 +08:00
Jiewen Yao 9010459c9a IntelSiliconPkg/IntelVTdDxe: Move to feature dir.
Move IntelVTdDxe to Feature/VTd/IntelVTdDxe.

Suggested-by: Star Zeng <star.zeng@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-17 09:52:10 +08:00
Jiewen Yao 8a4ed1188b IntelSiliconPkg/dsc: Add PlatformVTdInfoSamplePei.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-16 09:18:14 +08:00
Jiewen Yao 53269009cb IntelSiliconPkg: Add PlatformVTdInfoSamplePei.
This is a sample driver to produce VTD_INFO PPI.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-16 09:18:11 +08:00
Jiewen Yao 71cfa709ed IntelSiliconPkg/dsc: Add IntelVTdPmrPeim.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-16 09:18:09 +08:00
Jiewen Yao 3f5ed3fa13 IntelSiliconPkg: Add IntelVTdPmrPei.
This PEIM is to produce IOMMU_PPI, so that PEI device
driver can have better DAM management.

This PEIM will setup VTD PMR register to protect
most DRAM. It allocates a big chunk DMA buffer in
the entrypoint, and only use this buffer for DMA.
Any other region is DMA protected.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-16 09:18:07 +08:00
Jiewen Yao 0b7df50021 IntelSiliconPkg/dec: Add VTD_INFO PPI GUID
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-16 09:18:05 +08:00
Jiewen Yao 77562d13ac IntelSiliconPkg/include: Add VTD_INFO PPI.
This VTD_INFO_PPI is to provide VTD information in PEI.
As such, we can have a generic VTd driver.

It is a lightweight version DMAR table, but it does
not contain PCI device information.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-16 09:18:03 +08:00
Jiewen Yao ffe77707a3 IntelSiliconPkg/VTdDxe: Disable PMR
When VTd translation is enabled, PMR can be disable.
Or the DMA will be blocked by PMR.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-16 09:18:01 +08:00
Jiewen Yao 40cc227055 IntelSiliconPkg/Vtd.h: Add definition for PMR.
Add missing PMR definition in VTd spec.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-16 09:17:59 +08:00
Jiewen Yao c50596a701 IntelSiliconPkg/IntelVtd: Consume VTd policy PCD
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-07 21:35:06 +08:00
Jiewen Yao 0d12b73306 IntelSiliconPkg/dec: Add VTd policy PCD
BIT0: This is to control if a platform wants to enable VTd
based protection during boot.
BIT1: This is to control if a platform wants to keep VTd
enabled at ExitBootService.

The default configuration is BIT0:1, BIT1:0.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-07 21:35:04 +08:00
Jiewen Yao 4d150848c5 IntelSiliconPkg/VTd: improve debug message.
Add /n for debug message to make error more
readable.

Suggested-by: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-06 12:12:10 +08:00
Jiewen Yao 94fb621d37 IntelSiliconPkg/Vtd: Support CSM usage.
Remove zero address check in IoMmuMap.
The reason is that a CSM legacy driver may use legacy memory for DMA.
As such, the legacyBios need allow below 1M to the legacy device.

This patch also fixed some typo.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-06 12:11:08 +08:00
Hao Wu 7046a2739a IntelSiliconPkg/PlatformVTdSample: Avoid using constant result 'if'
In this sample driver, if (0) {...} else {...} statements were used to
illustrate two different using scenarios.

This comment refines the coding style by substituting the 'if (0)'
statement with comments to select sample codes for different cases.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2017-08-30 19:14:20 +08:00
Jiewen Yao 5f5bdf4ab5 IntelSiliconPkg/PlatformVTdSample: update ExceptionDevice
Add sample for device scope based exception list
and PCI vendor id based exception list.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-08-28 16:28:46 +08:00
Jiewen Yao f77d35c7f0 IntelSiliconPkg/IntelVTd: update PlatformVtdPolicy
1. Handle flexible exception list format.
1.1 Handle DeviceScope based device info.
1.2 Handle PciDeviceId based device info.
2. Reorg the PCI_DEVICE_INFORMATION
2.1 Merge data pointer reduce allocation times
2.2 Add PCI device id to PCI_DEVICE_INFORMATION
2.3 Rename PciDescriptor to avoid confusing.
3. Fix the debug message too long issue.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-08-28 16:28:45 +08:00
Jiewen Yao 71872f7cda IntelSiliconPkg/header: update PlatformVtdPolicy
Add flexible exception list format:
1) Support Device scope based reporting:
Such as, Seg:0/StartBus:0/(Dev:1C|Func:0)/(Dev:0|Func:0)

2) Support PCI VendorId/DeviceId based reporting
Such as, VID:8086|DID:9D2F|Rev:21|SVID:8086|SDID:7270

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-08-28 16:28:43 +08:00
Bi, Dandan d654bf852f IntelSiliconPkg/IntelVTdDxe: Update function comments
In commit 4ad5f59715, the parameters
of some functions have been updated, but miss to update the comments
accordingly. This patch is to update the function comments.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2017-08-17 11:47:01 +08:00
Jiewen Yao 4ad5f59715 IntelSiliconPkg/IntelVTdDxe: Improve performance.
This patch is to improve IOMMU performance.
All WBINVD is removed due to performance issue.
CLFLUSH by WriteBackDataCacheRange() is used to
only flush the context table or
second level page table if they are changed.

This patch also removed some unused functions.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-08-14 22:59:13 +08:00
Jiewen Yao 3ccf5a8a41 IntelSiliconPkg/dsc: Add CacheMaintenanceLib.
It will be used by IntelVTdDxe.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-08-14 22:59:12 +08:00
Star Zeng 76c6f69cca IntelSiliconPkg: Fix VS2015 NOOPT IA32 build failure in IntelVTdDxe
There are VS2015 NOOPT IA32 build failure like below in IntelVTdDxe.
XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __allshl
XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __aullshr

This patch is to update Vtd.h to use UINT32 instead of UINT64 for
bitfields in structure definition, and also update IntelVTdDxe code
accordingly.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2017-08-11 09:30:19 +08:00
Michael D Kinney 2a98de0344 edk2: Move License.txt file to root
https://bugzilla.tianocore.org/show_bug.cgi?id=642

Add top level License.txt file with the BSD 2-Clause
License that is used by the majority of the EKD II open
source project content.  Merge copyright statements
from the BSD 2-Clause License files in each package
directory and remove the duplication License.txt
file from package directories.

Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Andrew Fish <afish@apple.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-08-03 11:02:17 -07:00
Michael D Kinney bbdd3bad1b edk2: Move TianoCore Contribution Agreement to root
https://bugzilla.tianocore.org/show_bug.cgi?id=629

Move Contributions.txt that contains the TianoCore
Contribution Agreement 1.0 to the root of the edk2
repository and remove the duplicate Contributions.txt
files from all packages.

Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Andrew Fish <afish@apple.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-08-03 11:01:53 -07:00
Hao Wu be61fcd2b0 IntelSiliconPkg/IntelVTdDxe: Add explicit NULL pointer checks
Add explicit NULL pointer check to make the codes more straight-forward.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2017-08-02 08:54:36 +08:00
Hao Wu f5046945b6 IntelSiliconPkg/IntelVTdDxe: Fix typo for VTd IOTLB domain ID
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2017-08-02 08:54:31 +08:00
Jiewen Yao 9745ddcf8a IntelSiliconPkg/dsc: Add PlatformVtd sample driver.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-07-27 09:29:23 +08:00
Jiewen Yao 5071fb9cd9 IntelSiliconPkg: Add PlatformVTdSample driver.
It provides sample on Platform VTd policy protocol.
This protocol is optional.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-07-27 09:29:21 +08:00
Jiewen Yao 642d22424c IntelSiliconPkg/dsc: Add Vtd driver.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-07-27 09:29:19 +08:00
Jiewen Yao c049fc9909 IntelSiliconPkg: Add VTd driver.
It provides AllocateBuffer/FreeBuffer/Map/Unmap function.
It also provides VTd capability yet.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-07-27 09:29:16 +08:00
Jiewen Yao b7ff5027fe IntelSiliconPkg/Dec: Add ProtocolGuid.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-07-27 09:29:14 +08:00
Jiewen Yao 4fd8eda9a3 IntelSiliconPkg/Include: Add PlatformVtdPolicy Protocol
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-07-27 09:29:12 +08:00
Jiewen Yao e2d81fb12a IntelSiliconPkg/Include: Add VTD industry standard.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-07-27 09:29:10 +08:00
Hao Wu 578dbd52b7 IntelSiliconPkg: Add package DSC file
https://bugzilla.tianocore.org/show_bug.cgi?id=608

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2017-06-26 09:37:28 +08:00
Dandan Bi 6e9e19aa84 IntelSiliconPkg: Fix format issues
1. Fix doxygen formt
2. Fix Guid format

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-20 10:51:16 +08:00
Chan, Amy f0c1e9ae88 IntelSiliconPkg: 0468303 caused to breaking the SMBIOS tables generation code
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Chiu, Chasel <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chan, Amy <amy.chan@intel.com>

System test:
Smbios tables are correctly published on an intel internal platform.

 .../DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.c      | 134 +++------------------
 1 file changed, 14 insertions(+), 120 deletions(-)
2016-12-20 10:27:09 +08:00
Giri P Mudusuru 0468303899 IntelSiliconPkg: Add DxeSmbiosDataHobLib
Added NULL Library constructor DxeSmbiosDataHobLib which adds SMBIOS
records from gIntelSmbiosDataHobGuid HOB to SMBIOS table using
SMBIOS protocol.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-17 17:35:02 -08:00
Laszlo Ersek 2048ab4b3e IntelSiliconPkg/IntelSiliconPkg.dec: drop bogus semicolon from GUID def
The DEC spec doesn't allow the trailing semicolon:

  2.6 [Guids] Usage

  GuidCName = {C Format Guid Value} # Comment

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-17 14:49:09 +01:00
Giri P Mudusuru a5991c8832 IntelSiliconPkg: Add PCD for Graphics VBT FFS GUID
Added PCD PcdIntelGraphicsVbtFileGuid to store raw format
Graphics Video BIOS Table (VBT) in FFS.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-14 10:28:38 -08:00
Mudusuru, Giri P 63998d7cd4 IntelSiliconPkg: Add SMBIOS data HOB GUID
Add gIntelSmbiosDataHobGuid used to publish SMBIOS data from PEI phase.
The HOB data format will be same as SMBIOS spec define formats for
Types 0 to 127 and OEM defined types for 128 to 255.

Generic library or DXE driver can add SMBIOS records using this HOB(s).

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-11-01 20:14:09 +08:00
Giri P Mudusuru d4a9b90fa7 IntelSiliconPkg: Fixed bug in IgdOpregion spec
Spec documents Mailbox3 - RM31 size as 0x45(69) instead of 0x46(70)

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-18 03:32:41 -07:00