Bugzilla: 3262 (https://bugzilla.tianocore.org/show_bug.cgi?id=3262)
No need to print PCIe details while CapabilityId is 0xFFFF.
Limit the NextCapabilityOffset to PCI configuration space.
Signed-off-by: VincentX Ke <vincentx.ke@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3138
Define structures for Resizable BAR Capability in
MdePkg/Include/IndustryStandard/PciExpress21.h,
Change ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
to use new structures.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Heng Luo <heng.luo@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1955
Refer to PCI express base specification Reversion 5.0, Version
1.0, Table 7-33, Supported Link Speeds Vector bit 3 indicate
the speed 16 GT/s and bit 4 indicate the speed 32 GT/s.
Add the support to shell command 'pci ...'.
Change the MaxLinkSpeed other values' result from 'Unknown'
to 'Reserved' to make the result align.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Oleksiy <oleksiyy@ami.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
It is to align to the original behavior before "-ec" option was
added.
The patch also refines the code to make it more readable.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Cc: Jim Dailey <Jim.Dailey@dell.com>
The implementation was already there but through a private flag
"-_e". The patch removes "-_e" support and add "-ec" support.
Removing old "-_e" support makes the pci command more clean.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=354
The patch removes the local PCI definitions and uses the definitions
defined in MdePkg/Include/IndustryStandard folder.
There is no functionality impact.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jarben.carsey@intel.com>
According to PCI spec the next AER capability is relative to
the beginning of PCI configuration space. Hence substract the
base offset to get the next capability.
"-_e" option is changed from TypeFlag to TypeValue, so that
user can specify individual AER capability to print.
e.g. pci 00 00 01 -i -_e <capability-id>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Abdul Lateef Attar <abdul-lateef.attar@hpe.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Use DOS format end of line(CR, LF).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Fix SMBIOSVIEW decode of the HeaderLog fields of the PCIe
AER structure . The PCIe 2.1 Base Specification, section 7.10, lists
this as 16 bytes, or 4 DWORDs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Updates to Debug1 profile commands response output.
Updating Debug1 profile commands source code to include command name as a prefix in error message.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tapan Shah <tapandshah@hp.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16729 6f19259b-4bc3-4df7-8a09-765794883524
For Invalid character ‘-’ in Pci.c line 806 and line 811, using ASCII
encoding byte 0x2d to replace.
Example error from GCC 4.9:
ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c:806:5: error: converting to execution character set: Invalid or incomplete multibyte or wide character
L"Ethernet (802.11a � 5 GHz)",
^
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Jaben Carsey <Jaben.carsey@intel.com>
Tested-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15889 6f19259b-4bc3-4df7-8a09-765794883524
This updated the strings to be compliant with PCI CODE AND ID ASSIGNMENT SPECIFICATION 1.5.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Signed-off-by: Chris Phillips <chrisp@hp.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15885 6f19259b-4bc3-4df7-8a09-765794883524
there is a new non-spec parameter "-_e" which allows additional information output to be controlled.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15070 6f19259b-4bc3-4df7-8a09-765794883524
VincentX Ke
Luo, Heng
Gao, Zhichao
Michael D Kinney
Liming Gao
Ruiyu Ni
Chen A Chen
Abdul Lateef Attar
Qiu Shumin
Samer El-Haj-Mahmoud
Tapan Shah
Jaben Carsey
Jeff Bobzin (jeff.bobzin
Olivier Martin
Chris Phillips
Jordan Justen
jcarsey
ydong10
jljusten