Albecki, Mateusz 195f673f62 MdeModulePkg/SdMmcPciHcDxe Fix eMMC HS400 switch sequence
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1140

In eMMC HS400 switch sequence flow eMMC driver attempted
to execute SEND_STATUS just after switching bus timing to high
speed and before downgrading clock frequency to 52MHz. Since link
was at that time in incorrect state SEND_STATUS was failing which
made driver think switch to HS400 failed.
This change makes driver always change clock frequency after
switching bus timing and before executing SEND_STATUS.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Albecki Mateusz <mateusz.albecki@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2019-02-20 09:07:17 +08:00
2014-10-14 16:08:15 +00:00
2019-02-11 11:09:44 +08:00
2019-02-14 10:02:28 +08:00
2019-02-14 10:02:28 +08:00
2019-02-14 10:02:28 +08:00

EDK II Project

A modern, feature-rich, cross-platform firmware development environment for the UEFI and PI specifications from www.uefi.org.

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