Duggapu Chinni B 543add1d41 IntelFsp2Pkg: Fsp T new ARCH UPD Support ... Changes to support spec changes 1. Remove usage of Pcd. 2. Change code to validate the Temporary Ram size input. 3. Consume the input saved in YMM Register Cc: Sai Chaganty <rangasai.v.chaganty@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Chiu Chasel <chasel.chiu@intel.com> Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com> Cc: Ni Ray <ray.ni@intel.com> Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com> Reviewed-by: Chiu Chasel <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>		2024-04-09 17:15:10 +00:00
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Fsp22ApiEntryS.nasm	IntelFsp2Pkg: Support Multi-Phase SiInit and debug handlers.	2020-05-14 12:34:01 +00:00
Fsp24ApiEntryM.nasm	IntelFsp2Pkg: Fsp T new ARCH UPD Support	2024-04-09 17:15:10 +00:00
Fsp24ApiEntryS.nasm	IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions.	2022-09-07 04:21:15 +00:00
FspApiEntryCommon.nasm	IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions.	2022-09-07 04:21:15 +00:00
FspApiEntryI.nasm	IntelFsp2Pkg: Fix FspSecCoreI build failure.	2022-09-15 17:28:34 +00:00
FspApiEntryM.nasm	IntelFsp2Pkg: Fsp T new ARCH UPD Support	2024-04-09 17:15:10 +00:00
FspApiEntryS.nasm	IntelFsp2Pkg: Replace BSD License with BSD+Patent License	2019-04-09 10:58:03 -07:00
FspApiEntryT.nasm	IntelFsp2Pkg: Fsp T new ARCH UPD Support	2024-04-09 17:15:10 +00:00
FspHelper.nasm	IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T	2022-11-11 04:46:39 +00:00
MicrocodeLoadNasm.inc	IntelFsp2Pkg: Replace BSD License with BSD+Patent License	2019-04-09 10:58:03 -07:00
ReadEsp.nasm	IntelFsp2Pkg: X64 compatible changes to support PEI in 64bit	2022-04-16 00:18:14 +00:00
SaveRestoreSseNasm.inc	IntelFsp2Pkg: Fsp T new ARCH UPD Support	2024-04-09 17:15:10 +00:00
Stack.nasm	IntelFsp2Pkg: X64 compatible changes to support PEI in 64bit	2022-04-16 00:18:14 +00:00