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54a3e8c9f5
This new PCD is used to specify the AP loop mode during POST phase. The value 1 means we will place AP in the Hlt-Loop state by HLT instruction. BSP need to send INIT-SIPI-SIPI to wake up APs. The value 2 means we will place AP in the deepest C-state by MWAIT instruction. BSP need to modify the monitor buffer by MONITOR instruction to wake up APs. The value 3 means we will place AP in the Run-loop state. APs are running. BSP need to write one semaphore to wake up APs. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19341 6f19259b-4bc3-4df7-8a09-765794883524