oliviermartin 5e7731443c ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure bits to their PPIs ... The GICD_IGROUPR0 is banked for each connected processor. It means the Non-Secure bits for the PPIs (Private Peripheral Interrupts) must be configured for every processor. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13135 6f19259b-4bc3-4df7-8a09-765794883524		2012-03-26 11:03:36 +00:00
..
PL390Gic.c	ArmPkg/PL390Gic: Introduced PcdGicSgiIntId to define which SGI is used for core synchronisation	2012-03-26 10:46:25 +00:00
PL390GicDxe.c	ArmPkg/Drivers/PL390Gic: Removed acknowledge of special interrupts (spurious interrupt)	2012-03-26 10:54:49 +00:00
PL390GicDxe.inf	ArmPkg: Renamed library 'PL390GicLib' into 'ArmGicLib'	2011-09-22 22:59:52 +00:00
PL390GicLib.inf	ArmPkg/PL390Gic: Introduced PcdGicSgiIntId to define which SGI is used for core synchronisation	2012-03-26 10:46:25 +00:00
PL390GicNonSec.c	ARM Packages: Fixed Build failings/warnings/EDK2 coding convention	2011-09-27 16:42:47 +00:00
PL390GicSec.c	ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure bits to their PPIs	2012-03-26 11:03:36 +00:00
PL390GicSecLib.inf	ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure bits to their PPIs	2012-03-26 11:03:36 +00:00