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6f7878a972
The value of EBX must be preserved to follow IA32 cdecl calling convention in the assembly implementation of AsmFlushCacheLine(). The CPUID instruction modifies the EBX register. The EBX register value is saved onto the stack before CPUID and restored from the stack after CPUID. The update to the inline assembly implementation of AsmFlushCacheLine() changed the location of the LinearAddress parameter value on the stack. The hardcoded lookup using [esp + 4] is not correct. Use the parameter name LinearAddress instead of the hard coded [esp + 4] stack location to prevent this issue from occurring again if there are changes to the inline assembly in the future. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17279 6f19259b-4bc3-4df7-8a09-765794883524