mirror of https://github.com/acidanthera/audk.git
55a0cdb61c
CpuIo2Dxe only supports IO to access to CPU IO. Some ARCHs that do not implement ports for CPU IO require MMIO to access PCI IO, and they pretty much put the IO devices under the LPC bus, which is usually under the PCIe/PCI bus. CpuMmio2Dxe was added to meet these needs. CpuMmio2Dxe depends on PcdPciIoTranslation. The code is copied from ArmPkg. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Ray Ni <ray.ni@intel.com> |
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|---|---|---|
| .. | ||
| Application/Cpuid | ||
| CpuDxe | ||
| CpuDxeRiscV64 | ||
| CpuFeatures | ||
| CpuIo2Dxe | ||
| CpuIo2Smm | ||
| CpuIoPei | ||
| CpuMmio2Dxe | ||
| CpuMpPei | ||
| CpuS3DataDxe | ||
| CpuTimerDxeRiscV64 | ||
| Include | ||
| Library | ||
| MicrocodeMeasurementDxe | ||
| PiSmmCommunication | ||
| PiSmmCpuDxeSmm | ||
| ResetVector | ||
| SecCore | ||
| SecMigrationPei | ||
| Test | ||
| Universal/Acpi/S3Resume2Pei | ||
| UefiCpuPkg.ci.yaml | ||
| UefiCpuPkg.dec | ||
| UefiCpuPkg.dsc | ||
| UefiCpuPkg.uni | ||
| UefiCpuPkgExtra.uni | ||