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1619 Commits

Author SHA1 Message Date
Mikhail Krichanov 7154ce628f CpuExceptionHandlerLib: Saved UserPageTable on stack, 
used CS saved on stack instead of DS for CPL extraction.
 2025-01-24 19:32:15 +03:00
Mikhail Krichanov aeacf20255 Ring3: Fixed line endings. 2025-01-20 16:30:21 +03:00
Mikhail Krichanov 1f8f6ddc81 CpuExceptionHandlerLib: Refactored out mSwitchCr3Flag. 2025-01-20 16:28:26 +03:00
Mikhail Krichanov efcbf1946d Ring3: Fixed line endings. 2025-01-10 18:14:00 +03:00
Mikhail Krichanov 558889562f CpuArchLib: Fixed CpuGetMemoryAttributes(). 2024-12-05 20:46:57 +03:00
Mikhail Krichanov 85070fbba0 CpuArchLib: Specified IdtTable size precisely. 2024-12-05 12:35:16 +03:00
Mikhail Krichanov b9976de78c Ring3: Added support for IA32 User page table. 2024-12-03 14:40:52 +03:00
Mikhail Krichanov fcd47185eb Ring3: Added support for User page table to AllocatePages(), FreePages(). 2024-12-02 12:04:46 +03:00
Mikhail Krichanov 1bde91a85d Ring3: Set 1G User pages as not present by default, fixed padding. 2024-11-29 19:42:10 +03:00
Mikhail Krichanov 63dcc29d15 Ring3: Added Idt to User page table. 2024-11-29 19:40:26 +03:00
Mikhail Krichanov 1a5a22e450 Ring3: Added SetExceptionAddresses(), aligned exceptions' stacks. 2024-11-29 14:33:17 +03:00
Mikhail Krichanov c23d434619 Ring3: Added necessary Core pages to User page table. 2024-11-27 18:03:30 +03:00
Mikhail Krichanov 3b8cd407d3 Ring3: Added support for separate User address space. 2024-11-26 19:12:15 +03:00
Mikhail Krichanov 0dd56c8dae CpuExceptionHandlerLib: Added PcdSerialUseMmio condition. 2024-09-23 17:35:27 +03:00
Mikhail Krichanov 9c2eb6d642 CpuExceptionHandlerLib: Refactored IO Bit Map initialization. 2024-09-17 11:37:46 +03:00
Mikhail Krichanov 76ac8a5fb0 CpuExceptionHandlerLib: Added a separate stack for timer. 2024-09-09 08:58:57 +03:00
Mikhail Krichanov 94be39d0c5 Ring3: Refactored I/O Map initialization using PcdUartBase and PcdDebugIoPort. 2024-09-05 17:39:35 +03:00
Mikhail Krichanov ede4877e3b Ring3: Fixed buggy timer interrupt handling for X64. 2024-09-05 15:54:33 +03:00
Mikhail Krichanov be8f6f968e Ring3: Fixed buggy timer interrupt handling for IA32. 2024-09-05 11:46:52 +03:00
Mikhail Krichanov 279c5338bc Ring3: Fixed interrupts handling for IA32. 2024-09-03 13:19:17 +03:00
Mikhail Krichanov ede5387afd Ring3: Fixed TSS initialization. 2024-09-03 13:19:17 +03:00
Mikhail Krichanov 9bf5a1d5f0 Ring3: Moved platform dependant initialization to separate files. 2024-09-03 13:19:16 +03:00
Mikhail Krichanov 38e92b2072 Ring3: Refactored exception handling. 2024-09-03 13:19:15 +03:00
Mikhail Krichanov 5b281e2c16 Ring3: Forbade Ring3 accsess to all ports but for UART 
to allow DEBUG printing.
 2024-09-03 13:19:15 +03:00
Mikhail Krichanov f3ce095edb Ring3: Fixed interrrupts handling. 2024-09-03 13:19:15 +03:00
Mikhail Krichanov 6502e73b0d Ring3: Added SYSCALL draft. 2024-09-03 13:10:45 +03:00
Mikhail Krichanov 1112ad7822 Ring3: Added EnterUserImage(). 2024-09-03 13:10:44 +03:00
Mikhail Krichanov db50e4edf1 Ring3: Added GetMemoryAttributes() into EFI_CPU_ARCH_PROTOCOL. 2024-09-03 13:10:44 +03:00
Mikhail Krichanov cf83eed077 Ring3: Set USER bit in all page table structures. 2024-09-03 13:10:44 +03:00
Mikhail Krichanov 8c069a27e5 Ring3: Added EFI_MEMORY_USER attribute. 2024-09-03 13:10:42 +03:00
Mikhail Krichanov 138ecce134 Ring3: Some drafts. 2024-09-03 13:08:06 +03:00
Mikhail Krichanov 25d3704cc6 UefiCpuPkg: Added segment descriptors' data structures. 2024-09-03 13:08:06 +03:00
Mikhail Krichanov a6c369fc36 Fixed compilation of all packages tracked by CI after rebasing upon edk2-stable202405 tag. 2024-07-22 13:52:40 +03:00
Mikhail Krichanov cf38766c99 Fixed compilation of all packages tracked by CI after rebasing upon edk2-stable202311. 2024-07-22 13:51:38 +03:00
Mikhail Krichanov 46050fc0fc SecurePE: Defined new PcdImageProtectionPolicy. 2024-07-22 13:49:00 +03:00
Mikhail Krichanov 21327695a0 UE: Support UE generation and consumption. 2024-07-22 13:49:00 +03:00
Mikhail Krichanov 028bb3e2c7 MdePkg/UefiImageLib: Introduce DebugAddress 
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
 2024-07-22 13:49:00 +03:00
Mikhail Krichanov 5a8fe7214e MdePkg/UefiImageLib: Support multi-format and multi-source architecture 
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
 2024-07-22 13:49:00 +03:00
Mikhail Krichanov 769c333a61 MdeModulePkg/Core/Dxe: Integrate CPU Architectural producer 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3223

In the current design, memory protection is not available till CpuDxe
is loaded. To resolve this, introduce CpuArchLib to move the
CPU Architectural initialization to DxeCore.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Vitaly Cheptsov <vit9696@protonmail.com>
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
 2024-07-22 13:47:18 +03:00
Mikhail Krichanov 2ae98acd86 Drop support for the TE format 2024-07-22 13:47:18 +03:00
Mikhail Krichanov a0180c022a UefiCpuPkg/CpuExceptionHandlerLib: Creates unified ExceptionHandlerAsm 
This change removes Xcode5ExceptionHandlerAsm and merge it's
functionality into ExceptionHandlerAsm.
Also decreases number of vectors to 32 for:
- 64-bit PeiCpuExceptionHandlerLib
- 32-bit PeiCpuExceptionHandlerLib, SecPeiCpuExceptionHandlerLib

Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
 2024-07-22 13:47:18 +03:00
Mikhail Krichanov 091bca8bc8 MdePkg/MemoryAllocationLib: Add Allocate(Aligned)CodePages 2024-07-22 13:47:18 +03:00
Marvin Häuser 1a49c0297c UefiCpuPkg/MtrrLib: Add missing PcdLib.h include 
MtrrLib does not include PcdLib.h despite explicitly using its
definitions. Add the include to fix compilation for modules that do not
utilize AutoGen.

Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
 2024-07-22 13:47:17 +03:00
Savva Mitrofanov 30afd72eaf UefiCpuPkg/CpuPageTableLib: Add intrinsic lib to fix MSVC build 
For the bitfield access, MSVC apparently uses a right shift of the base type of the bitfield member. In our case, is is cased by IA32_PTE_4K and
IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE and other structures which uses uint64
bitfields and 32-bit x86 doesn't have a 64-bit integer shift (except using MMX or SSE2). With -Od (NOOPT) even for constant counts it puts
the data in EDX:EAX, the shift count in cl and calls __aullshr.

Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
 2024-07-22 13:47:17 +03:00
Savva Mitrofanov 3246819f4c UefiCpuPkg/UnitTest: Fixes CLANGDWARF build 
Adds missing EFIAPI modifiers. Fixes calling conventions by defining as
ms_abi

Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
 2024-07-22 13:47:17 +03:00
Mikhail Krichanov 7b10859b36 BaseTools: Replaced GenFw with ImageTool and MicroTool. 2024-07-22 13:45:44 +03:00
Mikhail Krichanov a955e8811b SecurePE: Replaced old PE loader with Secure one. 2024-07-22 13:42:14 +03:00
Savva Mitrofanov 75bdb2a996 UefiCpuPkg/CpuExceptionHandlerLib: Increase mBuffer size 
Add missing GDT alignment into mBuffer to prevent possible memory
corruption on ALIGN_POINTER operation on NewGdtTable
in ArchExceptionHandler

Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
 2024-07-22 12:45:14 +03:00
Jiaxin Wu 5cbfb93abe UefiCpuPkg/Library: Support to get processor extended info 
Intel has some features need to use processor extended
information under CPU feature InitializeFunc(), so add code
to support it: This patch is to add CPU_V2_EXTENDED_TOPOLOGY
to get processor extended info.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 08:17:31 +00:00
Jiaxin Wu 2727231b0a UefiCpuPkg/PiSmmCpuDxeSmm: Remove SmBases relocation logic 
This patch is to remove legacy SmBase relocation in
PiSmmCpuDxeSmm Driver. The responsibility for SmBase
relocation has been transferred to the SmmRelocationInit
interface, which now handles the following tasks:
1. Relocates the SmBase for each processor.
2. Generates the gSmmBaseHobGuid HOB.

As a result of this change, the PiSmmCpuDxeSmm driver's
role in SMM environment setup is simplified to:
1. Utilize the gSmmBaseHobGuid to determine the SmBase.
2. Perform the ExecuteFirstSmiInit() to do early SMM
initialization.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 01:53:58 +00:00