Add HII definitions from UEFI 2.6 for HII Image Variability and PNG
Blocks
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Per the description of HttpBootGetBootFile, the function should return
EFI_BUFFER_TOO_SMALL if the given buffer is smaller than the remote image.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
HttpGenRequestMessage assumes that HTTP message would always
contain a request-line, headers and an optional message body.
However, subsequent to a HTTP PUT/POST request, HTTP requests
would contain just the message body. This patch supports
creation of such request messages with additional checks.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hegde, Nagaraj P <nagaraj-p.hegde@hpe.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Add the USB OHCI driver from revision 24ca2f35 of QuarkSocPkg.
Change-Id: Ie7aa0bc47d4ff06adc57976a5efb0e40ce4e1673
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Add SD and eMMC DXE driver support to CorebootPayloadPkg.
Change-Id: Ibfd3a2cc32a653ce51e38d9157ea3c6da25a5474
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Set the proper Shell file GUID so that the BDS transfers control to the
Shell.
Change-Id: I816636a340bbe2f76ac1973b9cb685084c4f88a0
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Use the BaseSerialPortLib16550 which sets RTS and DTR during
initialization. This fixes the mis-matched flow control issue when
the flow control signals are connected between the host and target
and the host has flow control enabled.
Change-Id: I3505e129b2de3c5c17fff23c62553f15cd892dca
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Set the vendor to 0xffff which indicates the end of the list.
Change-Id: If6475e04d3675f0a932571a85d1dd3f301416b6a
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
eviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Convert to using DOS line endings.
Change-Id: Ie2f148867d9b2b386d556583afb6716ec21399e9
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
This implements the platform glue for the new generic BDS implementation.
It is based on the ArmVirtQemu version, with the QEMU references removed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Instead of cleaning the data cache to the PoU by virtual address and
subsequently invalidating the entire I-cache, invalidate only the
range that we just cleaned. This way, we don't invalidate other
cachelines unnecessarily.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
We currently register the shell before creating the boot options for
the block devices and the network devices, so the boot manager boots
into the internal shell if the user doesn't specify the boot order.
However, Xen doesn't support fw_cfg, so there is no way to change the
boot order with the external command, and the firmware will always
boot into the internal shell if the user doesn't interfere the boot
process.
This patch postpones the shell registration after MdeModulePkg/BDS
creates all the boot options for the block and network devices, so
that firmware will try to boot the block/network devices first.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Conform to the specification for GetStatus(), which states that "if
there are no transmit buffers to recycle and TxBuf is not NULL, *TxBuf
will be set to NULL".
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Brown <mcb30@ipxe.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
On the Q35 machine type of QEMU, there is no port multiplier connected to
the on-board SATA controller. Therefore the AtaAtapiPassThru driver update
for Mantis ticket 1353 <https://mantis.uefi.org/mantis/view.php?id=1353>
changes the middle number (the Port Multiplier Port Number) in the Sata()
device path nodes from 0x0 to 0xFFFF.
Adapt the translation from OpenFirmware in QemuBootOrderLib.
(Note: QemuBootOrderLib is deprecated at this point (see USE_OLD_BDS in
the DSC files), but until we remove it, it should be kept in sync with
QemuNewBootOrderLib.)
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
On the Q35 machine type of QEMU, there is no port multiplier connected to
the on-board SATA controller. Therefore the AtaAtapiPassThru driver update
for Mantis ticket 1353 <https://mantis.uefi.org/mantis/view.php?id=1353>
changes the middle number (the Port Multiplier Port Number) in the Sata()
device path nodes from 0x0 to 0xFFFF.
Adapt the translation from OpenFirmware in QemuNewBootOrderLib.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
The Mantis ticket 1353 <https://mantis.uefi.org/mantis/view.php?id=1353>
and Mantis ticket 1472 <https://mantis.uefi.org/mantis/view.php?id=1472>
updated the description of the port multiplier port number parameter in
SATA Device Path Node and ATA Pass-Through Protocol.
Now, this parameter should be set to 0xFFFF instead of 0 to indicate that
an ATA device is directly attached on the controller port.
Please note that this is an incompatible change. The consumer of SATA
device path or ATA_PASS_THRU needs to re-examine its usage to follow UEFI
2.5 mantis 1353 and 1472.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
The UEFI2.5 Errata (Mantis ticket 1472 -
https://mantis.uefi.org/mantis/view.php?id=1472) updated
'PortMultiplierPort' parameter description for the following services in
EFI_ATA_PASS_THRU_PROTOCOL:
1. PassThru
2. BuildDevicePath
3. ResetDevice
Now, if there is no port multiplier on a ATA controller port, the
PortMultiplierPort parameter should be set to 0xFFFF instead of 0.
Please note that this is an incompatible semantic change. The consumer of
EFI_ATA_PASS_THRU_PROTOCOL needs to re-examine its usage to follow UEFI
2.5 Errata mantis 1472.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
The UEFI2.5 spec (Mantis ticket 1353 -
https://mantis.uefi.org/mantis/view.php?id=1353) updated the Port
Multiplier Port Number description of SATA device path to use 0xFFFF when
the device is directly connected to the HBA.
Please note that this is an incompatible semantic change. The consumer of
SATA device path needs to re-examine its usage to follow UEFI 2.5 mantis
1353.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Enhance the error handling:
1. When the device is unlocked at BIOS phase and system does a warm reboot,
the device may be still in unlock status if it uses external power. For
such case, we would still popup password window to ask user input. If
user presses ESC key here, we would force the system shut down or ask
user input again to avoid security hole.
2. When user reach max retry count, force shutdown.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
If two attempts added on different NIC and enable
MPIO attribute, then change the attempts order. If
both two attempts succeed to connect the target,it
should abort the later one in the order and uninstall
ExtScsiPassThruProtocol Interface, But now it
unistall it twice.
Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-By: Ye Ting <ting.ye@intel.com>
Reviewed-By: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
Since the only reason for keeping a local copy mRT of the gRT pointer
is to be able to call GetVariable/SetVariable at runtime, use the
UefiRuntimeLib helpers instead, so that we can drop mRT altogether.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
PL031RealTimeClockLib is a base library that could potentially (although
unlikely) be incorporated into other modules than the DXE_RUNTIME_DRIVER
module that it was intended to complement.
This means the library has no business whatsoever setting the Runtime
Service table pointers directly (since we have no way of knowing which
instance will 'win', and the pointers may end up referring to a module
that is not a DXE_RUNTIME_DRIVER). So remove the assignment altogether.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Add a PCD to allow the platform to mask in/out specific features of
the LAN9118 device advertised during auto-negotiation.
For example, the Juno ARM Development Platform doesn't support full
duplex mode. This PCD will allow the platform developer to prevent the
full duplex modes from being advertised.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
[ardb: change default feature mask so that full duplex is disabled]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Leif Lindholm <leif.lindholm@linaro.org>
Make the implementation of RouteConfig/ExtractConfig function
follow the UEFI spec.
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
It should start from the last '\x' position + 1 to find next '\x'
character.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The patch re-factors the code without functionality impact.
Next patch will add code to support OVMF above Xen.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Change PciHostBridgeDxe driver to not install the
PciHostBridgeResourceAllocation protocol and let
PciRootBridgeIo.Configuration() return the correct PCI resource
assignment information when the ResourceAssigned is TRUE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Some platform doesn't require PciBus driver to assign resource
to PCI devices which causes PciRootBridgeIo.Configuration() cannot
return correct resource information to caller.
When resource assignment by PciBus is not mandatory, only light
version of PCI bus enumeration is performed, which only collects
the device resource consumption and publishes the PciIo instance.
The corresponding logic is in PciEnumeratorLight() in PciBus driver.
But PciEnumeratorLight() still depends on
PciRootBridgeIo.Configuration() returns the starting bus number in
order to search down to find all PCI devices under the root bridge.
When ResourceAssigned in PCI_ROOT_BRIDGE returned by
PciHostBridgeGetRootBridges() is TRUE, PciHostBridge driver treats
the Bus/Io/Mem/MemAbove4G/PMem/PMemAbove4G as the resource that are
*actually assigned* to the root bridge, instead of the resource that
*can be assigned* to the root bridge.
So that PciRootBridgeIo.Configuration() can return the correct
information.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
In order to match the previous commit, Base must be strictly larger than
Limit if some type of aperture is not available on a PCI root bridge.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
When the aperture base equals to aperture limit, the old code treats
the aperture as non-existent. It's not correct because it indicates
a range starting with base and the length is 1.
The new code corrects the comparing bug.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
To support UEFI Secure Boot and the Linux persistent store with UEFI
variables, set PcdMaxVariableSize to 0x2000 bytes as is done in OvmfPkg.
For reference, the related Ovmf commits: 8cee3de72d441ca9
Also increase the maximum size for Authenticated variables in order to
handle a larger Signature List size as is done in OvmfPkg. Related Ovmf
commit: f5404a3e
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Linn Crosetto <linn@hpe.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Pass the serial port baudrate, register stride, input clock rate and
ID from coreboot to CorebootPayloadPkg.
Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Skip non-bridge devices which are not enabled either for memory or I/O
access.
Change-Id: I1a39c69a8556b6b9cefd1a2bb191f7e0744ddfb0
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Remove trailing white space from PciEnumeratorSupport.c.
Change-Id: Ia2f354151d46c09b140e2b42609d76fbbf8333f9
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Ensure communication between the host and the UEFI system running
CorebootPayloadPkg. In cases where the host has flow control enabled
and the serial connection is providing the flow control signals, the
host will not be able to send data to the UEFI system because DTR and
RTS are not present. The host may also discard all output data from
the UEFI system because DTR is not present. By setting DTR and RTS
in the UART initialization code this case works properly.
Change-Id: I393f57104d111472cafcae01d4e43d4ea837be3b
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Now that the LAN9118-specific MMIO accessors provide the required
delays, remove the redundant stalls.
Stalls in delay loops are kept, as these give time for work to happen
beyond synchronisation of the device register file.
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Migrate the existing code to use the new LAN9118 MMIO wrappers, ensuring
that timing requirements are respected.
The newly redundant stalls will be removed in a subsequent patch.
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
As described in the LAN9118 datasheet, delays are necessary after some
reads and writes in order to ensure subsequent reads do not see stale
data.
This patch adds helpers to provide these delays automatically, by
performing dummy reads of the BYTE_TEST register (as recommended in the
LAN9118 datasheet). This approach allows the device register file itself
to provide the required delay, avoiding issues with early write
acknowledgement, or re-ordering of MMIO accesses aganist other
instructions (e.g. the delay loop).
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Commit a4626006bb ("EmbeddedPkg/Lan9118Dxe: use MemoryFence")
replaced some stalls with memory fences, on the presumption that these
were erroneously being used to order memory accesses. However, this was
not the case.
LAN9118 devices require a timing delay between state-changing
reads/writes and subsequent reads, as updates to the register file are
asynchronous and the effects of state-changes are not immediately
visible to subsequent reads.
This delay cannot be ensured through the use of memory barriers, which
only enforce observable ordering, and not timing. Thus, converting these
stalls to memory fences was erroneous, and may result in stale values
being read.
This reverts commit a4626006bb.
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
When we split a block entry into a table entry, the UXN/PXN/XN permission
attributes are inherited both by the new table entry and by the new block
entries at the next level down. Unlike the NS bit, which only affects the
next level of lookup, the XN table bits supersede the permissions of the
final translation, and setting the permissions at multiple levels is not
only redundant, it also prevents us from lifting XN restrictions on a
subregion of the original block entry by simply clearing the appropriate
bits at the lowest level.
So drop the code that sets the UXN/PXN/XN bits on the table entries.
Reported-by: "Oliyil Kunnil, Vishal" <vishalo@qti.qualcomm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Samer El-Haj-Mahmoud
Gary Lin
Nagaraj Hegde
Leahy, Leroy P
Jaben Carsey
Ard Biesheuvel
Michael Brown
Laszlo Ersek
Hao Wu
Eric Dong
Feng Tian
Zhang, Lubo
Ryan Harkin
Yonghong Zhu
Dandan Bi
Zhang, Chao B
Ruiyu Ni
Linn Crosetto
Mark Rutland