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22 Commits

Author SHA1 Message Date
Jeff Fan 0a4f7aa056 UefiCpuPkg/MtrrLib: MtrrValidBitsMask and MtrrValidAddressMask wrong 
Per IA32 SDM, if CPUID.80000008H is not available, software may assume that the
processor supports a 36-bit physical address size.
However, for such old processors (For example, Quark processor),
MtrrValidBitsMask and MtrrValidAddressMask values are reverted and wrong in
MtrrLib. MtrrValidBitsMask should be 0xFFFFFFFFFULL and MtrrValidAddressMask
should be 0xFFFFFF000ULL.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18396 6f19259b-4bc3-4df7-8a09-765794883524
 2015-09-05 02:07:02 +00:00
Jeff Fan 44c8400a7d MtrrDebugPrintAllMtrrs() should loop until the max physical address is reached. 
GetMemoryCacheTypeFromMtrrType () should return the default memory type instead of UC type for MTRR_CACHE_INVALID_TYPE.

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15053 6f19259b-4bc3-4df7-8a09-765794883524
 2014-01-07 06:24:16 +00:00
vanjeff a5953380b1 Add missing parameter in functions header. 
signed-off-by: Jeff Fan <jeff.fan@intel.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13815 6f19259b-4bc3-4df7-8a09-765794883524
 2012-10-10 07:39:01 +00:00
vanjeff c878cee473 Save and disable CPU interrupt before programming MTRR settings, and restore the CPU interrupt after programming MTRR setting. 
signed-off-by: Kinney, Michael D <michael.d.kinney@intel.com>
reviewed-by: Bjorge, Erik C <erik.c.bjorge@intel.com>
reviewed-by: Jeff Fan <jeff.fan@intel.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13749 6f19259b-4bc3-4df7-8a09-765794883524
 2012-09-27 03:04:31 +00:00
rsun3 0779e5bfb0 UefiCpuPkg MtrrLib: For MtrrSetAllMtrrs(), do not set FE/E bits in IA32_MTRR_DEF_TYPE MSR after the MSR is restored. 
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13182 6f19259b-4bc3-4df7-8a09-765794883524
 2012-04-11 01:41:29 +00:00
rsun3 f5b315e525 UefiCpuPkg MTRR Library: Remove a buggy check logic in MtrrSetMemoryAttribute() that may incorrectly RETURN_OUT_OF_RESOURCES in some cases. 
Signed-off-by: rsun3
Reviewed-by: vanjeff



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12780 6f19259b-4bc3-4df7-8a09-765794883524
 2011-11-25 02:55:43 +00:00
vanjeff 91ec78241c 1. Introduce the API MtrrGetDefaultMemoryType () in Mtrr Library. 
2. Invoke MtrrGetDefaultMemoryType() to get the default memory type instead of the hard code value in module.
3. Add go though for UC attributes.

Signed-off-by: vanjeff
Reviewed-by: rsun3

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12587 6f19259b-4bc3-4df7-8a09-765794883524
 2011-10-28 06:01:55 +00:00
rsun3 1e60a0ecfc UefiCpuPkg MTRR Library: enhance MTRR Library. 
When it finds that a request range is covered by an existing MTRR with same cache type, the MTRR library set a flag and continues to check other MTRRs and invalidate any MTRR of the same request range with a higher-priority cache type.

Signed-off-by: rsun3
Reviewed-by: gxing


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12388 6f19259b-4bc3-4df7-8a09-765794883524
 2011-09-20 07:36:11 +00:00
rsun3 1a2ad6fca7 Enhance the MTRR lib to support the case where alignment of base address < length. 
Signed-off by: rsun3
Reviewed-by:   hhuan13

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12330 6f19259b-4bc3-4df7-8a09-765794883524
 2011-09-13 03:06:48 +00:00
mdkinney 76f6d95440 Remove extra {} inside DEBUG_CODE() macro 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11244 6f19259b-4bc3-4df7-8a09-765794883524
 2011-01-11 23:12:13 +00:00
mdkinney ec44f02ecc Fix 32-bit build break 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11235 6f19259b-4bc3-4df7-8a09-765794883524
 2011-01-07 00:41:08 +00:00
mdkinney f877f3006e Add DEBUG() macros for DEBUG_CACHE to MTRR Library show all changes memory caches setting changes. 
If DEBUG_PROPERTY_DEBUG_CODE_ENABLED is also set in PcdDebugPropertyMask, then the entire set of MTRRs will be displayed on every memory cache setting change.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11231 6f19259b-4bc3-4df7-8a09-765794883524
 2011-01-06 02:57:26 +00:00
xli24 a48caeebba Add boundary check against variable MTRR count. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10787 6f19259b-4bc3-4df7-8a09-765794883524
 2010-08-10 08:57:36 +00:00
xli24 430fbbe096 Code refinement. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10647 6f19259b-4bc3-4df7-8a09-765794883524
 2010-07-13 03:08:54 +00:00
hhtian 01a1c0fc9e Update the copyright notice format 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10429 6f19259b-4bc3-4df7-8a09-765794883524
 2010-04-24 12:25:26 +00:00
geekboy15a ed8dfd7bfe Fixed GCC 4.4 build issues due to EFIAPI not being used when required. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10380 6f19259b-4bc3-4df7-8a09-765794883524
 2010-04-16 23:36:53 +00:00
xli24 947a573ada Add Checking for MTRR existence. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10223 6f19259b-4bc3-4df7-8a09-765794883524
 2010-03-10 02:38:39 +00:00
xli24 5bdfa4e58a Add array index check to avoid potential buffer overflow. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10179 6f19259b-4bc3-4df7-8a09-765794883524
 2010-03-04 06:38:22 +00:00
mdkinney 58b23d903e Use atomic AsmDisableCache() and AsmDisableCache() functions instead of AsmWriteCr0() and AsmWbinvd() calls 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9998 6f19259b-4bc3-4df7-8a09-765794883524
 2010-02-14 00:44:27 +00:00
jyao1 3ba736f39c Revert incompatible change: 
1) No API change from old version.
2) Change MACRO:
#define  MTRR_NUMBER_OF_VARIABLE_MTRR  32 // the semantics are changed from NUMBER to MAX_NUMBER.
#define  FIRMWARE_VARIABLE_MTRR_NUMBER  6 // wrong and deprecated
#define  MTRR_LIB_IA32_VARIABLE_MTRR_END 0x20F // wrong and deprecated
#define  RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER  2 // add new one.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9941 6f19259b-4bc3-4df7-8a09-765794883524
 2010-02-05 22:27:07 +00:00
jyao1 3b9be4164b Original MTRR lib hardcode VARIABLE_MTRR as 8. But it is 7 in Core2 if SMRR enabled, and 10 in latest Corei7. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9935 6f19259b-4bc3-4df7-8a09-765794883524
 2010-02-05 06:33:42 +00:00
jljusten e50466da24 Add MTRR library for IA32 & X64 processor architectures. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8394 6f19259b-4bc3-4df7-8a09-765794883524
 2009-05-27 21:09:39 +00:00