Commit Graph

124 Commits

Author SHA1 Message Date
Michael Kinney 9f1fc50373 UefiCpuPkg: Add SMM CPU Service Protocol
Add definition of the SMM CPU Service Protocol that is produced by
the PiSmmCpuDxeSmm module.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18640 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-19 19:11:32 +00:00
Michael Kinney 2b63446b1d UefiCpuPkg: Add SmmCpuPlatformHookLib
Add SmmCpuPlatformHookLib that provides platform specific functions
that are used to initialize SMM and process SMIs.  A Null instance
of this library is provided that should work for most platforms.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18639 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-19 19:11:15 +00:00
Michael Kinney a9764e68f9 UefiCpuPkg: Add SmmCpuFeaturesLib
Add SmmCpuFeaturesLib that provides CPU specific functions that are
used to initialize SMM and process SMIs.  A functional implementation
of this library class is provided that is based on the
Intel(R) 64 and IA-32 Architectures Software Developer's Manual

[jeff.fan@intel.com: Fix code style issues reported by ECC]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18638 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-19 19:10:53 +00:00
Michael Kinney a39d509761 UefiCpuPkg: Add PlatformSecLib
Add PlatformSecLib class and PlatformSecLibNull instance
that is used by the SecCore.  PlatformSecLibNull should
not be used in a platform build.  Instead, it should be
used as a template for implementing a platform specific
instance of the PlatformSecLib library class.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18635 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-19 19:09:56 +00:00
Michael Kinney 28a7ddf031 UefiCpuPkg: Add Cpuid.h include files for CPUID related defines
Move CPUID related defines from LocalApic.h to Cpuid.h
Update LocalApicLib instances to include Cpuid.h
Update CpuMpPei module to include Cpuid.h

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18633 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-19 19:09:15 +00:00
Jeff Fan d32c7f6cab UefiCpuPkg: Add some CPUID definitions
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18001 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-15 03:40:12 +00:00
Jeff Fan 9c71e1e056 1. Save/restore ICR high 32bit value and check Delivery Status before sending IPI. It could be fix the interrupted issue between ICR high/low writes by SMI handler.
2. Save/restore CPU Interrupt state around sending IPI. It could avoid sending IPI be interrupted by CPU interrupt handler.
3. Add note for SetApicMode() API that must not be called from an interrupt handler or SMI handler.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com>
Reviewed-by: Mudusuru, Giri <giri.p.mudusuru@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15652 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-11 02:36:56 +00:00
Jeff Fan 6e3e4d70d4 1. Read 32bit CPU Init APIC ID from CPUID leaf B in XAPIC mode.
2. Read CPU APIC ID from CPUID leaf B in case CPU Init APIC ID is larger 255 in XAPIC mode.

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14674 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-16 08:42:59 +00:00
vanjeff a66e0c7da7 1. Added SetLocalApicBaseAdress() and GetLocalApicBaseAddress() APIs in Local APIC library.
2. Updated Local APIC library instances to get Local APIC base Address by invoking GetLocalApicBaseAddress() instead of by PCD PcdCpuLocalApicBaseAddress.

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney Michael D <michael.d.kinney@intel.com>
Reviewed-by: Rui Sun <rui.sun@intel.com>



 

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13668 6f19259b-4bc3-4df7-8a09-765794883524
2012-08-23 01:42:01 +00:00
vanjeff 91ec78241c 1. Introduce the API MtrrGetDefaultMemoryType () in Mtrr Library.
2. Invoke MtrrGetDefaultMemoryType() to get the default memory type instead of the hard code value in module.
3. Add go though for UC attributes.

Signed-off-by: vanjeff
Reviewed-by: rsun3

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12587 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-28 06:01:55 +00:00
mdkinney 5f867ad00d Add generic HPET Timer DXE Driver and support libraries
Signed-off-by: mdkinney
Reviewed-by: li-elvin

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12259 6f19259b-4bc3-4df7-8a09-765794883524
2011-09-02 02:42:19 +00:00
rsun3 23394428fd Fix build break when doing 32-bit build with some certain C compiler option combinations.
Use the library functions for shift operations in BaseLib for a 64-bit integer where the code is shared for 32-bit and 64-bit.
Defining bitfields in structures with > 32 bits will cause these types of issues on IA32 builds. So the largest bitfield should be type UINT32 with a max size of :32.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10983 6f19259b-4bc3-4df7-8a09-765794883524
2010-10-28 02:01:43 +00:00
rsun3 b1b8c631f6 Add DisableLvtInterrupts() for the Local APIC library class.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10827 6f19259b-4bc3-4df7-8a09-765794883524
2010-08-27 03:46:18 +00:00
rsun3 ae40aef1fb Improve Local APIC library class. Add new library APIs: GetApicVersion(), SendFixedIpi(), SendFixedIpiAllExcludingSelf(), GetApicTimerState(). Remove GetApicTimerDivisor (), its functionality can be covered by GetApicTimerState().
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10824 6f19259b-4bc3-4df7-8a09-765794883524
2010-08-26 05:58:42 +00:00
rsun3 bf73cc4bbc Add Local APIC Library class defining APIs for common Local APIC operations. Add two Local APIC library instances, one is for xAPIC mode only, the other is for x2APIC capable processors which have xAPIC and x2APIC modes.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10814 6f19259b-4bc3-4df7-8a09-765794883524
2010-08-23 06:34:39 +00:00
xli24 430fbbe096 Code refinement.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10647 6f19259b-4bc3-4df7-8a09-765794883524
2010-07-13 03:08:54 +00:00
hhtian 01a1c0fc9e Update the copyright notice format
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10429 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-24 12:25:26 +00:00
geekboy15a ed8dfd7bfe Fixed GCC 4.4 build issues due to EFIAPI not being used when required.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10380 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-16 23:36:53 +00:00
xli24 947a573ada Add Checking for MTRR existence.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10223 6f19259b-4bc3-4df7-8a09-765794883524
2010-03-10 02:38:39 +00:00
jyao1 3ba736f39c Revert incompatible change:
1) No API change from old version.
2) Change MACRO:
#define  MTRR_NUMBER_OF_VARIABLE_MTRR  32 // the semantics are changed from NUMBER to MAX_NUMBER.
#define  FIRMWARE_VARIABLE_MTRR_NUMBER  6 // wrong and deprecated
#define  MTRR_LIB_IA32_VARIABLE_MTRR_END 0x20F // wrong and deprecated
#define  RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER  2 // add new one.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9941 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-05 22:27:07 +00:00
jyao1 3b9be4164b Original MTRR lib hardcode VARIABLE_MTRR as 8. But it is 7 in Core2 if SMRR enabled, and 10 in latest Corei7.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9935 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-05 06:33:42 +00:00
mdkinney 759f21f1d1 Remove unused structure
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9853 6f19259b-4bc3-4df7-8a09-765794883524
2010-01-28 21:09:54 +00:00
qhuang8 989322c384 Introduce UefiCpuLib library class in UefiCpuPkg and add one instance of BaseUefiCpuLib. The major purpose of this library class / instance is to provide some routines that are generic for IA32 family CPU
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9480 6f19259b-4bc3-4df7-8a09-765794883524
2009-11-25 04:25:02 +00:00
jljusten e50466da24 Add MTRR library for IA32 & X64 processor architectures.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8394 6f19259b-4bc3-4df7-8a09-765794883524
2009-05-27 21:09:39 +00:00