Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
If CPU Bist data is not zero, we will report Status code. But there is one bug
that will report each processor's status code duplicated with NumberOfData
times. This fix is to exchange the loop order on NumberOfData and
mNumberOfProcessors. It could make sure the report status code only once for
each processor.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@Intel.com>
v5:
If PcdCpuMaxLogicalProcessorNumber is set to 1 on UP system,
MpInitLibInitialize() will be invoked. This is one bug, we need to
call MpInitLibInitialize() always and get the BSP information.
Just to remove PcdCpuMaxLogicalProcessorNumber() consuming from this
driver.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Michael Kinney <michael.d.kinney@intel.com>
Consume MP Initialize library to produce CPU MP Protocol services to simply the
code.
v4:
1. Update CpuDxe.c file header to mention it produces CPU Arch protocol.
2. Update BistData type from UINT32 to EFI_HEALTH_FLAG.
3. Move some header location from CpuMp.h to CpuDxe.h.
v3:
1. Move the code Consume MpInitLib APIs to produce CPU MP Protocol from patch
#40 to this patch.
2. Add DxeMpInitLib.inf in DSC file
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Michael Kinney <michael.d.kinney@intel.com>
SetMemoryAttributes() will sync BSP's MTRRs settings to all APs by StartupAllAPs
service in serial mode. It may caused much performance impact if there are too
much processors in system. This update is to invoke StartupAllAps in parallel
mode. IA32 SDM does suggest to program MTRRs in parallel mode.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/CpuAsm.asm to Ia32/CpuAsm.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
To convert these files I ran:
$ python3 BaseTools/Scripts/ConvertUni.py UefiCpuPkg
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19264 6f19259b-4bc3-4df7-8a09-765794883524
The CpuDxe driver may run before the gEfiMetronomeArchProtocolGuid
protocol is installed. gBS->Stall does not work until this arch
protocol is installed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18914 6f19259b-4bc3-4df7-8a09-765794883524
The PiSmmCpuDxeSmm module makes some assumptions about GDT selectors
that are based on the GDT layout from the DxeIplPeim. For example,
the protected mode entry code and (where appropriate) the long mode
entry code in the UefiCpuPkg/PiSmmCpuDxeSmm/*/MpFuncs.* assembly
files, which are used during S3 resume, open-code segment selector
values that depend on DxeIplPeim's GDT layout.
This updates the CpuDxe module to use the same GDT layout as the
DxeIplPeim. This enables modules that are dispatched after
CpuDxe to find, and potentially save and restore, a GDT layout that
matches that of DxeIplPeim. The DxeIplPeim has a 2 GDT entries for
data selectors that are identical. These are LINEAR_SEL (GDT Offset
0x08)and LINEAR_DATA64_SEL (GDT offset 0x30). LINEAL_SEL is used for
for IA32 DXE and the LINEAR_DATA64_SEL is used for X64 DXE. This
duplicate data selector was added to the CpuDxe module to keep the
GDT and all selectors consistent.
Using a consistent GDT also improves debug experience.
Reported-by: Laszlo Ersek <lersek@redhat.com>
Analyzed-by: Laszlo Ersek <lersek@redhat.com>
Link: http://article.gmane.org/gmane.comp.bios.edk2.devel/3568
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18710 6f19259b-4bc3-4df7-8a09-765794883524
The Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuArchDxe
driver applies any MTRR changes to APs, if the
EFI_MP_SERVICES_PROTOCOL is available. We should do the same.
Additionally, the broadcast should occur at MP startup as well,
not only when MTRR settings are changed. The inspiration is
taken from
Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuMpDxe/
(see the EarlyMpInit() function and its call sites in
"ProcessorConfig.c").
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18632 6f19259b-4bc3-4df7-8a09-765794883524
Address a race condition in first call to StartupAllAPs() with
SingleThread set to TRUE in the MP initialization. If the APs
have not entered their idle loop before StartupAllAPs() is called,
then some of the APs will be in an unexpected state, and
StartupAllAPs() will hang. This is the hang condition that is
only seen when SingleThread parameter is set to TRUE and
StartupAllAPs() is called very shortly after mAPsAlreadyInitFinished
is set to TRUE that releases the APs to complete their initialization.
An internal function has been added to check if all APs are in the
sleeping state in their idle loop. On the first call to
StartupAllAPs(), this internal function is used in a loop to make
sure the APs are in a state that is compatible with the use of
StartupAllAPs(). PcdCpuApInitTimeOutInMicroSeconds is used as the
maximum wait time for the APs to enter their idle loop. If all
APs have not entered their idle loop within the timeout, then
an ASSERT() is generated.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18631 6f19259b-4bc3-4df7-8a09-765794883524
Use PcdCpuApInitTimeOutInMicroSeconds instead of hardcoded 100ms for
the time to wait for all APs to respond to first INIT SIPI SIPI
wake request.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18630 6f19259b-4bc3-4df7-8a09-765794883524
Only perform AP detection if PcdCpuMaxLogicalProcessorNumber > 1
Only free AP related structures of they were allocated
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18629 6f19259b-4bc3-4df7-8a09-765794883524
when stack NX has been enabled for BSP.
DxeIpl may have enabled Execute Disable for BSP,
APs need to get the status and sync up the settings,
otherwise EFI_MP_SERVICES_PROTOCOL->StartupAllAPs
may not work.
Got positive comments and test result from Laszlo
for the early draft patch, thanks.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18191 6f19259b-4bc3-4df7-8a09-765794883524
Should check NumberOfData value instead of treat its value as one BOOLEAN type.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Shuming Qiu <shuming.qiu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17672 6f19259b-4bc3-4df7-8a09-765794883524
Get CPU BIST information from gEfiSecPlatformInformation2PpiGuid or
gEfiSecPlatformInformationPpiGuid Guided HOB and update the CPU healthy status
for CPU MP Service.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17641 6f19259b-4bc3-4df7-8a09-765794883524
The DDK3790 tool chain fails when the PAUSE instruction is assembled:
error A2085: instruction or register not accepted in current CPU mode The solution is to use the .686 directive along with the .xmm directive.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17134 6f19259b-4bc3-4df7-8a09-765794883524
For avoid the compiler optimizing the code, we let Parameter and Procedure in CpuData volatile.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17024 6f19259b-4bc3-4df7-8a09-765794883524
Add a new sleeping state for APs, when no procedure execution, put AP to sleep. when need to execute
procedure, only need to wake up this AP by sent SIPI.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17023 6f19259b-4bc3-4df7-8a09-765794883524
when gBS->ExitBootServices() is called, the APs should avoid to access
the unsafed buff datas which were allocated by boot services.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16397 6f19259b-4bc3-4df7-8a09-765794883524
This sequence should happen:
* CpuMp.c: Allocate a stack for the APs
* ApStartup.c: Send Start IPI to wake APs in 16-bit real mode
* MpAsm.S: AP enters CpuDxe driver code without stack
- AP grabs a lock
- AP sets up stack
- AP calls CpuMp.c:ApEntryPointInC
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16370 6f19259b-4bc3-4df7-8a09-765794883524
If timeout expires before AP returns from Procedure, the AP should
be terminated, we introduce ResetApStackLess() to send init IPI
to let AP exit Procedurce and re-available.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16366 6f19259b-4bc3-4df7-8a09-765794883524
Due to the implementation of AcquireSpinLock() is not MP safe,
so we should use AcquireSpinLockOrFail directly instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16357 6f19259b-4bc3-4df7-8a09-765794883524
All APs use the same common stack to initialization. after
initialization, APs should switch to the stack of its own.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16351 6f19259b-4bc3-4df7-8a09-765794883524
introduce PCD value: PcdCpuMaxLogicalProcessorNumber and PcdCpuApStackSize,
used for initialize APs stacks.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16350 6f19259b-4bc3-4df7-8a09-765794883524
This routine starts the APs and directs them to run the specified
code.
The specified code is entered without a stack being available.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16349 6f19259b-4bc3-4df7-8a09-765794883524
We'll want to use the structures for AP startup.
Note: It seems previously we were not using '#pragma pack ()' in
CpuGdt.c.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16348 6f19259b-4bc3-4df7-8a09-765794883524
The AP startup code simply jumps into this code with the CpuDxe driver
without setting up a stack for the processor.
Therefore, this code must setup the stack before calling into C code.
This is the basic flow:
* AP enters CpuDxe driver code (AsmApEntryPoint) without stack
- AP grabs a lock
- AP sets up stack
- AP calls CpuMp.c:ApEntryPointInC
- If ApEntryPointInC returns, the lock is freed, and another AP may
run
- The AP C code may call AsmApDoneWithCommonStack to indicate that
the AP is no longer using the stack, and another may therefore
proceed to use the stack and then call ApEntryPointInC
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16347 6f19259b-4bc3-4df7-8a09-765794883524
This is the function the AP assembly code will expect to call after
getting a lock and setting up the stack.
Only one AP will enter this routine at a time.
If ApEntryPointInC exits, then the assembly code will loop around to
grab the lock, setup the stack, and call ApEntryPointInC again.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16346 6f19259b-4bc3-4df7-8a09-765794883524
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16345 6f19259b-4bc3-4df7-8a09-765794883524
Module UNI and Package UNI files are not DOS format. Convert them to DOS format.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16047 6f19259b-4bc3-4df7-8a09-765794883524
2. Add MODULE_UNI_FILE file that contains the localized Abstract and Description of a module.
a. Addresses an information gap between INF files and the UEFI Distribution Packaging Specification XML schema
b. There will be an associated update to UPT in BaseTools to consume MODULE_UNI_FILE and associated UNI file during UDP creation that performs the INF -> XML conversion.
c. There will be an associated update to UPT in BaseTools to produce MODULE_UNI_FILE and associated UNI file during UDP installation that performs the XML -> INF conversion.
3. Add Module Extra UNI file that provides the localized Name of a module.
a. [UserExtensions.TianoCore."ExtraFiles"] provides an easy method for a module to specify extra files not listed in [Sources] or [Binaries] sections to be added to a UDP without having to list the files in the UPT package information data file.
b. There will be an associated update to UPT in BaseTools to package up files listed in [UserExtensions.TianoCore."ExtraFiles"] during UDP creation.
c. UNI file contains localized name of a module to go along with the localized Abstract and Description from the MODULE_UNI_FILE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15934 6f19259b-4bc3-4df7-8a09-765794883524
1. Usage information in INF file comment blocks are either incomplete or incorrect.
This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes.
The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15933 6f19259b-4bc3-4df7-8a09-765794883524
2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions.
3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
For a platform tip with 32-bit PEI+64-bit DXE, InitializeFloatingPointUnits () should be called for BSP in the DXE phase.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13511 6f19259b-4bc3-4df7-8a09-765794883524
This patch enables interrupt delivery via the Local APIC as part of the initialization process.
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
Reviewed-by: Rosenbaum, Lee G <lee.g.rosenbaum@intel.com>
Reviewed-by: Sun Rui <rui.sun@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13338 6f19259b-4bc3-4df7-8a09-765794883524
2. Invoke MtrrGetDefaultMemoryType() to get the default memory type instead of the hard code value in module.
3. Add go though for UC attributes.
Signed-off-by: vanjeff
Reviewed-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12587 6f19259b-4bc3-4df7-8a09-765794883524
When the MdeModulePkg gCoreEventIdleGuid event is signaled,
CpuSleep is called. This will cause the CPU to sleep until
the next interrupt occurs.
Signed-off-by: jljusten
Reviewed-by: mdkinney
Reviewed-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11842 6f19259b-4bc3-4df7-8a09-765794883524
If Attributes specifies a combination of memory attributes that cannot be set together, then EFI_INVALID_PARAMETER is returned. For example, if both EFI_MEMORY_UC and EFI_MEMORY_WT are set.
Signed-off-by: rsun3
Reviewed-by: jyao1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11694 6f19259b-4bc3-4df7-8a09-765794883524
If DEBUG_PROPERTY_DEBUG_CODE_ENABLED is also set in PcdDebugPropertyMask, then the entire set of MTRRs will be displayed on every memory cache setting change.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11231 6f19259b-4bc3-4df7-8a09-765794883524
The change in r10765 introduced an issue where inherited interrupt
handlers would override the driver's RegisterInterruptHandler
functionality.
DUET installs a IDT with 256 entries early in it's boot. Therefore,
no interrupt handlers could be installed with DUET while using
UefiCpuPkg/CpuDxe (instead of DuetPkg/CpuDxe).
This change forces the IDT to be modified when RegisterInterruptHandler
is called to ensure the UEFI handler will be installed properly.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10972 6f19259b-4bc3-4df7-8a09-765794883524
Dandan Bi
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