The value of EBX must be preserved to follow IA32 cdecl calling convention in the assembly
implementation of AsmFlushCacheLine(). The CPUID instruction modifies the EBX register.
The EBX register value is saved onto the stack before CPUID and restored from the stack
after CPUID.
The update to the inline assembly implementation of AsmFlushCacheLine() changed the location of the
LinearAddress parameter value on the stack. The hardcoded lookup using [esp + 4] is not correct.
Use the parameter name LinearAddress instead of the hard coded [esp + 4] stack location to prevent
this issue from occurring again if there are changes to the inline assembly in the future.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17279 6f19259b-4bc3-4df7-8a09-765794883524
Remove use of CMOVx instruction from IA32 assembly files in BaseLib.
This matches compiler flags for all supported C compilers.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17213 6f19259b-4bc3-4df7-8a09-765794883524
Use CPUID Leaf 01 to detect support for CLFLUSH instruction.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17212 6f19259b-4bc3-4df7-8a09-765794883524
Without this change, NASM 2.09.04 will hang with OVMF+CSM on both IA32
and X64.
Tested on OVMF+CSM on GCC49 with NASM 2.07, 2.09.04 and 2.11.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16058 6f19259b-4bc3-4df7-8a09-765794883524
Previously we were setting it to the start of the GDT in the UEFI
driver's copy of BaseLib. This address is irrelavent, since the C code
will initialize it to the cooresponding address after the Thunk16 code
has been placed in low memory.
Additionally, initializing this was causing a link error for the
XCLANG toolchain.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16025 6f19259b-4bc3-4df7-8a09-765794883524
Convert remaining 'DB' code to assembly code by:
* Move instruction immediate data labels to end of instruction
* Use strict keyword to make sure immediate data size is not optimized
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16024 6f19259b-4bc3-4df7-8a09-765794883524
By using 'bits 16', we can write code for 16-bit use the actual
assembly syntax rather than 'DB' and sometimes writing code with
seemingly incorrect operands because we know it will run correctly
when the processor is running in 16-bit mode.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16023 6f19259b-4bc3-4df7-8a09-765794883524
http://www.nasm.us/doc/nasmdoc3.html#section-3.9
A local label is a label beginning with the period, and it's actual
name is prefixed by the previous non-local label.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16022 6f19259b-4bc3-4df7-8a09-765794883524
This is a translation of Ia32/Thunk16.asm to NASM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16020 6f19259b-4bc3-4df7-8a09-765794883524
Fixed issues with X64 clang, and also make StackSwitch push a zero on the new stack to prevent a stack unwind into memory that is no longer valid.
signed-off-by: andrewfish
reviewed-by: lgao4
reviewed-by: mdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12007 6f19259b-4bc3-4df7-8a09-765794883524
In r11047 Ia32/Thunk.S was modified. However, the current
implemention of Ia32/Thunk.S has contant values in the code
which must be updated if the code is changed.
This change updates those constants for the r11047 change.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11121 6f19259b-4bc3-4df7-8a09-765794883524
Move stack alignment check from CPU specific files into common SwitchStack() function and add VA_END() to SwitchStack().
Fix incorrect syntax for ASM_FUNCTION_REMOVE_IF_UNREFERENCED
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9193 6f19259b-4bc3-4df7-8a09-765794883524
Michael Kinney
Jordan Justen
Gao, Liming
David Woodhouse
niruiyu
li-elvin
lgao4
hhtian
andrewfish
jljusten
sfu5
myronporter
geekboy15a
qhuang8
klu2
eric_tian
mdkinney
xli24
gikidy