Removing rules for Ipf sources file:
* Remove the source file which path with "ipf" and also listed in
[Sources.IPF] section of INF file.
* Remove the source file which listed in [Components.IPF] section
of DSC file and not listed in any other [Components] section.
* Remove the embedded Ipf code for MDE_CPU_IPF.
Removing rules for Inf file:
* Remove IPF from VALID_ARCHITECTURES comments.
* Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section.
* Remove the INF which only listed in [Components.IPF] section in DSC.
* Remove statements from [BuildOptions] that provide IPF specific flags.
* Remove any IPF sepcific sections.
Removing rules for Dec file:
* Remove [Includes.IPF] section from Dec.
Removing rules for Dsc file:
* Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC.
* Remove any IPF specific sections.
* Remove statements from [BuildOptions] that provide IPF specific flags.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Bruce Cran reported the following issue:
With iasl version 20150410-64 building OvmfX64 (using OvmfPkg/build.sh
-a X64 -t GCC49 -b RELEASE) results in a couple of warnings about
methods that should be serialized:
.../OvmfPkg/AcpiTables/AcpiTables/OUTPUT/./Dsdt.iiii
95: Method (_CRS, 0) {
Remark 2120 - Control Method should be made Serialized ^ (due to
creation of named objects within)
.../OvmfPkg/AcpiTables/AcpiTables/OUTPUT/./Dsdt.iiii
235: Method (PCRS, 1, NotSerialized) {
Remark 2120 - Control Method should be made Serialized ^ (due to
creation of named objects within)
The ACPI 6.0 spec justifies the above warnings in "19.6.82 Method (Declare
Control Method)":
[...] The serialize rule can be used to prevent reentering of a method.
This is especially useful if the method creates namespace objects.
Without the serialize rule, the reentering of a method will fail when it
attempts to create the same namespace object. [...]
Cc: Bruce Cran <bruce@cran.org.uk>
Reported-by: Bruce Cran <bruce@cran.org.uk>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18392 6f19259b-4bc3-4df7-8a09-765794883524
The value to be written corresponds to hard reset, which is what the ACPI
spec prescribes.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14156 6f19259b-4bc3-4df7-8a09-765794883524
This conversion cannot be split very well into smaller patches. Comparing
version 1 and version 2 (modulo the header fields):
> --- EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE
> +++ EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE
> @@ -1,14 +1,14 @@
> EFI_ACPI_DESCRIPTION_HEADER Header;
> UINT32 FirmwareCtrl;
> UINT32 Dsdt;
> - UINT8 IntModel;
> - UINT8 Reserved1;
> + UINT8 Reserved0;
> + UINT8 PreferredPmProfile;
The INT_MODEL field was present in ACPI 1.0, but eliminated in 2.0.
According to the spec, "platforms should set this field to zero but field
values of one are also allowed to maintain compatibility with ACPI 1.0".
We're setting it to zero.
About Preferred_PM_Profile (taking the place of an 1.0 reserved field),
the specification says:
This field is set by the OEM to convey the preferred power management
profile to OSPM. OSPM can use this field to set default power management
policy parameters during OS installation.
>From <MdePkg/Include/IndustryStandard/Acpi20.h>:
#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0
#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1
#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2
#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3
#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4
#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5
#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6
For a virtual machine, "unspecified" is the best choice.
> UINT16 SciInt;
> UINT32 SmiCmd;
> UINT8 AcpiEnable;
> UINT8 AcpiDisable;
> UINT8 S4BiosReq;
> - UINT8 Reserved2;
> + UINT8 PstateCnt;
We've been already treating this field as PSTATE_CNT. No change in value.
> UINT32 Pm1aEvtBlk;
> UINT32 Pm1bEvtBlk;
> UINT32 Pm1aCntBlk;
> @@ -20,11 +20,11 @@
> UINT8 Pm1EvtLen;
> UINT8 Pm1CntLen;
> UINT8 Pm2CntLen;
> - UINT8 PmTmLen;
> + UINT8 PmTmrLen;
(Field renaming artifact.)
> UINT8 Gpe0BlkLen;
> UINT8 Gpe1BlkLen;
> UINT8 Gpe1Base;
> - UINT8 Reserved3;
> + UINT8 CstCnt;
We've been already treating this field as CST_CNT. No change in value.
> UINT16 PLvl2Lat;
> UINT16 PLvl3Lat;
> UINT16 FlushSize;
> @@ -34,7 +34,19 @@
> UINT8 DayAlrm;
> UINT8 MonAlrm;
> UINT8 Century;
> - UINT8 Reserved4;
> - UINT8 Reserved5;
> - UINT8 Reserved6;
> + UINT16 IaPcBootArch;
> + UINT8 Reserved1;
The first two octets are now merged into a 16-bit short; otherwise we've
been treating those as boot architecture flags already (see SVN rev
13615). No change in value.
> UINT32 Flags;
The fixed feature flags are not modified, only the macro names (expanding
to identical values) are updated to ACPI 2.0.
The following fields are all new in ACPI 2.0:
> + EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
> + UINT8 ResetValue;
We don't claim support for the reset register yet.
> + UINT8 Reserved2[3];
> + UINT64 XFirmwareCtrl;
> + UINT64 XDsdt;
The 64-bit physical addresses for the FACS and the DSDT are automatically
filled at installation time, see AddTableToList() and DeleteTable() in
"MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c".
> + EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
> + EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
> + EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
> + EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
> + EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
> + EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
> + EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
> + EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
We specify the extended addresses for the required and supported PM1a
Event & Control, PM Timer, and GPE0 Register Blocks, and zero the rest, in
accordance with the ACPI 1.0 fields.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14155 6f19259b-4bc3-4df7-8a09-765794883524
In the next patch we're going to specify Extended Addresses of register
blocks in Generic Address Structure format. The GAS is easy to fill if we
want to posit either "unsupported" (all zero) or a given address in a
specific address space. However deriving "unsupported" just from a macro
expanding to zero is unwieldy, so let's avoid the need.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14154 6f19259b-4bc3-4df7-8a09-765794883524
Soon we're going to specify Extended Addresses of register blocks in
Generic Address Structure format. The GAS is easy to fill if we want to
posit either "unsupported" (all zero) or a given address in a specific
address space. However deriving "unsupported" just from a macro expanding
to zero is unwieldy, so let's avoid the need.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14153 6f19259b-4bc3-4df7-8a09-765794883524
Soon we're going to specify Extended Addresses of register blocks in
Generic Address Structure format. The GAS is easy to fill if we want to
posit either "unsupported" (all zero) or a given address in a specific
address space. However deriving "unsupported" just from a macro expanding
to zero is unwieldy, so let's avoid the need.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14152 6f19259b-4bc3-4df7-8a09-765794883524
We cannot specify a pin-GSI connection for the SCI directly in the _PRT
because that implies ActiveLow polarity, clashing with both qemu and the
MADT we prepare.
With this patch the RHEL-6 guest logs the following:
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Link [LNKS] (IRQs *9)
ACPI: PCI Interrupt Link [LNKA] (IRQs 5 10 *11)
ACPI: PCI Interrupt Link [LNKB] (IRQs 5 10 *11)
ACPI: PCI Interrupt Link [LNKC] (IRQs 5 *10 11)
ACPI: PCI Interrupt Link [LNKD] (IRQs 5 *10 11)
The patch amends svn rev 13625. Testing it in a RHEL-6 guest, the problems
described in
<http://sourceforge.net/mailarchive/message.php?msg_id=29660862> do not
reappear.
The code is derived from Paolo Bonzini's patch (originally appearing as
SeaBIOS commit f64a472a, "acpi: reintroduce LNKS"). Said original patch is
copyrighted by Red Hat (our common employer), and it has been relicensed
<http://sourceforge.net/mailarchive/message.php?msg_id=30393854> to form
the basis of this derived patch for edk2. The latter is therefore
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14111 6f19259b-4bc3-4df7-8a09-765794883524
Move these states from the DSDT to the SSDT. Override the default
configuration if the host has the following qemu commit:
commit 459ae5ea5ad682c2b3220beb244d4102c1a4e332
Author: Gleb Natapov <gleb@redhat.com>
Date: Mon Jun 4 14:31:55 2012 +0300
Add PIIX4 properties to control PM system states.
This patch adds two things. First it allows QEMU to distinguish
between regular powerdown and S4 powerdown. Later separate QMP
notification will be added for S4 powerdown. Second it allows
S3/S4 states to be disabled from QEMU command line. Some guests
known to be broken with regards to power management, but allow to
use it anyway. Using new properties management will be able to
disable S3/S4 for such guests.
Supported system state are passed to a firmware using new fw_cfg
file. The file contains 6 byte array. Each byte represents one
system state. If byte at offset X has its MSB set it means that
system state X is supported and to enter it guest should use the
value from lowest 3 bits.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14003 6f19259b-4bc3-4df7-8a09-765794883524
The ACPI 5.0 specification says:
7.3.4.4 System \_S3 State
[...]
* Dynamic RAM context is maintained.
[...]
This corresponds to the following in the PIIX4 spec:
PMCNTRL -- POWER MANAGEMENT CONTROL REGISTER (IO)
[...]
Bits[12:10] Suspend Type
[...]
001 STR (Suspend To RAM)
Also, this (ie. decimal 1) is the suspend type value that qemu recognizes
as an S3 (suspend to ram) request.
Only the value for PM1a_CNT.SLP_TYP is set (PM1b_CNT.SLP_TYP is left at
zero), since in OVMF we don't report the optional PM1b_EVT_BLK register
block to OSPM. (PM1b_EVT_BLK is defined as 0 in "Platform.h"; see "4.8.1.1
PM1 Event Registers" in the ACPI 5.0 specification.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14002 6f19259b-4bc3-4df7-8a09-765794883524
The ACPI 5.0 specification says:
7.3.4.5 System \_S4 State
[...]
* DRAM context is not maintained.
[...]
This corresponds to the following in the PIIX4 spec:
PMCNTRL -- POWER MANAGEMENT CONTROL REGISTER (IO)
[...]
Bits[12:10] Suspend Type
[...]
010 POSCL (Powered On Suspend, Context Lost)
Also, this (ie. decimal 2) is the default suspend type value that qemu
recognizes as an S4 (suspend to disk) request.
Only the value for PM1a_CNT.SLP_TYP is corrected (PM1b_CNT.SLP_TYP is left
at zero), since in OVMF we don't report the optional PM1b_EVT_BLK register
block to OSPM. (PM1b_EVT_BLK is defined as 0 in "Platform.h"; see "4.8.1.1
PM1 Event Registers" in the ACPI 5.0 specification.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14001 6f19259b-4bc3-4df7-8a09-765794883524
Represent the set of possible PCI link target IRQs with
Pcd8259LegacyModeEdgeLevel. This ensures that the 8259 Interrupt
Controller code in PcAtChipsetPkg will treat them as level-triggered too.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13628 6f19259b-4bc3-4df7-8a09-765794883524
Rotate links over devices and pins so that they match qemu.
PIIX4 function 3 (Power Management Module) unconditionally uses the INTA
interrupt pin. SCI from this module requires IRQ9.
Keep other assignments off IRQ9. Only IRQ5, IRQ10, IRQ11 remain for PCI
devices.
Bump OEMRevision in the DSDT.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13625 6f19259b-4bc3-4df7-8a09-765794883524
Kill PDIS and PSRS as they are writing to copies of PIR[A-D], not PIR[A-D]
themselves. Use specialized _DIS and _SRS methods that access PIR[A-D]
directly.
(This should be solvable by passing RefOf (PIRA) etc to PDIS/PSRS, however
the RHEL-6.3 kernel AML parser seems to choke on it. The rules described
in ACPIspec5.0 Table 19-316 "Object Storing and Copying Rules" don't seem
to work:
ACPI Error: Needed [Integer/String/Buffer], found [Reference]
ffff88003ee02420 (20090903/exresop-422)
ACPI Exception: AE_AML_OPERAND_TYPE, While resolving operands for
[OpcodeName unavailable] (20090903/dswexec-445)
ACPI Error (psparse-0537): Method parse/execution failed
[\_SB_.PCI0.LPC_.PDIS] (Node ffff88003f638b50), AE_AML_OPERAND_TYPE
ACPI Error (psparse-0537): Method parse/execution failed
[\_SB_.PCI0.LPC_.LNKA._DIS] (Node ffff88003f638a10),
AE_AML_OPERAND_TYPE
When changing the method too, so that it writes to DerefOf (Arg0) instead
of Arg0, ie. explicitly dereferencing rather than expecting the auto-deref
to work:
ACPI Error: Needed type [Reference], found [RegionField]
ffff88003f639858 (20090903/exresop-104)
ACPI Exception: AE_AML_OPERAND_TYPE, While resolving operands for
[OpcodeName unavailable] (20090903/dswexec-445)
ACPI Error (psparse-0537): Method parse/execution failed
[\_SB_.PCI0.LPC_.PDIS] (Node ffff88003f638b50), AE_AML_OPERAND_TYPE
ACPI Error (psparse-0537): Method parse/execution failed
[\_SB_.PCI0.LPC_.LNKA._DIS] (Node ffff88003f638a10),
AE_AML_OPERAND_TYPE
In short, when passing a RefOf, it is recognized as a reference inside the
method but mistakenly refused. When trying to deref it explicitly with
DerefOf, then it's suddenly not recognized as a reference.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13621 6f19259b-4bc3-4df7-8a09-765794883524
"RTC day of the month alarm feature is not supported".
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13614 6f19259b-4bc3-4df7-8a09-765794883524
- Qemu's PIIX emulation actually supports SMM and ACPI_ENABLE /
ACPI_DISABLE.
- After enabling SMI_CMD (SMI_CMD_IO_PORT), further values to be written
there must be synchronized with qemu: PSTATE_CNT, CST_CNT.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13611 6f19259b-4bc3-4df7-8a09-765794883524
"FWDT" ("firmware data") is allocated as EfiReservedMemoryType, with
AllocateReservedPool(). <MdePkg/Include/Library/MemoryAllocationLib.h>
doesn't seem to provide direct access to EfiACPIReclaimMemory, but at this
point the former seems sufficient.
Based on SeaBIOS commit 2062f2ba by Gerd Hoffmann <kraxel@redhat.com>.
v3:
- coding style fixes:
- BDAT -> FWDT
- __packed -> #pragma pack(1)
- BFLD -> FIRMWARE_DATA, PCI_WINDOW
- Bfld -> FwData
- Ssdt.asl: changed license to 2-clause BSDL, paraphrasing Dsdt.asl
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13573 6f19259b-4bc3-4df7-8a09-765794883524
0xb000 is the address normally used with QEMU.
0x400 also appears to conflict with some debug I/O ports
used by QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Bei Guan <gbtju85@gmail.com>
Reviewed-by: Bei Guan <gbtju85@gmail.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13279 6f19259b-4bc3-4df7-8a09-765794883524
OVMF does not support SMM. Previously the port value
was set to 0. This should be enough to disable the
SMM ACPI Enable/Disable code paths, but to be
consistent we'll set these fields to 0 as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Bei Guan <gbtju85@gmail.com>
Reviewed-by: Bei Guan <gbtju85@gmail.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13277 6f19259b-4bc3-4df7-8a09-765794883524
QEMU hard codes the GPE0 registers at 0xafe0.
Previously the code assumed that the GPE0 block
would move when the PM Base Address of the PIIX4
PCI device was programmed. It appears QEMU does not
emulate this behaviour of the PIIX4 PCI device.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Bei Guan <gbtju85@gmail.com>
Reviewed-by: Bei Guan <gbtju85@gmail.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13276 6f19259b-4bc3-4df7-8a09-765794883524
chenc2
Liming Gao
Laszlo Ersek
jljusten
lzeng14
hhtian
klu2
lgao4
vanjeff