When cspell is installed (via `npm install cspell`), CI checks for
spelling mistakes. There are currently a very large number of them: some
are genuine mistakes while others are words or acryonyms that cspell
doesn't know.
Fix a few of the misspellings in MdePkg.
Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Add definitions, macros and types for elements associated with MPAM
ACPI 2.0 specification.
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Cc: James Morse <james.Morse@arm.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Thomas Abraham <thomas.abraham@arm.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
A ArmReadIdAA64Isar0Reg() function was recently added
to BaseLib. Use it instead of its ArmReadIdIsar0() equivalent,
which was private to the BaseRngLib library.
This also allows to avoid the confusion between the following
registers:
- ID_ISAR0_EL1: allows to probe for Divide instructions, Debug
instructions, ...
- ID_AA64ISAR0_EL1: AARCH64 specific register allowing to probe
for AESE, RNDR, ... instructions
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
To enable AARCH64 native instruction support for Openssl,
some interfaces must be implemented. OPENSSL_cpuid_setup()
allows to probe the supported features of the platform.
Add ArmReadIdAA64Isar0Reg() to read the AA64Isar0, containing
Arm64 instruction capabilities.
A similar ArmReadIdAA64Isar0() function is available in the ArmPkg,
but the CryptoPkg where OPENSSL_cpuid_setup will reside cannot rely
on the ArmPkg.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
To enable AARCH64 native instruction support for Openssl,
some interfaces must be implemented. OPENSSL_rdtsc() requests
an access to a counter to get some non-trusted entropy.
Add ArmReadCntPctReg() to read system count.
A similar ArmReadCntPct() function is available in the ArmPkg,
but the CryptoPkg where OPENSSL_rdtsc will reside cannot rely
on the ArmPkg.
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
PCI Express 6.0 Specification introduces new registers and modifies
fields in existing ones.
This commit syncs PciE headers with the spec update.
Cc: Sergiy Yakovlev <sergiyy@ami.com>
Cc: Felix Polyudov <felixp@ami.com>
Cc: Dhanaraj V <vdhanaraj@ami.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
Commit c5ef1f0 added Acpi65.h by copying and updating text from
Acpi64.h. In that process, `0x624B` was updated to `0x6.5B` likely
due to a find/replace regex being used.
This restores the value.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
This modification come from ACPI 6.5 spec.
Besides, Starting with revision 2 of HEST, the Error Source Structures
must be sorted in Type ascending order for Error Source Structure
Types of less than 12.
Signed-off-by: Herman Li <herman.li@intel.com>
Per TCBZ2372, clang on Linux emits a warning if an enum-typed variable
is compared with a constant outside of the range of the enum. Such
comparisons are performed in multiple locations in DXE core on
variables of type EFI_MEMORY_TYPE. This patch moves the OEM and OS
reserved types into the EFI_MEMORY_TYPE enum itself to resolve this
issue and improve readability. This commit does this for the MdePkg
copy of this enum.
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4812
When the Select is out of support, use method break exception
instead of method return -1, avoid unknown errors caused by untimely
detection.
Cc: Chao Li <lichao@loongson.cn>
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4563
As per Smbios 3.7.0 spec, added CXL 3.0 support in Type 9,
also added PMIC & RCD manufacturer ID and Revision information in Type17.
Cc: Sainadh N <sainadhn@ami.com>
Cc: Sundaresan S <sundaresans@ami.com>
Cc: Srinivasan M <srinivasanm@ami.com>
Cc: Ramesh R <rameshr@ami.com>
Signed-off-by: Shenbagadevi R <shenbagadevir@ami.com>
Reviewed-by: Gaoliming <gaoliming@byosoft.com.cn>
As the SMBIOS table types belong to the SMBIOS standard,
they were moved from the SMBIOS IndustryStandard into the
SMBIOS Protocol header with the EFI_-prefix.
Filling in definitions facilitates consistent use of header files:
EFI_SMBIOS_TYPE_TPM_DEVICE
EFI_SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION
EFI_SMBIOS_TYPE_FIRMWARE_INVENTORY_INFORMATION
EFI_SMBIOS_TYPE_STRING_PROPERTY_INFORMATION
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Chao Li <lichao@loongson.cn>
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3083
Since this is a library, make the function ExitBootServicesCallback()
STATIC to prevent the likelihood that it collides with other symbols.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
The ratified RISC-V crypto scalar extensions provide entropy bits via the
seed CSR, as exposed by the Zkr extension. The Zkr extension is ratified
and provides 16 bits of entropy seed when reading the SEED CSR.
Guarded by a RISCV64 Feature PCD, 64-bit random numbers can be
accumulated from the `seed` CSR. This driver is based on the driver in
the Linux kernel.
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
Co-authored-by: Tim Wawrzynczak <tim@rivosinc.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352
Adding additional GUIDs for the EFI_CONFORMANCE_PROFILE_TABLE
that are defined in the Embedded Base Boot Requirments (EBBR)
Specification.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Sam Kaynor <Sam.Kaynor@arm.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352
Adding support for EFI_CONFORMANCE_PROFILE_TABLE by adding an
associated header file and relevant GUIDs to MdePkg.dec as defined
in the UEFI 2.10 spec.
This table is needed to address changes being made within ShellPkg.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Sam Kaynor <Sam.Kaynor@arm.com>
For TDCALL leaf TDG.VP.INFO, the bit 31:0 in R8 returns NUM_VCPUS and
bit 63:32 in R8 returns MAX_VCPUS. Current struct
TDCALL_INFO_RETURN_DATA defines them in wrong order.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
PcdConfidentialComputingGuestAttr so far only contained an SEV mode bit
but there are more other features which do not translate to levels
such as DebugVirtualization or SecureTsc.
Add the feature mask and the DebugVirtualization feature bit to the PCD.
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
---
Changes:
v4:
* s/CCAttrFeatureAmdSevDebugSwap/CCAttrFeatureAmdSevEsDebugVirtualization/
v2:
* expanded features mask
* added type mask
For now we need DebugSwap but others are likely to be needed too.
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
Changes:
v5:
* "rb" from Tom
v4:
* added more from April/2024 APM
Most of the definitions in this file are currently well documented.
This adds documentation for a few missing fields in the NVMe
Controller Capabilities structure.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
The TCG_Sp800_155_PlatformId_Event2 and 3 structures both list the
platform model string twice, which is incorrect according to the
TCG PC Client Platform Firmware Profile.
Also add constant definitions for the locator types added in the
December 2023 revision.
Signed-off-by: Dionna Glaze <dionnaglaze@google.com>
Cpucfg fetch is a 32-bit register, and AsmCpucfg's function
declaration is a 32-bit address storage operation in BaseLib.h,
So, fix it by replacing stptr.d with stptr.w instrcution.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4797
Cc: Chao Li <lichao@loongson.cn>
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
Co-authored-by: Chao Li <lichao@loongson.cn>
When building AArch64 code, cpp gets run with the `-undef` flag which on
Fedora 40 with gcc version 14.1.1 20240607 (Red Hat 14.1.1-5) causes
__has_builtin to be undefined. When running the check for
__builtin_unreachable in Base.h it causes an error
"missing binary operator before token "("".
Check that we have __has_builtin before trying to use it.
Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Drop obsolete library declarations that are no longer (and should not
be) implemented in EDK2 or UEFI, given that they are specific to the
secure world.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Update AMD sepcification references (code comments) as part of a refactor of
MSR definitions and SEV-SNP related defines, which aims to remove
family-specific references (filename) as these defines are common to all
modern EPYC Processors.
Signed-off-by: Paul Grimes <paul.grimes@amd.com>
Update the Msr.h eader guard to comply with latest edk2 coding guidelines. This
change is part of a refactor of MSR definitions and SEV-SNP related defines,
which aims to remove family-specific references (filename) as these defines are
common to all modern EPYC Processors.
Signed-off-by: Paul Grimes <paul.grimes@amd.com>
Delete Fam17Msr.h as part of a refactor of MSR definitions and SEV-SNP related
defines, which aims to remove family-specific references (filename) as these
defines are common to all modern EPYC Processors.
Signed-off-by: Paul Grimes <paul.grimes@amd.com>
Update reference to SevSnpMsr.h as part of a refactor of MSR definitions and
SEV-SNP related defines. Remove family-specific references (filename) as these
defines are common to all modern EPYC Processors.
Signed-off-by: Paul Grimes <paul.grimes@amd.com>
Add SevSnpMsr.h as part of a refactor of MSR definitions and SEV-SNP related
defines, which aims to remove family-specific references (filename) as these
defines are common to all modern EPYC Processors.
Signed-off-by: Paul Grimes <paul.grimes@amd.com>
Following the discussion at [1] and as the ArmLib relies on them,
move ArmPkg/Chipset/Aarch64[|Mmu].h files to the MdePkg.
Update the path to correctly include the moved files.
[1] https://edk2.groups.io/g/devel/message/111566
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Following the discussion at [1] and as the ArmLib relies on them,
move ArmPkg/Chipset/ArmV7[|Mmu].h files to the MdePkg.
Update the path to correctly include the moved files.
[1] https://edk2.groups.io/g/devel/message/111566
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Related to https://bugzilla.tianocore.org/show_bug.cgi?id=4121, but not
resolving it. (Nearly?) all of ArmPkg describes industry standard
behaviour, and hence according to general rules, ought to live in MdePkg.
Addressing this will however be a substantial task.
Take a first step by moving the ArmLib interface definition to MdePkg,
as discussed in
https://edk2.groups.io/g/devel/topic/patch_v5_2_6/102725178
Continuous-integration-options: PatchCheck.ignore-multi-package
Cc: Pierre Gondois <pierre.gondois@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Set the rdrand feature bit when faking cpuid for host test cases.
Needed to make the CryptoPkg test cases work.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
RDRAND has notoriously been broken many times over its lifespan.
Add a smoketest to RDRAND, in order to better sniff out potential
security concerns.
Also add a proper CPUID test in order to support older CPUs which may
not have it; it was previously being tested but then promptly ignored.
Testing algorithm inspired by linux's arch/x86/kernel/cpu/rdrand.c
:x86_init_rdrand() per commit 049f9ae9..
Many thanks to Jason Donenfeld for relicensing his linux RDRAND detection
code to MIT and the public domain.
>On Tue, Nov 22, 2022 at 2:21 PM Jason A. Donenfeld <Jason@zx2c4.com> wrote:
<..>
> I (re)wrote that function in Linux. I hereby relicense it as MIT, and
> also place it into public domain. Do with it what you will now.
>
> Jason
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4163
Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jason A. Donenfeld <Jason@zx2c4.com>
Starting from certain version of Visual Studio C compiler (I don’t
have the exact version. I am using VS2019), CpuDeadLoop is optimized
quite well by compiler.
The compiler does not generate instructions that jump out of the loop
when the "Index" is non-zero.
It becomes harder/impossible for developers to break out of the dead-loop
in debugger.
The new version of CpuDeadLoop() compares a volatile global to a volatile
local. This forces 2 reads and a comparison on every loop iteration.
The local variable can be set to 1 to exit the loop without modifying the
global variable.
Using VS2019 with max opt enabled, The dead-loop can be exit by setting
Index to 1 in a debugger.
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Adding definitions for Ipmi Net Sensor Get/Set Thresholds commands and
structures as found in Ipmi specification v2.0
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
Add net function definitions for OEM/Non-IPMI group
request and response
Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
BaseRngLib on AARCH64 will discover whether or not RNDR instructions are
supported, by inspecting the ISAR0 identification register, and setting
a global boolean accordingly. This boolean is used in subsequent
execution to decide whether or not to issue the instruction.
The same discovery code also ASSERT()s that RNDR instructions are
implemented, which is unnecessary, and breaks execution on systems that
incorporate the library but don't implement the instruction (or fail to
expose it to the exception level that the firmware executes at).
So drop the ASSERT().
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Committed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit adds a new MockHash2 protocol to the MdePkg. This allows
the unit tests to pick up the new protocol and use it for testing.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This patch adds a protocol for MockRng. This protocol is used to
mock the Rng protocol for testing purposes.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit adds a mock library for UefiBootServicesTableLib.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Rebecca Cran
Rohit Mathew
Pierre Gondois
Sachin Ganesh
Michael Kubacki
Abhishek Mainkar
Herman Li
Dmitry Antipov
Dongyan Qian
levi.yun
Shenbagadevi R
Dhaval
Sam Kaynor
Jiaxin Wu
Xiaoyao Li
Alexey Kardashevskiy
Dionna Glaze
Gerd Hoffmann
Dongyan Qian
Ard Biesheuvel
Paul Grimes
Leif Lindholm
Pedro Falcato
Ray Ni
Neo Hsueh
Aaron
Nickle Wang
Doug Flick
Shun Cheng Liu