Up until SVN r18540, GenFw created invalid PE/COFF binaries for the ARM
architecture, by allowing PE/COFF .data sections to appear at offsets
that were not aligned to the global PE/COFF section alignment. The
reason for this was that the relocation metadata emitted by RVCT's
armlink only contains dynamic absolute relocations, so it is impossible
to recalculate relative relocations between .text and .data, and so the
relative offset between the two needs to be preserved.
Since r18540, we do align .data to the PE/COFF section alignment,
resulting in potentially corrupt PE/COFF binaries unless .data happens
to appear at a 32-byte aligned offset. So let's introduce a RVCT scatter
file that sets this alignment for the ELF .data section (and subsequent
.bss section).
At the same time, set the start offset to 0x220 bytes (which is the size
of our 32-bit PE/COFF header) so that the memory layouts are identical
between ELF and PE/COFF. Also add a 4 KB aligned version that can be
used to build DXE_RUNTIME_DRIVER modules with runtime memory protection
enabled.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19235 6f19259b-4bc3-4df7-8a09-765794883524
The EBC instruction set supports memory and MMIO access, but not
I/O port access. Add EBC support to BaseIoLibIntrinsic that
generates an ASSERT() if the IoReadXX()/IoWriteXX() APIs are used.
This matches the implementation for other CPU types that do not
support I/O port access.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19234 6f19259b-4bc3-4df7-8a09-765794883524
Fix build warnings for potentially uninitialized local variables
in the functions ShellMmLocateIoProtocol() and ShellCommandRunMm()
in the Shell implementation of the 'mm' command.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19233 6f19259b-4bc3-4df7-8a09-765794883524
Add missing braces in module global mControllerDevicePathTemplate.
Initialize ControllerNumber and ContainsControllerNode in
SerialControllerDriverStart() to address warning for potential use
before initialization warning.
Move initialization of local SerialIo earlier in
SerialControllerDriverStart() to address warning for potential use
before initialization warning.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19232 6f19259b-4bc3-4df7-8a09-765794883524
The file name is too long and with "Definitions" word
that is duplicated meanings for the header file.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19231 6f19259b-4bc3-4df7-8a09-765794883524
When the FvSimpleFileSystemDxe module is included in a platform,
Simple File System Protocols are produced for firmware volumes(FV)
that do not have the same style device paths as file systems with
file names. The ShellPkg has an assumption that the device path
contains device path nodes of type MEDIA_FILEPATH_DP and generates
an ASSERT() if any other device path nodes are encountered. This
change removes the ASSERT() condition and instead returns NULL that
means EfiShellGetFilePathFromDevicePath() can not convert the
device path nodes that represent the file path to a Unicode string.
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19228 6f19259b-4bc3-4df7-8a09-765794883524
'.' should be '_'.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Shumin Qiu <shumin.qiu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19226 6f19259b-4bc3-4df7-8a09-765794883524
This should just return an error and not assert. We hit this when testing with a client that was trying to access the old IP4_CONFIG on firmware implementing IP4_CONFIG2.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19219 6f19259b-4bc3-4df7-8a09-765794883524
OpenSSL has released version 1.0.2e with security fixes.
Upgrade the supported OpenSSL version in CryptoPkg/OpensslLib
from 1.0.2d to 1.0.2e.
(Note: This is based on Ard's previous patch with extra fix
https://rt.openssl.org/Ticket/Display.html?id=4175)
Contributed-under: TianoCore Contribution Agreement 1.0
Singed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Qin Long <qin.long@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19218 6f19259b-4bc3-4df7-8a09-765794883524
For function ScsiExecuteSCSICommand(), when the 'Event' parameter is not
NULL but the target SCSI device does not support non-blocking I/O, it will
execute a blocking I/O operation instead.
However, after the SCSI operation is done, the 'Event' is not signaled to
inform the caller.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19217 6f19259b-4bc3-4df7-8a09-765794883524
Four new functions are added to UefiScsiLib:
ScsiRead10CommandEx
ScsiWrite10CommandEx
ScsiRead16CommandEx
ScsiWrite16CommandEx
They support both blocking and non-blocking SCSI Read/Write operation
depending on the optional parameter 'Event' passed to those APIs.
When 'Event' is NULL, these four functions will call the non-EX version
couterparts to execute blocking SCSI I/O. When 'Event' is not NULL,
non-blocking I/O operation is executed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19214 6f19259b-4bc3-4df7-8a09-765794883524
This is the complementary patch for the commit 7945b29, which strictly
aligns temporary heap size and temporary stack size, but does not do
the same thing when switching stack and heap to permanent memory, and
then it may cause fatal data corruption like PHIT HOB lost and stack
pointer unaligned.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19213 6f19259b-4bc3-4df7-8a09-765794883524
This patch is used to fix ifconfig hang issue with incomplete
parameters. In addition, some error related output information
is added to increase the interactivity.
Cc: Leekha Shaveta <shaveta@freescale.com>
Cc: Carsey Jaben <jaben.carsey@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Tested-by: Leekha Shaveta <shaveta@freescale.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19212 6f19259b-4bc3-4df7-8a09-765794883524
In multiple root bridge platforms, different root bridges may
share the same segment but occupy different range of buses,
or may occupy different segments.
The fix is to find the correct root bridge IO instance by
comparing not only the segment but also the bus ranges.
It tries to access the MMIO and IO in the following order:
PciRootBridgeIo, CpuIo and direct IO.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19181 6f19259b-4bc3-4df7-8a09-765794883524
PciSioSerialDxe driver can manages UARTs on a SIO chip or a PCI/PCIE
card.
It manages the SIO instance whose last device path node is a ACPI
device path and the HID in the ACPI device path node equals to
EISA_PNP_ID (0x501).
It also manages the PCI IO instance whose class code is 7/0/2 (16550
UART). But when proper value is set to PcdPciSerialParameters, the
driver can also manage non-standard PCI serial cards by matching
the Vendor ID and Device ID specified in PcdPciSerialParameters.
The PCI BAR index, IO/MMIO offset, register stride, clock rate can
also be specified through the same PCD.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19179 6f19259b-4bc3-4df7-8a09-765794883524
This patch is used to fix the potential NULL pointer dereferenced
in function 'ParseDnsResponse'.
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Zhang Lubo <lubo.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19178 6f19259b-4bc3-4df7-8a09-765794883524
When using 'dh' to dump all protocols installed on a handle, some of
them are shown as 'UnknownDevice'.
Device patch make 'dh' support all spec defined protocols.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19177 6f19259b-4bc3-4df7-8a09-765794883524
This patch updates the ArmPkg variant of InvalidateInstructionCacheRange to
flush the data cache only to the point of unification (PoU). This improves
performance and also allows invalidation in scenarios where it would be
inappropriate to flush to the point of coherency (like when executing code
from L2 configured as cache-as-ram).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Added AARCH64 and ARM/GCC implementations of the above.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19174 6f19259b-4bc3-4df7-8a09-765794883524
Now that we removed the complete ArmPlatformGlobalVariable implementation,
remove stale PCD references to it from ArmVExpress-CTA15-A7.dsc
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19173 6f19259b-4bc3-4df7-8a09-765794883524
RVCT does not like the arithmetic involving a VOID* pointer that was
introduced in SVN r19163, so use explicit casts instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19172 6f19259b-4bc3-4df7-8a09-765794883524
The default behavior of the GCC compiler is to emit uninitialized globals
with external linkage into a COMMON section, where duplicate definitions
are merged. This may result in unexpected behavior, since global variables
defined under the same name in different C files may not refer to the same
logical data item.
For instance, the definitions of EFI_EVENT mVirtualAddressChangeEvent that
[used to] appear in the following files:
CryptoPkg/Library/BaseCryptLib/SysCall/RuntimeMemAllocation.c
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableDxe.c
will be folded into a single instance of the variable when the latter
module includes the former library, which can lead to unexpected results.
Even if some may argue that there are legal uses for COMMON allocation, the
high modularity of EDK2 combined with the low level of awareness of the
intracicies surrounding common allocation and the generally poor EDK2
developer discipline regarding the use of the STATIC keyword* make a strong
case for disabling it by default, and re-enabling it explicitly for packages
that depend on it.
So prevent GCC from emitting variables into the COMMON section, by passing
-fno-common to the compiler, and discarding the section in the GNU ld linker
script.
* Any function or variable that is only referenced from the translation unit
that defines it could be made STATIC. This does not only prevent issues
like the above, it also allows the compiler to generate better code, e.g.,
drop out of line function definitions after inlining all invocations or
perform constant propagation on variables.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19164 6f19259b-4bc3-4df7-8a09-765794883524
Instead of using fuzzy arithmetic with a hardcoded stack alignment value
of 0x4, use the symbolic constant CPU_STACK_ALIGNMENT (which is at least
8 bytes, btw) to round the temporary stack base and size.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19163 6f19259b-4bc3-4df7-8a09-765794883524
Add new API MtrrSetMemoryAttributeInMtrrSettings() in MtrrLib. Platform could
use this API to set MTRR setting into local MTRR settings buffer instead of
MTRRs. At last, platform could use MtrrSetAllMtrrs() to set the MTRR settings
into MTRRs totally. It could improve MTRRs programming performance obviously,
specially when platform is going to program a set of MTRRs.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19162 6f19259b-4bc3-4df7-8a09-765794883524
MtrrDebugPrintAllMtrrsWorker() provides the capability to dump the MTRR setting
from MTRRs or the input MTRR settings buffer.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19161 6f19259b-4bc3-4df7-8a09-765794883524
When MtrrSetMemoryAttribute() programs variable MTRRs, it may disable/enable
cache and disable/enable MTRRs several times. This updating tries to do
operation in local variable and does the hardware initialization one time only.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19158 6f19259b-4bc3-4df7-8a09-765794883524
When MtrrSetMemoryAttribute() programs fixed MTRRs, it may disable/enable cache
and disable/enable MTRRs several times. This updating tries to do operation in
local variable and does the hardware initialization one time only.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19157 6f19259b-4bc3-4df7-8a09-765794883524
Add function to shadow the content of variable MTRRs into an internal array:
VariableMtrr. And used MtrrGetMemoryAttributeInVariableMtrrWorker() in other
functions.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19156 6f19259b-4bc3-4df7-8a09-765794883524
Try to make use of worker functions to get MTRRs count. It could avoid invoking
IsMtrrSupported() for many times.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19155 6f19259b-4bc3-4df7-8a09-765794883524
Only adjust functions order and there is no any real functionality impact.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19154 6f19259b-4bc3-4df7-8a09-765794883524
Abstract some worker functions not to invoke IsMtrrSupported(). They could be
used by other functions to reduce the number of invoking times on
IsMtrrSupported().
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19153 6f19259b-4bc3-4df7-8a09-765794883524
Current MtrrLib reserves 2 variable MTRRs for some legacy OS boot (CSM boots)
may require some MTRRs to be reserved for OS use. But UEFI OS boot will not use
MTRRs.
Per Scott's suggestion in
link: http://article.gmane.org/gmane.comp.bios.edk2.devel/4099
Add one PCD PcdCpuNumberOfReservedVariableMtrrs to specify the number of
variable MTRRs reserved for OS use. Setting its default value to 2 is for
back-compatibility.
Cc: Scott Duplichan <scott@notabs.org>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Suggested-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19151 6f19259b-4bc3-4df7-8a09-765794883524
Ard Biesheuvel
Michael Kinney
Daocheng Bu
Yao, Jiewen
Qiu Shumin
Jeff Fan
Eugene Cohen
Qin Long
Hao Wu
Heyi Guo
Jiaxin Wu
Ruiyu Ni
Jaben Carsey
Jordan Justen
Chao Zhang
Eric Dong
Dandan Bi
Yonghong Zhu