Commit Graph

427 Commits

Author SHA1 Message Date
Olivier Martin olivier.martin bd1d062820 ARM Packages: Added support for GCC stack protector
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15853 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-20 18:01:50 +00:00
Olivier Martin 5a539eb536 ArmPkg/ArmLib/ArmV7: Fixed ArmIsMpCore()
The function was not returning the expected value.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15850 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-20 17:57:34 +00:00
Olivier Martin 1eb5b4f28b ArmPkg/ArmLib: Set again TCR after getting the Translation Table attributes
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15837 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:36:36 +00:00
Olivier Martin 04ad241e20 ArmPkg/BdsLib: Prevent a hang in BdsConnectDevicePath() when a sub-device path is not found
Some device paths were making BdsConnectDevicePath() hang.
To prevent these hangs we check if the handle returned by
gBS->LocateDevicePath() is the same after each iteration.

An example of a device path that hangs:
PciRoot(0x0)/Pci(0x1,0x0)/USB(0x0,0x0)/USB(0x3,0x0)/HD(...)
The connect controller function manages to find PciRoot()/Pci(0x1,0x0)
but the USB driver does not produce USB(0x0,0x0)/USB(0x3,0x0) and
returns EFI_SUCCESS on its initialization.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15835 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:35:14 +00:00
Ronald Cron 3402aac7d9 ARM Packages: Removed trailing spaces
Trailing spaces create issue/warning when generating/applying patches.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:29:52 +00:00
Ronald Cron 62d441fb17 ARM Packages: Corrected non-DOS line endings
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15832 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:22:20 +00:00
Olivier Martin b4e53e389d ArmPkg/ArmSmcLib: Fixed SMC helper functions
The SMC helper functions were buggy as they were assuming that
the values in x1-x7 registers were preserved across an SMC call,
which is not the case.  This patch fixes this issue.

It also simplifies the code by providing only 1 version of the SMC
helper function.  We used to have 4 versions depending on the number
of arguments.  The problem with this approach was that the number of
arguments also dictated the number of return values, which is
completely unrelated.  E.g. you can have an SMC call that takes
1 argument but returns 4 values.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15748 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04 14:18:13 +00:00
Olivier Martin 9a9dd4e839 ArmPkg/IndustryStandard/ArmStdSmc.h: Update Standard Service SMC Calls
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15747 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04 14:12:57 +00:00
Harry Liebel ef0fa8e16b ArmPkg: Remove BasePeCoffLib
ArmPkg contains unused and outdated code for runtime PE/COFF image
relocation.

- Use the version in MdePkg instead.
- Remove references to this package from BeagleBoardPkg.

ArmPkg/BasePeCoffLib was added to deal with MOVT instruction that
was not part of the PE/COFF specification at that time.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15712 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:13:21 +00:00
Olivier Martin 46d4d75cb2 ArmPkg/ArmLib.h: Fixed name of the argument
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15711 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:10:45 +00:00
Olivier Martin 3ab3d13887 ArmPkg/CpuDxe: Fixed some typo issues in the AArch64 exception code
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15710 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:09:48 +00:00
Olivier Martin f3c5066fa6 ArmPkg/AArch64.h: Added Exception Syndrome Register definitions
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15709 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:09:10 +00:00
Olivier Martin 6a44c22732 ArmPkg/AArch64: Added ARM_HCR_TSC definition
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15708 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:08:15 +00:00
Olivier Martin 022cb42029 ArmPkg/ArmPkg.dec: Added the interrupt numbers for the Hypervisor and Virtual Timers
These numbers are mainly to reduce hardcoded numbers into the ACPI GTDT table.
And also to match with the use of PcdArmArchTimerSecIntrNum and PcdArmArchTimerIntrNum
into the GTDT ACPI Table.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15707 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:07:30 +00:00
Olivier Martin 7e119c677e ArmPkg/AArch64.h: Added SPSR and Timer register definitions
These timer register definitions are AArch64 specific. It is the reason
why they are into this file and not into Chipset/ArmArchTimer.h.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15706 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:06:33 +00:00
Ronald Cron f53da37ad0 ArmPkg/ArmLib.h: Removed GET_CORE_POS macro
The platform independant GET_CORE_POS has been replaced by the platform
dependent function ArmPlatformGetCorePosition().

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15661 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15 09:26:53 +00:00
Olivier Martin 6d0ca2577c ARM Packages: Force the SEC modules to be 2K aligned for AArch64
The AArch64 Vector Table must be aligned on a 2K boundary.
The FDF specification does not support 2K alignment but support 4K.

A clear comment has been added to help integrator to understand why the
assertion fails when porting to a new AArch64 platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15659 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15 09:24:25 +00:00
Olivier Martin 9232ee5338 ArmPkg/BdsLib: Removed PSCI discoverability from the Linux loader
Some platforms might decide to not support PSCI in their FDT-aware Linux
system even if their firmware supports it.
It is the responsibility of the platform engineer to provide the appropriate FDT.

The PCD gArmTokenSpaceGuid.PcdArmPsciSupport is not required anymore.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15658 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15 09:21:41 +00:00
Eugene Cohen ffb91edfd5 ArmPkg/ArmLib: Improved ArmConfigureMmu Performance
Data & Instruction Caches can be kept enabled while the new
translation table is filled.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15647 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-09 11:14:36 +00:00
Olivier Martin 1b0ac0dedf ArmPkg/ArmGic: Returned the InterruptId in ArmGicAcknowledgeInterrupt()
The InterruptId has a different width for GicV2 and GicV3 (respectively
10bit and 24bit).
The function prototype has been changed to return this value to make the
caller GIC architecture version independent. Otherwise, we would have need
to expose a different mask to allow the caller to retrieve this value from
the read register.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15628 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 14:41:30 +00:00
Olivier Martin f5241b5725 ArmPkg/ArmGic: Introduced support for GicV2 to ArmGicDxe
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15627 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 14:38:14 +00:00
Olivier Martin 793ca69f50 ArmPkg/ArmGic: Introduced support for GicV2 to ArmGicLib
The support for GIcV2 was already existing. This change separate the GicV2
specific functions from the common Gic code (in preparation for GicV3 support).

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15626 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 14:36:42 +00:00
Olivier Martin 60775c51a5 ArmPkg/ArmGic: Moved ArmGicDisableDistributor() to ArmGicLib.c
The implementation is the same when we run in Secure or Non-Secure world.
This change makes this function available for ArmGicSec.inf and ArmGicNonSec.inf.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15625 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:27:28 +00:00
Olivier Martin 0458b423b6 ArmPkg/ArmGic: Move RegisterInterruptSource() to the common GicDxe file
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15624 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:26:33 +00:00
Olivier Martin 69b5dc9f8e ArmPkg/ArmGic: Move the installation and the registration to InstallAndRegisterInterruptService()
It will allow reusing the same code for GICv2 and GICv3 only drivers.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15623 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:25:29 +00:00
Olivier Martin 397bdc990b ArmPkg/ArmGic: Make the GicDxe driver depends on ArmGicLib (cont)
... and also rename the ArmGicLib sources to use an explicit 'Lib' suffix.

The renaming did not work well with SVN. Files were missing from the initial commit.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15622 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:20:45 +00:00
Olivier Martin e700a1fc91 ArmPkg/ArmGic: Introduced helper functions to access the GIC controller
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15621 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:16:48 +00:00
Olivier Martin 4edcf21de4 ArmPkg/ArmGic: Make the GicDxe driver depends on ArmGicLib
... and also rename the ArmGicLib sources to use an explicit 'Lib' suffix.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15620 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:14:20 +00:00
Olivier Martin 2ca815a495 ArmPkg/ArmGic: Move out the EndOfInterrupt from the interrupt acknowledgement
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15619 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:13:27 +00:00
Olivier Martin d80401a16f ArmPkg/Drivers/ArmGic: Introduced ArmGicEndOfInterrupt()
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15618 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:11:53 +00:00
Olivier Martin edc93a3191 ArmPkg/BdsLib: Prevent memory leak whith TFTP
In some case, the size of the downloaded TFTP image cannot be known.
An arbitrary larger buffer is allocated to receive the image.
We need to make sure when we free the buffer we free the size
of the allocated buffer and not the size of the actual image.
 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15609 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-01 09:27:19 +00:00
Olivier Martin a6217114e3 ArmPkg/ArmCacheMaintenanceLib: Fixed comment (and coding style)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15608 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-01 09:26:28 +00:00
Olivier Martin 6defc4db4c ArmPkg/CpuDxe/ArmV6: Return error status when ExceptionHandlersStart is not 32-byte aligned
The function should detect and return the error in non-debug builds when the ASSERT does nothing.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15606 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-01 09:24:07 +00:00
Olivier Martin b0fdce95f7 ARM Packages: Fixed missing braces (the warning was disabled by GCC)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15578 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-20 18:24:51 +00:00
Olivier Martin 5f1103bd1e ArmPkg/AsmMacroIoLib: Add support for ARM Compiler 6.00
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15554 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:43:26 +00:00
Olivier Martin ec17f0f56a ArmPkg/CpuDxe: Stack Pointer is not 8-bytes aligned in AArch32 interrupt handling
See section "2.1 The need to align SP to a multiple of 8 at conforming call sites" in
"Advisory Note. SP must be 8-byte aligned on entry to AAPCS-conforming functions"
Source: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0046b/IHI0046B_ABI_Advisory_1.pdf

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15553 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:42:18 +00:00
Olivier Martin 27331bff97 ArmPkg: Added new ARM Processor Feature Register definitions
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15552 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:39:23 +00:00
Olivier Martin 01674afdad ArmPkg/ArmLib: Drain Write Buffer before DCache maintenance operations.
Cache maintenance operations by Set/Way require that the Write Buffer
be drained before the cache is flushed.  Without that, the flush can
miss the most recent values written as they are still "pipelined".
That has unfortunate consequences, especially where code is being
copied to RAM.
The fix is to add DSB instructions before the affected operations.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15551 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:37:29 +00:00
Olivier Martin 451b665890 ArmPkg/DefaultExceptionHandlerLib/Aarch64: Added friendly debug message
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15549 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:34:17 +00:00
Olivier Martin d8f36fb568 ArmPkg/BdsLib: Added support for TFTP servers without 'tsize' extension
Some TFTP servers do not have 'tsize' extension.
This change allows to download files from TFTP servers that do not have
this extension by trying to download the file into a pre-allocated buffer.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15539 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-19 16:41:25 +00:00
Brendan Jackman 271ce4bd70 ArmPkg/BdsLib/AArch64: Added more useful error messages when loading Linux
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <Brendan.JackMan@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15528 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-14 16:41:04 +00:00
Brendan Jackman 1aaa6f61a5 ArmPkg/BdsLib: Fix allocating kernel buffer in TFTP
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <Brendan.JackMan@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15527 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-14 16:39:43 +00:00
Olivier Martin 48ef4e4276 ArmPkg/CpuDxe/AArch64: Fixed SyncCacheConfig() when first entry is in 3-level
If the first entry of the memory map is in the third level (case when the region
at 0x0 is smaller than 4KB) then its descriptor type would be TT_TYPE_BLOCK_ENTRY_LEVEL3
(=0x3) which has the same value as TT_TYPE_TABLE_ENTRY (=0x3).
The first condition in GetFirstPageAttribute() needed the table level
to not mix these two descriptor types.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15526 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-14 05:32:07 +00:00
Mark Salter 10ddca8db9 ArmPkg/BdsLib: Fix booting with partial paths
Boot entries created by efibootmgr may contain a partial device path
to the EFI application to boot. These entries begin with a partition
device path whereas entries created via ARM Boot Manager contain a
full path to the EFI application. The ARM BDS code will fill in the
missing parts of this partial device path as it does for removeable
device paths. This allows the application to be loaded and started.
However, the current code passes the original partial device path to
gBS->LoadImage() and thus LoadImage is unable to find a DeviceHandle
for the path. This means the application being booted cannot find the
boot device from the Loaded Image Protocol structure. In the case of
grub, this prevents the grub config file from being found. This patch
fixes this by making sure the full path is propagated back to the
caller of gBS->LoadImage() so that a proper DeviceHandle gets passed
to the application being booted.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15518 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 15:09:27 +00:00
Brendan Jackman f8a9910c9b ARM Packages: Use .8byte instead of .dword for pointers
Clang doesn't recognise .dword

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15510 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:59:50 +00:00
Brendan Jackman 73ca50096e ARM Packages: Use AND instead of BIC instruction with immediate
AARCH64 does not have a BIC-with-immediate instruction. GAS assembles it as a
AND with the immediate inverted, but Clang's integrated assembler emits an
error.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15509 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:59:04 +00:00
Brendan Jackman 7eb1d8522a ArmPkg/CpuDxe/AArch64: use STUR instruction for signed offset
The AARCH64 LDR and STR instructions only support signed offsets for post- and
pre-indexed addressing. For normal signed offset addressing, the mnemonic is
STUR. GNU As automatically assembles STR with signed offset as STUR, but Clang's
integrated assembler doesn't.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15508 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:57:51 +00:00
Brendan Jackman 0db208eaca ArmPkg/CpuDxe/AArch64/ExceptionSupport.S: Fix immediate syntax
GNU as assembles instructions without the '#' before immediates. Clang doesn't.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15507 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:56:42 +00:00
Brendan Jackman 919a3a026c ARM Packages: use GCC_ASM_EXPORT to export functions
This ensures the .type directive is used to mark them as function symbols

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15506 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:55:52 +00:00
Brendan Jackman 45440744c4 ArmLib/AArch64Support.S: remove export of unimplemented function
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15505 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:54:46 +00:00