Commit Graph

475 Commits

Author SHA1 Message Date
Olivier Martin 1eb5b4f28b ArmPkg/ArmLib: Set again TCR after getting the Translation Table attributes
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15837 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:36:36 +00:00
Olivier Martin 04ad241e20 ArmPkg/BdsLib: Prevent a hang in BdsConnectDevicePath() when a sub-device path is not found
Some device paths were making BdsConnectDevicePath() hang.
To prevent these hangs we check if the handle returned by
gBS->LocateDevicePath() is the same after each iteration.

An example of a device path that hangs:
PciRoot(0x0)/Pci(0x1,0x0)/USB(0x0,0x0)/USB(0x3,0x0)/HD(...)
The connect controller function manages to find PciRoot()/Pci(0x1,0x0)
but the USB driver does not produce USB(0x0,0x0)/USB(0x3,0x0) and
returns EFI_SUCCESS on its initialization.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15835 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:35:14 +00:00
Ronald Cron 3402aac7d9 ARM Packages: Removed trailing spaces
Trailing spaces create issue/warning when generating/applying patches.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:29:52 +00:00
Ronald Cron 62d441fb17 ARM Packages: Corrected non-DOS line endings
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15832 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:22:20 +00:00
Olivier Martin b4e53e389d ArmPkg/ArmSmcLib: Fixed SMC helper functions
The SMC helper functions were buggy as they were assuming that
the values in x1-x7 registers were preserved across an SMC call,
which is not the case.  This patch fixes this issue.

It also simplifies the code by providing only 1 version of the SMC
helper function.  We used to have 4 versions depending on the number
of arguments.  The problem with this approach was that the number of
arguments also dictated the number of return values, which is
completely unrelated.  E.g. you can have an SMC call that takes
1 argument but returns 4 values.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15748 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04 14:18:13 +00:00
Olivier Martin 9a9dd4e839 ArmPkg/IndustryStandard/ArmStdSmc.h: Update Standard Service SMC Calls
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15747 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04 14:12:57 +00:00
Harry Liebel ef0fa8e16b ArmPkg: Remove BasePeCoffLib
ArmPkg contains unused and outdated code for runtime PE/COFF image
relocation.

- Use the version in MdePkg instead.
- Remove references to this package from BeagleBoardPkg.

ArmPkg/BasePeCoffLib was added to deal with MOVT instruction that
was not part of the PE/COFF specification at that time.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15712 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:13:21 +00:00
Olivier Martin 46d4d75cb2 ArmPkg/ArmLib.h: Fixed name of the argument
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15711 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:10:45 +00:00
Olivier Martin 3ab3d13887 ArmPkg/CpuDxe: Fixed some typo issues in the AArch64 exception code
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15710 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:09:48 +00:00
Olivier Martin f3c5066fa6 ArmPkg/AArch64.h: Added Exception Syndrome Register definitions
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15709 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:09:10 +00:00
Olivier Martin 6a44c22732 ArmPkg/AArch64: Added ARM_HCR_TSC definition
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15708 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:08:15 +00:00
Olivier Martin 022cb42029 ArmPkg/ArmPkg.dec: Added the interrupt numbers for the Hypervisor and Virtual Timers
These numbers are mainly to reduce hardcoded numbers into the ACPI GTDT table.
And also to match with the use of PcdArmArchTimerSecIntrNum and PcdArmArchTimerIntrNum
into the GTDT ACPI Table.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15707 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:07:30 +00:00
Olivier Martin 7e119c677e ArmPkg/AArch64.h: Added SPSR and Timer register definitions
These timer register definitions are AArch64 specific. It is the reason
why they are into this file and not into Chipset/ArmArchTimer.h.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15706 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 14:06:33 +00:00
Ronald Cron f53da37ad0 ArmPkg/ArmLib.h: Removed GET_CORE_POS macro
The platform independant GET_CORE_POS has been replaced by the platform
dependent function ArmPlatformGetCorePosition().

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15661 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15 09:26:53 +00:00
Olivier Martin 6d0ca2577c ARM Packages: Force the SEC modules to be 2K aligned for AArch64
The AArch64 Vector Table must be aligned on a 2K boundary.
The FDF specification does not support 2K alignment but support 4K.

A clear comment has been added to help integrator to understand why the
assertion fails when porting to a new AArch64 platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15659 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15 09:24:25 +00:00
Olivier Martin 9232ee5338 ArmPkg/BdsLib: Removed PSCI discoverability from the Linux loader
Some platforms might decide to not support PSCI in their FDT-aware Linux
system even if their firmware supports it.
It is the responsibility of the platform engineer to provide the appropriate FDT.

The PCD gArmTokenSpaceGuid.PcdArmPsciSupport is not required anymore.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15658 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-15 09:21:41 +00:00
Eugene Cohen ffb91edfd5 ArmPkg/ArmLib: Improved ArmConfigureMmu Performance
Data & Instruction Caches can be kept enabled while the new
translation table is filled.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15647 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-09 11:14:36 +00:00
Olivier Martin 1b0ac0dedf ArmPkg/ArmGic: Returned the InterruptId in ArmGicAcknowledgeInterrupt()
The InterruptId has a different width for GicV2 and GicV3 (respectively
10bit and 24bit).
The function prototype has been changed to return this value to make the
caller GIC architecture version independent. Otherwise, we would have need
to expose a different mask to allow the caller to retrieve this value from
the read register.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15628 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 14:41:30 +00:00
Olivier Martin f5241b5725 ArmPkg/ArmGic: Introduced support for GicV2 to ArmGicDxe
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15627 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 14:38:14 +00:00
Olivier Martin 793ca69f50 ArmPkg/ArmGic: Introduced support for GicV2 to ArmGicLib
The support for GIcV2 was already existing. This change separate the GicV2
specific functions from the common Gic code (in preparation for GicV3 support).

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15626 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 14:36:42 +00:00
Olivier Martin 60775c51a5 ArmPkg/ArmGic: Moved ArmGicDisableDistributor() to ArmGicLib.c
The implementation is the same when we run in Secure or Non-Secure world.
This change makes this function available for ArmGicSec.inf and ArmGicNonSec.inf.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15625 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:27:28 +00:00
Olivier Martin 0458b423b6 ArmPkg/ArmGic: Move RegisterInterruptSource() to the common GicDxe file
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15624 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:26:33 +00:00
Olivier Martin 69b5dc9f8e ArmPkg/ArmGic: Move the installation and the registration to InstallAndRegisterInterruptService()
It will allow reusing the same code for GICv2 and GICv3 only drivers.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15623 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:25:29 +00:00
Olivier Martin 397bdc990b ArmPkg/ArmGic: Make the GicDxe driver depends on ArmGicLib (cont)
... and also rename the ArmGicLib sources to use an explicit 'Lib' suffix.

The renaming did not work well with SVN. Files were missing from the initial commit.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15622 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:20:45 +00:00
Olivier Martin e700a1fc91 ArmPkg/ArmGic: Introduced helper functions to access the GIC controller
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15621 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:16:48 +00:00
Olivier Martin 4edcf21de4 ArmPkg/ArmGic: Make the GicDxe driver depends on ArmGicLib
... and also rename the ArmGicLib sources to use an explicit 'Lib' suffix.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15620 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:14:20 +00:00
Olivier Martin 2ca815a495 ArmPkg/ArmGic: Move out the EndOfInterrupt from the interrupt acknowledgement
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15619 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:13:27 +00:00
Olivier Martin d80401a16f ArmPkg/Drivers/ArmGic: Introduced ArmGicEndOfInterrupt()
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15618 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-04 11:11:53 +00:00
Olivier Martin edc93a3191 ArmPkg/BdsLib: Prevent memory leak whith TFTP
In some case, the size of the downloaded TFTP image cannot be known.
An arbitrary larger buffer is allocated to receive the image.
We need to make sure when we free the buffer we free the size
of the allocated buffer and not the size of the actual image.
 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15609 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-01 09:27:19 +00:00
Olivier Martin a6217114e3 ArmPkg/ArmCacheMaintenanceLib: Fixed comment (and coding style)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15608 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-01 09:26:28 +00:00
Olivier Martin 6defc4db4c ArmPkg/CpuDxe/ArmV6: Return error status when ExceptionHandlersStart is not 32-byte aligned
The function should detect and return the error in non-debug builds when the ASSERT does nothing.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15606 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-01 09:24:07 +00:00
Olivier Martin b0fdce95f7 ARM Packages: Fixed missing braces (the warning was disabled by GCC)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15578 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-20 18:24:51 +00:00
Olivier Martin 5f1103bd1e ArmPkg/AsmMacroIoLib: Add support for ARM Compiler 6.00
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15554 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:43:26 +00:00
Olivier Martin ec17f0f56a ArmPkg/CpuDxe: Stack Pointer is not 8-bytes aligned in AArch32 interrupt handling
See section "2.1 The need to align SP to a multiple of 8 at conforming call sites" in
"Advisory Note. SP must be 8-byte aligned on entry to AAPCS-conforming functions"
Source: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0046b/IHI0046B_ABI_Advisory_1.pdf

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15553 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:42:18 +00:00
Olivier Martin 27331bff97 ArmPkg: Added new ARM Processor Feature Register definitions
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15552 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:39:23 +00:00
Olivier Martin 01674afdad ArmPkg/ArmLib: Drain Write Buffer before DCache maintenance operations.
Cache maintenance operations by Set/Way require that the Write Buffer
be drained before the cache is flushed.  Without that, the flush can
miss the most recent values written as they are still "pipelined".
That has unfortunate consequences, especially where code is being
copied to RAM.
The fix is to add DSB instructions before the affected operations.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15551 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:37:29 +00:00
Olivier Martin 451b665890 ArmPkg/DefaultExceptionHandlerLib/Aarch64: Added friendly debug message
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15549 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:34:17 +00:00
Olivier Martin d8f36fb568 ArmPkg/BdsLib: Added support for TFTP servers without 'tsize' extension
Some TFTP servers do not have 'tsize' extension.
This change allows to download files from TFTP servers that do not have
this extension by trying to download the file into a pre-allocated buffer.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15539 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-19 16:41:25 +00:00
Brendan Jackman 271ce4bd70 ArmPkg/BdsLib/AArch64: Added more useful error messages when loading Linux
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <Brendan.JackMan@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15528 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-14 16:41:04 +00:00
Brendan Jackman 1aaa6f61a5 ArmPkg/BdsLib: Fix allocating kernel buffer in TFTP
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <Brendan.JackMan@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15527 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-14 16:39:43 +00:00
Olivier Martin 48ef4e4276 ArmPkg/CpuDxe/AArch64: Fixed SyncCacheConfig() when first entry is in 3-level
If the first entry of the memory map is in the third level (case when the region
at 0x0 is smaller than 4KB) then its descriptor type would be TT_TYPE_BLOCK_ENTRY_LEVEL3
(=0x3) which has the same value as TT_TYPE_TABLE_ENTRY (=0x3).
The first condition in GetFirstPageAttribute() needed the table level
to not mix these two descriptor types.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15526 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-14 05:32:07 +00:00
Mark Salter 10ddca8db9 ArmPkg/BdsLib: Fix booting with partial paths
Boot entries created by efibootmgr may contain a partial device path
to the EFI application to boot. These entries begin with a partition
device path whereas entries created via ARM Boot Manager contain a
full path to the EFI application. The ARM BDS code will fill in the
missing parts of this partial device path as it does for removeable
device paths. This allows the application to be loaded and started.
However, the current code passes the original partial device path to
gBS->LoadImage() and thus LoadImage is unable to find a DeviceHandle
for the path. This means the application being booted cannot find the
boot device from the Loaded Image Protocol structure. In the case of
grub, this prevents the grub config file from being found. This patch
fixes this by making sure the full path is propagated back to the
caller of gBS->LoadImage() so that a proper DeviceHandle gets passed
to the application being booted.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15518 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 15:09:27 +00:00
Brendan Jackman f8a9910c9b ARM Packages: Use .8byte instead of .dword for pointers
Clang doesn't recognise .dword

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15510 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:59:50 +00:00
Brendan Jackman 73ca50096e ARM Packages: Use AND instead of BIC instruction with immediate
AARCH64 does not have a BIC-with-immediate instruction. GAS assembles it as a
AND with the immediate inverted, but Clang's integrated assembler emits an
error.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15509 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:59:04 +00:00
Brendan Jackman 7eb1d8522a ArmPkg/CpuDxe/AArch64: use STUR instruction for signed offset
The AARCH64 LDR and STR instructions only support signed offsets for post- and
pre-indexed addressing. For normal signed offset addressing, the mnemonic is
STUR. GNU As automatically assembles STR with signed offset as STUR, but Clang's
integrated assembler doesn't.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15508 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:57:51 +00:00
Brendan Jackman 0db208eaca ArmPkg/CpuDxe/AArch64/ExceptionSupport.S: Fix immediate syntax
GNU as assembles instructions without the '#' before immediates. Clang doesn't.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15507 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:56:42 +00:00
Brendan Jackman 919a3a026c ARM Packages: use GCC_ASM_EXPORT to export functions
This ensures the .type directive is used to mark them as function symbols

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15506 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:55:52 +00:00
Brendan Jackman 45440744c4 ArmLib/AArch64Support.S: remove export of unimplemented function
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15505 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:54:46 +00:00
Brendan Jackman ef7b378605 ARM Packages: Remove GCC filter for AARCH64 assembly files
Some non-GCC toolchain might support the GNU assembly language.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15504 6f19259b-4bc3-4df7-8a09-765794883524
2014-05-08 14:54:11 +00:00
Olivier Martin 8bb7f03ade ArmPkg/ArmLib: Fixed AArch64 MMU code when a region overlaps 2 level-3 page tables
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15483 6f19259b-4bc3-4df7-8a09-765794883524
2014-04-24 10:37:48 +00:00
oliviermartin aa4cf2ef96 ArmPkg/CpuDxe: Restore AArch64 system registers before returning from exception
Current EDK2 source code does actually trigger nested interrupted (even if
the PI spec says interrupt should not be nested).
This issue has highlighted the lack of restoring ELR_EL2/ELR_EL1 register.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off: Vijayakumar Subbu <vsubbu@nvidia.com>
Signed-off: Olivier Martin <olivier.martin@arm.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15481 6f19259b-4bc3-4df7-8a09-765794883524
2014-04-23 16:47:13 +00:00
Olivier Martin d8dc9f0af5 ArmPkg: Fixed GetEnvironmentVariable() when the UEFI Variable did not exist
The function was allocating a buffer for the read value from the UEFI Variable.
But it was returning the pointer of the default value when the variable was
not present.
It could cause error when the default value and the returned value were free
when these addresses were the same (double FreePool on the same address).

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15427 6f19259b-4bc3-4df7-8a09-765794883524
2014-04-02 17:32:29 +00:00
Olivier Martin 44372159a2 ArmPkg/ArmCpuLib: Added A57 Errata 806969
This rare errata only affects r0p0

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15400 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-26 19:35:17 +00:00
Olivier Martin 19dc108b65 ArmPkg/ArmLib: Correct Error Handling in AArch64
There are several instances of asserts which do not also handle
the error condition in Release builds.
Because these functions are called in different location of the
code and their parameters might change during the execution, it
is safer to handle the error.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15399 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-26 19:34:32 +00:00
Olivier Martin cf02da5203 ArmPkg/ArmCortexA5xLib: Fixed setting of SMP bit
On CortexA5x the SMP bit is BIT6 of CPUECTLR_EL1 register.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15398 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-26 19:33:51 +00:00
Olivier Martin 47d183db53 ArmPkg/ArmCortexA5x: Declared the helper functions to access the CPU Extended Control Register
This register is A5x specific. It is the reason why the code moved from ArmLib
to ArmCpuLib/ArmCortexA5xLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15397 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-26 19:32:48 +00:00
Olivier Martin 52d44f77c2 ArmPkg/ArmLib: Added helper functions for accessing CPU ACTLR
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15396 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-26 19:31:01 +00:00
Olivier Martin b7dd4dbd26 ArmPkg/Chipset: Added ARMv8 CPU's PartNum
PartNum is the field of MIDR that returns the CPU name.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15395 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-26 19:29:31 +00:00
Harry Liebel d276ac10f1 ArmPkg/SemihostFs: Various fixes for the file system
- Fix file deletion from the shell.
- Fix file creation using the shell editor.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15390 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-25 11:04:41 +00:00
Harry Liebel 228fdff4be ArmPkg/SemihostLib: Made arguments 'native' size
The arguments passed to the semi-hosing backend should
be of 'native' size to match register widths.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15389 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-25 11:03:54 +00:00
Olivier Martin 5456c26c2f ArmPkg/CompilerIntrinsicsLib: Added memset() to AArch64
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15384 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-24 15:30:48 +00:00
Olivier Martin 5ee57c2d7d ArmPkg/ArmLib: Removed unused AArch64 files
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15382 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-24 15:29:03 +00:00
Olivier Martin 647517279d ArmPkg/ArmLib: Renamed Cp15CacheInfo into ArmCacheInfo
CTR (Cache Type Register) has the same format on ARMv7 and AArch64.
Renaming Cp15CacheInfo() into ArmCacheInfo() makes this function
architecture independent.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15381 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-24 15:26:22 +00:00
Olivier Martin d9bd3f11cb ArmPkg/ArmLib: Removed unused ArmSwitchProcessorMode & ArmProcessorMode functions
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15380 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-24 15:25:44 +00:00
Olivier Martin 0676fadd05 ArmPkg: Removed unused header files from source files
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15379 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-24 15:25:01 +00:00
Olivier Martin c32aaba962 ArmPkg: Fix typo in comment and trailing spaces
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15378 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-24 15:24:23 +00:00
Olivier Martin 27995cd5d6 ArmPkg: Tidy assembler code
- Fixed typo
- Removed unreachable 'dead' loop

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15277 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-01 11:01:00 +00:00
Olivier Martin f6c5a29bb9 ArmPkg/ArmLib: Rationalise ArmReadMidr and cognate functions.
The function ArmReadMidr has been recently added, but that functionality was
already present under other names such as Cp15IdCode and ArmMainIdCode.  This
change removes redundant code and moves the function to the Common library.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15276 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-01 11:00:07 +00:00
Olivier Martin 992a1f830d ArmPkg/ArmLib: Fix compilation error with -O3 switch
A warning is reported because ArmArchTimerReadReg may theoretically result
in an unititialised value.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15275 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-01 10:59:25 +00:00
Olivier Martin f0247796cb ArmPkg/ArmLib: ArmReadVBar implementation missing in AArch64
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15274 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-01 10:58:46 +00:00
Olivier Martin eaa84fd553 ArmPkg: Replace single dead loop.
Several assembler macros use a loop at the label "dead" to trap an error.
This is difficult to debug as there is no indication of how one arrived at the loop.
This change replaces dead with distinct loops locally in the macro,
which means the cause of the hang is detectable to the debugger.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15273 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-01 10:57:55 +00:00
Olivier Martin 0ff0e414d1 ArmPkg/ArmLib: Move common definitions from ArmV7Lib.h & AArch64Lib.h to ArmLib.h
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15272 6f19259b-4bc3-4df7-8a09-765794883524
2014-03-01 10:57:09 +00:00
Olivier Martin 0a6f286257 ArmPkg/AsmMacroIoLibV8.h: Correct 32 bit accesses in asm macros
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15257 6f19259b-4bc3-4df7-8a09-765794883524
2014-02-24 19:21:38 +00:00
Olivier Martin 51ad04cbd1 ARM Packages: Include 'AsmMacroIoLibV8.h' instead of the 32bit version
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15256 6f19259b-4bc3-4df7-8a09-765794883524
2014-02-24 19:20:16 +00:00
Garrett Kirkendall b83a92b34e ArmPkg/BdsLib: Support ignoring EfiReservedMemoryType when updating the FDT.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15255 6f19259b-4bc3-4df7-8a09-765794883524
2014-02-24 16:27:48 +00:00
Leif Lindholm e6f3ed4340 ARM Packages: CRLF fixup
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15241 6f19259b-4bc3-4df7-8a09-765794883524
2014-02-12 15:30:34 +00:00
Olivier Martin 9401d6f4b9 ArmPkg/ArmLib: Added ArmReadMidr()
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15240 6f19259b-4bc3-4df7-8a09-765794883524
2014-02-12 15:14:41 +00:00
Olivier Martin 226d5572ad ArmPkg/BdsLib: Removed unused MachineType argument (AArch64)
MachineType was used on 32-bit.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15239 6f19259b-4bc3-4df7-8a09-765794883524
2014-02-12 15:13:44 +00:00
Olivier Martin abc0e1072d ArmPkg: Removed unused header 'BdsUnixLib.h'
This header contains a function that does not exist.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15238 6f19259b-4bc3-4df7-8a09-765794883524
2014-02-12 15:12:41 +00:00
Olivier Martin 4e57d6d70b ArmPkg/ArmLib: VBAR_ELx not written correctly when handler above 4GB
The function ArmWriteVBar had a UINT32 parameter.
Need to change it to UINT.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15208 6f19259b-4bc3-4df7-8a09-765794883524
2014-02-05 12:53:09 +00:00
Garrett Kirkendall 7017c2699d ArmPkg/ArmLib: Fix AARCH64 page table entry filling overrun
Update the LastBlockEntry return value when allocating a new page table block
and the parent page table entry is not valid.  Discovered when producing page
table entries for a memory region that spans multiple page table entries of a
parent page table block.  Not very memory space efficient because the rest of
the code could calculate a required page level that is deeper than some blocks
of the memory region might require.  Case that found the problem:
MemoryRegion->VirtualBase = 0
MemoryRegion->Length = 0x7F000000
This fix will create an un-needed level of page table for address
range 0 -> 0x40000000

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15177 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-24 13:10:54 +00:00
Olivier Martin cf9530e686 ArmPkg/CompilerIntrinsicsLib: Make __aeabi_memcpy the same as memcpy
This code also removed some redundant instructions.

__aeabi_memcpy doesn't require preservation of r0 (as memcpy does),
which could save a push, but the code has been left to keep things consistent.

The reason __aeabi_memcpy has been added to the .S file is so it will be available
to toolchains that use the GCC assembler but the full ARM EABI (i.e. current LLVM)

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15124 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-15 12:24:31 +00:00
Olivier Martin c357fd6a1f ArmPkg/ArmPkg.dec: Redefined PcdSystemMemory(Base|Size) as UINT64
The System Memory region might be out of the 32-bit memory space.

This change has been validated on the FVP AArch64 model using 4GB
of DRAM at 0x8_0000_0000:

-  # System Memory (2GB)
-  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
-  gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000
+  # System Memory (4GB)
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x800000000
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000

EFI Shell and Linux kernel boot successfully.

Note: This change has not been validated on AArch32. I expect some
early assembly code to not work.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>




git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15093 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-10 11:27:31 +00:00
Olivier Martin b2ce4a3961 ARM Packages: Removed 'inline' keyword
'inline' keyword is not supported by the C89 (version used by EDK2).

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14957 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-10 16:39:54 +00:00
Olivier Martin 62436c2162 ArmPkg/AArch64Mmu.h: Fix 'Shift is >= width of type'
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14956 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-10 16:39:04 +00:00
Olivier Martin 377a32dbed ArmPkg/ArmDisassemblerLib: Fixed logical/bitwise operator confusion
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14955 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-10 16:38:17 +00:00
Olivier Martin 77d7af4758 ArmPkg/ArmMpCoreInfo.h: Fixed macro definition
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14954 6f19259b-4bc3-4df7-8a09-765794883524
2013-12-10 16:37:10 +00:00
Olivier Martin ff58c9147b ArmPkg/BdsLib: Fixed the alignment of the relocated Device Tree
When the Device Tree was loaded above the 32bit address space the operation:
*RelocatedFdt = ALIGN ((UINT64)*RelocatedFdt, (UINT32)FdtAlignment);
was returning an incorrect address.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14915 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28 21:40:48 +00:00
Olivier Martin 893e5532be ArmPkg/DebugPeCoffExtraActionLib: Fixed the printing of the location of the EFI modules
When loaded above the 32-bit address space the address requires more than 8 characters.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14913 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28 21:39:46 +00:00
Olivier Martin 71fd27cbee ArmPkg/CpuDxe: Removed LR adjustement for SVC call
The Link Register (LR) does not need adjustement when receiving a Supervisor Call (SVC).
Note: SVC might be generated by debuggers.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14911 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28 21:38:56 +00:00
Olivier Martin 168d724568 ArmPkg: Move definition of ArmIsArchTimerImplemented / ArmReadIdPfrN to ArmLib
These functions are not chipset specific.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14908 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28 21:37:36 +00:00
Olivier Martin 54ed21dbbb ArmPlatformPkg/ArmVExpressPkg: Removed unused PCDs declaration from INF file
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14907 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28 21:37:10 +00:00
Olivier Martin 017baa1cf3 ARM Packages: Renamed PL390Gic driver into ArmGic driver
The aim is to make this driver follows the ARM GIC specifications and
be implementation independent.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14810 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-29 06:36:34 +00:00
Olivier Martin eb5c268fb6 ArmPkg/PL390Gic: Fixed setting of the Interrupt Processor Targets Registers when Uniprocessor
When running on a uniprocessor implementation, the ICDIPTRn registers are RAZ (Read as Zero).
So the previous assertion was not correct.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14798 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-24 11:49:32 +00:00
Garrett Kirkendall 8833370303 ArmPkg/Include/Chipset: Fix translation table address calculations for AARCH64
TT_ADDRESS_* macros were not casting immediate values to UINTN.
This causes shift operations to be off by 32-bits when calculating
addresses above 4GB.  Any address above 4GB was being improperly calculated. 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14777 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-15 09:25:38 +00:00
Olivier Martin 0127372430 ArmPkg/CpuDxe: Fixed confusion in AArch64 Table descriptor types
Table Descriptor and Level-3 Block entry descriptors have the same
translation table type value (ie: 0x3).

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14771 6f19259b-4bc3-4df7-8a09-765794883524
2013-10-14 16:32:38 +00:00
Olivier Martin 433a49a094 ArmPkg/ArmLib: Revert change 'Fixed field shifting in CLIDR_EL1 (AArch64)'
The shift by 1 on the left was expected. It eases the access to CSSELR and set/way operations
where the cache level field is at the BIT1 position.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14704 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-23 09:42:05 +00:00
Olivier Martin cc271ec311 SemihostFs: Fix check for read-only file or file-open
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14703 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-23 09:41:19 +00:00
Olivier Martin 5ad9b48f98 ArmPkg/CpuDxe: Fixed the condition that checks if the level-1 descriptor points to a level-2 page table
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14700 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-23 09:38:53 +00:00
Olivier Martin b7dbd9c27a ArmPkg/ArmLib: Fixed field shifting in CLIDR_EL1 (AArch64)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14677 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-16 09:33:55 +00:00