The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteDr3.asm to Ia32/WriteDr3.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteDr4.asm to Ia32/WriteDr4.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteDr5.asm to Ia32/WriteDr5.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteDr6.asm to Ia32/WriteDr6.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteDr7.asm to Ia32/WriteDr7.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteGdtr.asm to Ia32/WriteGdtr.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteIdtr.asm to Ia32/WriteIdtr.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteLdtr.asm to Ia32/WriteLdtr.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteMm0.asm to Ia32/WriteMm0.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteMm1.asm to Ia32/WriteMm1.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteMm2.asm to Ia32/WriteMm2.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteMm3.asm to Ia32/WriteMm3.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteMm4.asm to Ia32/WriteMm4.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteMm5.asm to Ia32/WriteMm5.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteMm6.asm to Ia32/WriteMm6.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/WriteMm7.asm to Ia32/WriteMm7.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/Wbinvd.asm to Ia32/Wbinvd.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/RdRand.asm to Ia32/RdRand.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/EnablePaging64.asm to Ia32/EnablePaging64.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/DivU64x64Remainder.asm to Ia32/DivU64x64Remainder.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
These routines are defined in GccInline.c.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
This helps generate proper code when converted to NASM, and there is
also no reason for this symbol to be public.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Once the MASM code is converted to NASM, it will be linked into GCC
builds. Since GccInline.c provides these routines for GCC, we need to
prevent this linking.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
NASM wants this code to specify a size.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
NASM doesn't support EXTERNDEF, so convert this to EXTERN.
This will make it easier to convert this code to NASM using an
automated script.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
When we try to cd up two levels using the "../.." notation we
only go up one level. This patch fix this bug.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Add UnicodeStrToAsciiStrS() and AsciiStrToUnicodeStrS() API.
These 2 safe version APIs are used to replace UnicodeStrToAsciiStr() and
AsciiStrToUnicodeStr() API.
The safe version string convert APIs use similar check as StrCpyS().
Cc: Liming Gao <Liming.Gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <Jiewen.Yao@intel.com>
Reviewed-by: Liming Gao <Liming.Gao@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Add more comments:
1) EDKII version safe string function is similar as the one C11.
2) If error is returned, the Destination is unmodified.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The AArch64 DAIF bits are different for reading (mrs) versus writing (msr).
The bitmask definitions assumed they were the same causing incorrect
results when trying to determine the current interrupt state through
GetInterruptState.
The logic for interpreting the DAIF read data using the csel instruction
was also incorrect and is fixed.
Replaced the magic numbers in DisableInterrupts.S and EnableInterrupts.S
with definitions for the DAIF write (daifset/daifclr) IRQ field.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
The runtime test whether the compiler supports arithmetic shift of
negative signed numbers currently relies on undefined behavior in C,
which means that all bets are off regarding whether the condition
that follows passes or fails, regardless of whether the compiler in
fact supports arithmetic shift or not.
Relevant quote from ISO C99 (6.5.7/4)
The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated bits
are filled with zeros. If E1 has an unsigned type, the value of the result
is E1 × 2^E2, reduced modulo one more than the maximum value representable
in the result type. If E1 has a signed type and nonnegative value, and
E1 × 2^E2 is representable in the result type, then that is the resulting
value; otherwise, the behavior is undefined.
For historic purposes, let's keep the test in place (although it is doubtful
we actually need it) but rewrite it in a way that prevents compilers from
this century from doing whacky things with it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19580 6f19259b-4bc3-4df7-8a09-765794883524
The StrnLenS and AsciiStrnLenS functions, when presented with a string
with no terminating NULL in the first MaxSize characters will check
the character at String[MaxSize] before checking if Length < MaxSize.
(They return the correct value, but have accessed beyond the stated
limit in the process.)
Flip the order of the tests to prevent this behaviour.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17936 6f19259b-4bc3-4df7-8a09-765794883524
This ensures the .type directive is used to mark them as function symbols
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17904 6f19259b-4bc3-4df7-8a09-765794883524
The value of EBX must be preserved to follow IA32 cdecl calling convention in the assembly
implementation of AsmFlushCacheLine(). The CPUID instruction modifies the EBX register.
The EBX register value is saved onto the stack before CPUID and restored from the stack
after CPUID.
The update to the inline assembly implementation of AsmFlushCacheLine() changed the location of the
LinearAddress parameter value on the stack. The hardcoded lookup using [esp + 4] is not correct.
Use the parameter name LinearAddress instead of the hard coded [esp + 4] stack location to prevent
this issue from occurring again if there are changes to the inline assembly in the future.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17279 6f19259b-4bc3-4df7-8a09-765794883524
Remove use of CMOVx instruction from IA32 assembly files in BaseLib.
This matches compiler flags for all supported C compilers.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17213 6f19259b-4bc3-4df7-8a09-765794883524
Use CPUID Leaf 01 to detect support for CLFLUSH instruction.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17212 6f19259b-4bc3-4df7-8a09-765794883524
The ARM asm implementation of InternalMathSwapBytes64 () does
interesting things if bit 7 of operand r1 (upper 32 bits of the
input value) is set. After the recursive swap, bit 7 ends up in
the sign bit position, after which it is right shifted with sign
extension, and or'ed with the upper half of the output value.
This means SwapBytes64 (0x00000080_00000000) returns an incorrect
value of 0xFFFFFFFF_80000000.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17077 6f19259b-4bc3-4df7-8a09-765794883524
Move libraries from ShellPkg into MdeModulePkg and MdePkg.
The following libraries are being migrated out of ShellPkg in order to make
their functionality more widely available.
• PathLib: Incorporate into MdePkg/Library/BaseLib
• FileHandleLib: MdePkg/Library/UefiFileHandleLib
• BaseSortLib: MdeModulePkg/Library/BaseSortLib
• UefiSortLib: MdeModulePkg/Library/UefiSortLib
Diffs showing file changes are in the attached file, LibMigration.patch.
A description of the changes follows:
• Move ShellPkg/Include/Library/FileHandleLib.h to MdePkg/Include/Library/FileHandleLib.h
• Move ShellPkg/Include/Library/SortLib.h to MdeModulePkg/Include/Library/SortLib.h
• Move ShellPkg/Library/BaseSortLib to MdeModulePkg/Library/BaseSortLib
• Move ShellPkg/Library/UefiSortLib to MdeModulePkg/Library/UefiSortLib
• Move ShellPkg/Library/BasePathLib/BasePathLib.c to MdePkg/Library/BaseLib/FilePaths.c
• Merge ShellPkg/Include/Library/PathLib.h into MdePkg/Include/Library/BaseLib.h
• Delete ShellPkg/Library/BasePathLib; Includes BasePathLib.c and BasePathLib.inf
• NetworkPkg/NetworkPkg.dsc
• PerformancePkg.dsc
• OvmfPkg/OvmfPkgX64.dsc
• OvmfPkg/OvmfPkgIa32X64.dsc
• OvmfPkg/OvmfPkgIa32.dsc
o Update SortLib and FileHandleLib library classes to point to the new library locations.
o Remove PathLib library class and make sure that BaseLib is described.
• MdeModulePkg/MdeModulePkg.dec
o Add SortLib library class
• MdePkg/MdePkg.dec
o Add FileHandleLib library class
o Add PcdUefiFileHandleLibPrintBufferSize PCD
• MdePkg/Library/BaseLib/BaseLib.inf
o Add FilePaths.c to [Sources]
• MdePkg/Include/Library/BaseLib.h
o Update file description to include "file path functions"
• ShellPkg/ShellPkg.dsc
o Change PACKAGE_GUID to { C1014BB7-4092-43D4-984F-0738EB424DBF }
o Update PACKAGE_VERSION to 1.0
o Update SortLib and FileHandleLib library classes to point to the new library locations.
o Remove PathLib library class and make sure that BaseLib is described.
o Remove ShellPkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf from [Components]
• ShellPkg/ShellPkg.dec
o Update PLATFORM_VERSION to 1.0
o Remove declarations of the FileHandleLib, SortLib, and PathLib Library Classes
o Update comment for the PcdShellPrintBufferSize PCD.
• ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
• ShellPkg/Application/Shell/Shell.inf
o Remove PathLib from [LibraryClasses]
• ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.h
• ShellPkg/Application/Shell/Shell.h
o Remove #include <Library/PathLib.h>
• ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
o Add PathLib to [LibraryClasses]
• ShellPkg/Library/UefiShellLevel1CommandsLib/If.c
o Remove #include <Library/PathLib.h>
• ShellPkg/Application/ShellSortTestApp/ShellSortTestApp.inf
o Add MdeModulePkg/MdeModulePkg.dec to [Packages]
• MdeModulePkg/Library/BaseSortLib/BaseSortLib.inf
• MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
o Replace ShellPkg.dec with MdeModulePkg.dec in [Packages]
• MdeModulePkg/Library/UefiSortLib/UefiSortLib.c
o Remove #include <ShellBase.h>
o Define USL_FREE_NON_NULL() to replace SHELL_FREE_NON_NULL()
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daryl McDaniel <daryl.mcdaniel@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16601 6f19259b-4bc3-4df7-8a09-765794883524
Without this change, NASM 2.09.04 will hang with OVMF+CSM on both IA32
and X64.
Tested on OVMF+CSM on GCC49 with NASM 2.07, 2.09.04 and 2.11.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16058 6f19259b-4bc3-4df7-8a09-765794883524
Module UNI and Package UNI files are not DOS format. Convert them to DOS format.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16042 6f19259b-4bc3-4df7-8a09-765794883524
Previously we were setting it to the start of the GDT in the UEFI
driver's copy of BaseLib. This address is irrelavent, since the C code
will initialize it to the cooresponding address after the Thunk16 code
has been placed in low memory.
Additionally, initializing this was causing a link error for the
XCLANG toolchain.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16025 6f19259b-4bc3-4df7-8a09-765794883524
Convert remaining 'DB' code to assembly code by:
* Move instruction immediate data labels to end of instruction
* Use strict keyword to make sure immediate data size is not optimized
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16024 6f19259b-4bc3-4df7-8a09-765794883524
By using 'bits 16', we can write code for 16-bit use the actual
assembly syntax rather than 'DB' and sometimes writing code with
seemingly incorrect operands because we know it will run correctly
when the processor is running in 16-bit mode.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16023 6f19259b-4bc3-4df7-8a09-765794883524
http://www.nasm.us/doc/nasmdoc3.html#section-3.9
A local label is a label beginning with the period, and it's actual
name is prefixed by the previous non-local label.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16022 6f19259b-4bc3-4df7-8a09-765794883524
This is a translation of X64/Thunk16.asm to NASM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16021 6f19259b-4bc3-4df7-8a09-765794883524
This is a translation of Ia32/Thunk16.asm to NASM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16020 6f19259b-4bc3-4df7-8a09-765794883524
2. Add MODULE_UNI_FILE file that contains the localized Abstract and Description of a module.
a. Addresses an information gap between INF files and the UEFI Distribution Packaging Specification XML schema
b. There will be an associated update to UPT in BaseTools to consume MODULE_UNI_FILE and associated UNI file during UDP creation that performs the INF -> XML conversion.
c. There will be an associated update to UPT in BaseTools to produce MODULE_UNI_FILE and associated UNI file during UDP installation that performs the XML -> INF conversion.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15918 6f19259b-4bc3-4df7-8a09-765794883524
1. Usage information in INF file comment blocks are either incomplete or incorrect.
This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes.
The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15917 6f19259b-4bc3-4df7-8a09-765794883524
The overlap may happen when the address of Destination in
UnicodeStrToAsciiStr() or Source in AsciiStrToUnicodeStr()
is not two bytes aligned.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15665 6f19259b-4bc3-4df7-8a09-765794883524
Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Li Kevin <kevin.y.li@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13183 6f19259b-4bc3-4df7-8a09-765794883524
The registers used to passed arguments to the DxeCore entrypoint in the inline
assembly function InternalSwitchStackAsm() where switched at compilation time.
This change replaces the inline assembly by a pure assembly source file to
avoid this kind of optimization.
Note: Inline assembly is generally not recommanded in system programming.
Reviewed-by: lgao4
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12674 6f19259b-4bc3-4df7-8a09-765794883524
Per Rui's review of the patch _16GdtrBase is a label that is patched by C code so it does require initialization.
approved-by: andrewfish
reviewed-by: jljusten
reviewed-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12515 6f19259b-4bc3-4df7-8a09-765794883524
Reverted changes of data areas from .long back to .space 4. This was done
because the size of .long is based off of .int and may vary. Using a fixed size
is required because these values are for patching code. Also note that .space
will automatically initialize the data to zero. Not initializing all values to
zero was causing the hang/reset.
Signed-off-by: geekboy15a
Reviewed-by: darylm503
Reviewed-by: jljusten
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12079 6f19259b-4bc3-4df7-8a09-765794883524
Fixed issues with X64 clang, and also make StackSwitch push a zero on the new stack to prevent a stack unwind into memory that is no longer valid.
signed-off-by: andrewfish
reviewed-by: lgao4
reviewed-by: mdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12007 6f19259b-4bc3-4df7-8a09-765794883524
In r11047 Ia32/Thunk.S was modified. However, the current
implemention of Ia32/Thunk.S has contant values in the code
which must be updated if the code is changed.
This change updates those constants for the r11047 change.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11121 6f19259b-4bc3-4df7-8a09-765794883524
Only use X86MemoryFence.c for INTEL and MSFT. MemoryFence is defined
in GccInline.c for GCC.
This change is the same as r10522, but for X64.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10525 6f19259b-4bc3-4df7-8a09-765794883524
Update logic to align new 32-bit stack on a 4 byte boundary
Update logic to prevent one slot overlap between the transition code and the new stack.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10133 6f19259b-4bc3-4df7-8a09-765794883524
Move stack alignment check from CPU specific files into common SwitchStack() function and add VA_END() to SwitchStack().
Fix incorrect syntax for ASM_FUNCTION_REMOVE_IF_UNREFERENCED
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9193 6f19259b-4bc3-4df7-8a09-765794883524
It seems for ARM, .align means power of two, so we'd like to use .p2align for more portability.
2. Fix some typos in ARM ProcessorBind.h
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9152 6f19259b-4bc3-4df7-8a09-765794883524
2. Add AsmReadMsr() & AsmWriteMsr() for IPF architecture
3. update AsmCpuMisc.s to only support GCC tool chain to avoid symbol collision.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7034 6f19259b-4bc3-4df7-8a09-765794883524
Move IsHexDigit, BufToHexString, HexStringToBuf from BaseLib to MdeModulePkg IfrSupportLib. The reason is:
1) IsHexDigit function provides the logic to check Hex Digit and convert it to Decimal value, which is required by IScsi LUN and HII user input. But this logic is not provided by any functions in MdeLib. So, it can't be deleted. It is moved to IfrSupportLib.
2) BufToHexString function converts a array of buffers to hex string. If the buffer length is less than sizeof (UINT64), it can be directly replaced by UnicodeValueToString(). But HII modules may use BufToHexString to convert the buffers whose length > sizeof (UINT64). For example:
.\MdeModulePkg\Universal\HiiDatabaseDxe\ConfigRouting.c line 201, 1148
.\Universal\SetupBrowserDxe\Setup.c line line 1457, 1503
Like this case, it is not easy to use UnicodeValueToString to replace BufToHexString. So, BufToHexString is still kept. Because such usages are in HII modules, this function is moved to IfrSupportLib.
3) HexStringToBuf is moved to IfrSupportLib. The reason is similar to BufToHexString.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6782 6f19259b-4bc3-4df7-8a09-765794883524
2. Two two new ReadApplicationRegister.c(), ReadControlRegister.c() API together with its related definitions in BaseLib.h
3. Remove prototype of AsmSwitchStackAndBackingStore() in public BaseLib.h, it is supposed to be a worker function for AsmSwitchStack()
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6757 6f19259b-4bc3-4df7-8a09-765794883524